This patch silences some compile warnings
mostly comming from C++ style comments.
I left the Atombios stuff untouched.
---
src/r600_reg.h | 8 --------
src/r600_textured_videofuncs.c | 10 +++++-----
src/radeon_drm.h | 2 +-
src/rhd_dri.c | 36 ++++++++++++++++++------------------
src/rhd_driver.c | 2 ++
src/rhd_id.c | 2 +-
utils/conntest/rhd_conntest.c | 6 +++---
7 files changed, 30 insertions(+), 36 deletions(-)
diff --git a/src/r600_reg.h b/src/r600_reg.h
index 103cf77..3c27c7f 100644
--- a/src/r600_reg.h
+++ b/src/r600_reg.h
@@ -87,14 +87,6 @@ enum {
WAIT_MEM = (1<<4)
};
-/* CP packet types */
-enum {
- RADEON_CP_PACKET0 = 0x00000000,
- RADEON_CP_PACKET1 = 0x40000000,
- RADEON_CP_PACKET2 = 0x80000000,
- RADEON_CP_PACKET3 = 0xC0000000
-};
-
/* Packet3 commands */
enum {
IT_NOP = 0x10,
diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c
index ad9f561..44d2d77 100644
--- a/src/r600_textured_videofuncs.c
+++ b/src/r600_textured_videofuncs.c
@@ -194,7 +194,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, struct RHDPortPriv *pPriv)
/* Init */
start_3d(pScrn, accel_state->ib);
- //cp_set_surface_sync(pScrn, accel_state->ib);
+ /* cp_set_surface_sync(pScrn, accel_state->ib); */
set_default_state(pScrn, accel_state->ib);
@@ -343,12 +343,12 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, struct RHDPortPriv *pPriv)
tex_res.dst_sel_z = SQ_SEL_1;
tex_res.dst_sel_w = SQ_SEL_1;
tex_res.interlaced = 0;
- // XXX tex bases need to be 256B aligned
+ /* XXX tex bases need to be 256B aligned */
tex_res.base = accel_state->src_mc_addr[0] + uv_offset;
tex_res.mip_base = accel_state->src_mc_addr[0] + uv_offset;
set_tex_resource (pScrn, accel_state->ib, &tex_res);
- // xxx: switch to bicubic
+ /* xxx: switch to bicubic */
tex_samp.xy_mag_filter = SQ_TEX_XY_FILTER_BILINEAR;
tex_samp.xy_min_filter = SQ_TEX_XY_FILTER_BILINEAR;
@@ -419,12 +419,12 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, struct RHDPortPriv *pPriv)
tex_res.dst_sel_z = SQ_SEL_1;
tex_res.dst_sel_w = SQ_SEL_1;
tex_res.interlaced = 0;
- // XXX tex bases need to be 256B aligned
+ /* XXX tex bases need to be 256B aligned */
tex_res.base = accel_state->src_mc_addr[0];
tex_res.mip_base = accel_state->src_mc_addr[0];
set_tex_resource (pScrn, accel_state->ib, &tex_res);
- // xxx: switch to bicubic
+ /* xxx: switch to bicubic */
tex_samp.xy_mag_filter = SQ_TEX_XY_FILTER_BILINEAR;
tex_samp.xy_min_filter = SQ_TEX_XY_FILTER_BILINEAR;
diff --git a/src/radeon_drm.h b/src/radeon_drm.h
index c0d566c..2199ecf 100644
--- a/src/radeon_drm.h
+++ b/src/radeon_drm.h
@@ -528,7 +528,7 @@ typedef struct drm_radeon_init {
RADEON_CLEANUP_CP = 0x02,
RADEON_INIT_R200_CP = 0x03,
RADEON_INIT_R300_CP = 0x04,
- RADEON_INIT_R600_CP = 0x05,
+ RADEON_INIT_R600_CP = 0x05
} func;
unsigned long sarea_priv_offset;
int is_pci; /* for overriding only */
diff --git a/src/rhd_dri.c b/src/rhd_dri.c
index f9d4870..27d328b 100644
--- a/src/rhd_dri.c
+++ b/src/rhd_dri.c
@@ -87,7 +87,7 @@
#define IS_RADEONHD_DRIVER 1
#include "radeon_dri.h"
-#ifdef RANDR_12_SUPPORT // FIXME check / move to rhd_randr.c
+#ifdef RANDR_12_SUPPORT /* FIXME check / move to rhd_randr.c */
# include "xf86i2c.h" /* this is complete BS, stop using unnamed structs! */
# include "xf86Crtc.h"
#endif
@@ -158,7 +158,7 @@ struct rhdDri {
drmAddress ring; /* Map */
int ringSizeLog2QW;
- // TODO: what is r/o ring space for (1 page)
+ /* TODO: what is r/o ring space for (1 page) */
unsigned long ringReadOffset; /* Offset into GART space */
drm_handle_t ringReadPtrHandle; /* Handle from drmAddMap */
drmSize ringReadMapSize; /* Size of map */
@@ -890,11 +890,11 @@ static int RHDDRIKernelInit(RHDPtr rhdPtr, ScreenPtr pScreen)
return FALSE;
}
- // FIXME: this is to be moved to rhd_cp
- /* DRM_RADEON_CP_INIT does an engine reset, which resets some engine
- * registers back to their default values, so we need to restore
- * those engine register here. */
-// R5xx2DSetup(pScrn);
+ /* - FIXME: this is to be moved to rhd_cp
+ * - DRM_RADEON_CP_INIT does an engine reset, which resets some engine
+ * registers back to their default values, so we need to restore
+ * those engine register here.
+ * - R5xx2DSetup(pScrn); */
return TRUE;
}
@@ -978,8 +978,8 @@ static void RHDDRIIrqInit(RHDPtr rhdPtr, ScreenPtr pScreen)
"[drm] falling back to irq-free operation\n");
rhdDRI->irq = 0;
} else {
-// FIXME
-// rhdDRI->ModeReg->gen_int_cntl = RHDRegRead (rhdDRI, RADEON_GEN_INT_CNTL );
+/* FIXME
+ rhdDRI->ModeReg->gen_int_cntl = RHDRegRead (rhdDRI, RADEON_GEN_INT_CNTL ); */
}
}
@@ -1118,7 +1118,7 @@ static Bool RHDDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on)
if (on) {
value = DRM_RADEON_VBLANK_CRTC1;
-#ifdef RANDR_12_SUPPORT // FIXME check / move to rhd_randr.c
+#ifdef RANDR_12_SUPPORT /* FIXME check / move to rhd_randr.c */
if (RHDPTR(pScrn)->randr) {
xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
if (xf86_config->num_crtc > 1 && xf86_config->crtc[1]->enabled)
@@ -1671,7 +1671,7 @@ Bool RHDDRICloseScreen(ScreenPtr pScreen)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
RHDPtr rhdPtr = RHDPTR(pScrn);
struct rhdDri *rhdDRI = rhdPtr->dri;
- //drm_radeon_init_t drmInfo;
+ /* drm_radeon_init_t drmInfo; */
drm_radeon_init_t drmInfo;
RHDFUNC(pScrn);
@@ -1680,7 +1680,7 @@ Bool RHDDRICloseScreen(ScreenPtr pScreen)
RHDDRISetVBlankInterrupt (pScrn, FALSE);
drmCtlUninstHandler(rhdDRI->drmFD);
rhdDRI->irq = 0;
-// rhdDRI->ModeReg->gen_int_cntl = 0;
+/* rhdDRI->ModeReg->gen_int_cntl = 0; */
}
/* invalidate GART location for EXA */
@@ -1771,8 +1771,8 @@ static void RHDDRITransitionSingleToMulti3d(ScreenPtr pScreen)
static void RHDDRITransitionMultiToSingle3d(ScreenPtr pScreen)
{
- /* Let the remaining 3d app start page flipping again */
-// RHDEnablePageFlip(pScreen);
+ /* Let the remaining 3d app start page flipping again
+ * RHDEnablePageFlip(pScreen); */
}
static void RHDDRITransitionTo3d(ScreenPtr pScreen)
@@ -1781,8 +1781,8 @@ static void RHDDRITransitionTo3d(ScreenPtr pScreen)
struct rhdDri *rhdDRI = RHDPTR(pScrn)->dri;
rhdDRI->have3Dwindows = TRUE;
-// RHDChangeSurfaces(pScrn); // FIXME needed for tiling
-// RHDEnablePageFlip(pScreen);
+/* RHDChangeSurfaces(pScrn); *//* FIXME needed for tiling */
+/* RHDEnablePageFlip(pScreen); */
RHDDRISetVBlankInterrupt(pScrn, TRUE);
}
@@ -1807,7 +1807,7 @@ static void RHDDRITransitionTo2d(ScreenPtr pScreen)
"[dri] RHDDRITransitionTo2d: "
"kernel failed to unflip buffers.\n");
}
-// RHDChangeSurfaces(pScrn);
+/* RHDChangeSurfaces(pScrn); */
RHDDRISetVBlankInterrupt(pScrn, FALSE);
}
@@ -1914,7 +1914,7 @@ RHDDRMCPBuffer(int scrnIndex)
int ret = drmDMA(Dri->drmFD, &dma);
if (!ret) {
buf = &Dri->buffers->list[indx];
- //xf86DrvMsg(scrnIndex, X_INFO, "%s: index %d, addr %p\n", __func__, buf->idx, buf->address);
+ /* xf86DrvMsg(scrnIndex, X_INFO, "%s: index %d, addr %p\n", __func__, buf->idx, buf->address); */
buf->used = 0;
return buf;
} else if (ret != -16)
diff --git a/src/rhd_driver.c b/src/rhd_driver.c
index ab9cb9a..e971415 100644
--- a/src/rhd_driver.c
+++ b/src/rhd_driver.c
@@ -1077,7 +1077,9 @@ RHDScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
ScrnInfoPtr pScrn;
RHDPtr rhdPtr;
VisualPtr visual;
+#ifndef XSERVER_LIBPCIACCESS
unsigned int racflag = 0;
+#endif
#ifdef USE_DRI
Bool DriScreenInited = FALSE;
#endif
diff --git a/src/rhd_id.c b/src/rhd_id.c
index 36bd2b2..d3188ef 100644
--- a/src/rhd_id.c
+++ b/src/rhd_id.c
@@ -248,7 +248,7 @@ const PCI_ID_LIST = {
RHD_DEVICE_MATCH( 0x944B, RHD_M98 ), /* ATI MOBILITY RADEON HD 4850 X2 */
RHD_DEVICE_MATCH( 0x944C, RHD_RV770 ), /* ATI RADEON HD 4800 Series */
RHD_DEVICE_MATCH( 0x944E, RHD_RV770 ), /* RV770 */
-// RHD_DEVICE_MATCH( 0x944F, RHD_R700 ), /* R700 */
+/* RHD_DEVICE_MATCH( 0x944F, RHD_R700 ), *//* R700 */
RHD_DEVICE_MATCH( 0x9450, RHD_RV770 ), /* AMD FireStream 9270 */
RHD_DEVICE_MATCH( 0x9452, RHD_RV770 ), /* AMD FireStream 9250 */
RHD_DEVICE_MATCH( 0x9456, RHD_RV770 ), /* Denali ATI FirePro Graphics Accelerator */
diff --git a/utils/conntest/rhd_conntest.c b/utils/conntest/rhd_conntest.c
index cd47635..c7ecd41 100644
--- a/utils/conntest/rhd_conntest.c
+++ b/utils/conntest/rhd_conntest.c
@@ -1224,7 +1224,7 @@ R6xxI2CSetupStatus(void *map, int channel)
static Bool
R6xxI2CStatus(void *map)
{
- int count = 800;
+ unsigned int count = 800;
CARD32 val = 0;
while (--count) {
@@ -1402,7 +1402,7 @@ enum _rhdRS69I2CBits {
static Bool
RS69I2CStatus(void *map)
{
- int count = 2000;
+ unsigned int count = 2000;
volatile CARD32 val;
while (--count) {
@@ -1949,7 +1949,7 @@ enum rv620I2CBits {
static Bool
RV620I2CStatus(void *map)
{
- int count = 50;
+ unsigned int count = 50;
volatile CARD32 val;
while (--count) {
--
1.6.0.2
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