Anton Aylward wrote:
James Knott said the following on 01/15/2012 09:37 AM:
I have worked at the machine level on several types of CPU and never seen such a "loop counter". On the other hand, a general purpose register that could handle that function, among many others has been part of every one and would be essential in any useful computer, unless all operations were performed in memory. "Part" being the operative word. Not all machines had all registers as 'general purpose' as the old 404, 8080 and z-80 demonstrated.
Yes, the series/360 and the PDP-11 and their look-alikes the Z-8000 and z-80000 had all programmer accessible registers "general purpose (except when they were 'stacked' or aliased to floating point), but there were many exceptions. Such general purpose registers banks are incredibly compiler-friendly.
The Motorola 68000, the basis of the original SUN machines, had four general purpose registers and four dedicated memory pointer registers. You calculated an address and moved it to the memory pointer. Wasn't the the old Z-80 like that?
The NS 32032 (and its 16 bit predecessor) was compiler friendly but in another way because of the way its dedicated regisrter were set. Some runtime models hand parameters via the stack frame, the same stack frame used for call-return. The 32032 had a dedicated frame pointer, dedicated stack pointer and dedicated opcode pointer - prehaps more, I forget - as well as its computational frame. The stack and frame were handled automatically.
Machines of the 40s, 50 and 60s were not 'compiler friendly' because we hadn't developed language technology and because that was the era when hardware was more expensive than programmers. In England single register machines were the norm, perhaps with an overflow register. The military also had many very peculiar architectures that when described sound like RISK but actually were not since the opcodes interacted with memory (which was also expensive) in peculiar ways. I recall one ALGOL-60 complier that fit in 4K of 18-but words (one opcode to a word) which was mind-boggling.
In the '70s I build, using the old AMD 2900-series bit slice micro-programmable chips, a number of of odd architectures that, for example, replaces magnetic logic arrays. Much, much lighter!
The only CPU that I can think of that didn't have some sort of register for such operations was (IIRC) the Texas Instruments 9900 series which did everything in memory locations. CPUs such as the 6800 and 6502 did a lot in special memory locations, but still had an accumulator. the Data General Eclipse line also used the AMD bit slice processor. However, those chips (there were 4 of them in the Eclipse) formed only the ALU of the CPU. There was a lot of external logic, including microcode & registers, to make them function. An Eclipse CPU consisted of two 15" square boards. Back when I was a computer tech maintaining those systems, I used to work right down to the microcode level. Over the years, I have worked with systems from Data General, DEC, Collins and Pr1me. I have also worked with 8080, 6502, 6809 and 8088 microprocessors and the Datapoint 2200 intelligent terminal which had an 8008 CPU built from discrete logic, as the Intel 8008 performance wasn't good enough. The first computer I worked on was the "Bid Ask" system in the Toronto Stock Exchange. It was built with vacuum tubes, relays and a memory drum and even it had registers, though not in the sense we see today. In it, each dual flip flop module had 4 vacuum tubes. http://ed-thelen.org/comp-hist/BRL61-t.html#TELEREGISTER-MAGNETRONIC-BID-ASK... That system was older than me, when I was working on it. -- To unsubscribe, e-mail: opensuse+unsubscribe@opensuse.org To contact the owner, e-mail: opensuse+owner@opensuse.org