Re: [radeonhd] [PATCH] LUT: reduce number of writes to DC_LUT_RW_INDEX and properly barrier (was: Mucked up colours on HD2400 with weird behaviour)

On 26/03/2009, at 6:22 PM, Yang Zhao wrote:

2009/3/25 Michael Cree :

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On 26/03/2009, at 3:56 PM, Yang Zhao wrote:

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Proper patch for incorrect LUT writing when out-of-order execution is used. Also reduces the overall number of writes to DC_LUT_RW_INDEX.

I suggest holding off applying the patch as the proper fix is to fix the RHDRegRead and RHDRegWrite routines to work for all architectures.

Are the MMIO routines in compiler.h always barriered for Alpha?

Yes, they include barriers for a number of architectures, not just Alpha. They also include byte swapping for big-endian architectures. That is the point of them - they provide a portable means of accessing the IO ports. Michael. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org