Hello community,
here is the log from the commit of package xorg-x11-driver-video-radeonhd
checked in at Sun Mar 30 12:09:23 CEST 2008.
--------
--- xorg-x11-driver-video-radeonhd/xorg-x11-driver-video-radeonhd.changes 2008-03-20 17:43:33.000000000 +0100
+++ /mounts/work_src_done/STABLE/xorg-x11-driver-video-radeonhd/xorg-x11-driver-video-radeonhd.changes 2008-03-27 17:36:21.309343000 +0100
@@ -1,0 +2,5 @@
+Thu Mar 27 17:40:33 CET 2008 - sndirsch(a)suse.de
+
+- updated to current git version 1623f86
+
+-------------------------------------------------------------------
Old:
----
xf86-video-radeonhd-1.1.0_080320_96f3633.tar.bz2
New:
----
xf86-video-radeonhd-1.1.0_080327_1623f86.tar.bz2
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ xorg-x11-driver-video-radeonhd.spec ++++++
--- /var/tmp/diff_new_pack.KG5678/_old 2008-03-30 12:09:18.000000000 +0200
+++ /var/tmp/diff_new_pack.KG5678/_new 2008-03-30 12:09:18.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package xorg-x11-driver-video-radeonhd (Version 1.1.0_080320_96f3633)
+# spec file for package xorg-x11-driver-video-radeonhd (Version 1.1.0_080327_1623f86)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -36,7 +36,7 @@
Group: System/X11/Servers/XF86_4
%endif
AutoReqProv: on
-Version: 1.1.0_080320_96f3633
+Version: 1.1.0_080327_1623f86
Release: 1
Summary: Driver for AMD GPG (ATI) r5xx/r6xx Chipsets
%if 0%{?suse_version}
@@ -185,6 +185,8 @@
%endif
%changelog
+* Thu Mar 27 2008 sndirsch(a)suse.de
+- updated to current git version 1623f86
* Thu Mar 20 2008 sndirsch(a)suse.de
- updated to current git version 96f3633, which fixes driver for
imake based builds like it's used for SLES10
++++++ xf86-video-radeonhd-1.1.0_080320_96f3633.tar.bz2 -> xf86-video-radeonhd-1.1.0_080327_1623f86.tar.bz2 ++++++
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/aclocal.m4 new/xf86-video-radeonhd-1.1.0/aclocal.m4
--- old/xf86-video-radeonhd-1.1.0/aclocal.m4 2008-03-13 19:06:28.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/aclocal.m4 2008-03-27 17:26:40.000000000 +0100
@@ -6858,7 +6858,7 @@
XORG_MACROS_needed_major=`echo $XORG_MACROS_needed_version | sed 's/\..*$//'`
XORG_MACROS_needed_minor=`echo $XORG_MACROS_needed_version | sed -e 's/^[0-9]*\.//' -e 's/\..*$//'`]
AC_MSG_CHECKING([if xorg-macros used to generate configure is at least ${XORG_MACROS_needed_major}.${XORG_MACROS_needed_minor}])
- [XORG_MACROS_version=1.1.5
+ [XORG_MACROS_version=1.1.6
XORG_MACROS_major=`echo $XORG_MACROS_version | sed 's/\..*$//'`
XORG_MACROS_minor=`echo $XORG_MACROS_version | sed -e 's/^[0-9]*\.//' -e 's/\..*$//'`]
if test $XORG_MACROS_major -ne $XORG_MACROS_needed_major ; then
@@ -7007,7 +7007,11 @@
XORG_SGML_PATH=$prefix/share/sgml
HAVE_DEFS_ENT=
-AC_CHECK_FILE([$XORG_SGML_PATH/X11/defs.ent], [HAVE_DEFS_ENT=yes])
+if test x"$cross_compiling" = x"yes" ; then
+ HAVE_DEFS_ENT=no
+else
+ AC_CHECK_FILE([$XORG_SGML_PATH/X11/defs.ent], [HAVE_DEFS_ENT=yes])
+fi
AC_PATH_PROG(LINUXDOC, linuxdoc)
AC_PATH_PROG(PS2PDF, ps2pdf)
@@ -7328,14 +7332,14 @@
AC_DEFINE_UNQUOTED([PACKAGE_VERSION_MAJOR],
[`echo $PACKAGE_VERSION | cut -d . -f 1`],
[Major version of this package])
- PVM=`echo $PACKAGE_VERSION | cut -d . -f 2`
+ PVM=`echo $PACKAGE_VERSION | cut -d . -f 2 | cut -d - -f 1`
if test "x$PVM" = "x"; then
PVM="0"
fi
AC_DEFINE_UNQUOTED([PACKAGE_VERSION_MINOR],
[$PVM],
[Minor version of this package])
- PVP=`echo $PACKAGE_VERSION | cut -d . -f 3`
+ PVP=`echo $PACKAGE_VERSION | cut -d . -f 3 | cut -d - -f 1`
if test "x$PVP" = "x"; then
PVP="0"
fi
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/ChangeLog new/xf86-video-radeonhd-1.1.0/ChangeLog
--- old/xf86-video-radeonhd-1.1.0/ChangeLog 2008-03-20 17:39:29.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/ChangeLog 2008-03-27 17:32:44.000000000 +0100
@@ -1,3 +1,91 @@
+commit 1623f86f0834e7c13a89682983729b70348512b2
+Author: Stefan Dirsch <sndirsch(a)suse.de>
+Date: Thu Mar 27 17:49:01 2008 +0100
+
+ Added missing rhd_ddia.c/rhd_ddia.o to Imakefile.
+
+commit 186c345cad07fb4eb626707f40a2c444fc5d8bc7
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Thu Mar 27 07:34:30 2008 +0100
+
+ Print output name for sensed type.
+
+commit d7d63b25d264f0838c497a79e38059506ccdc814
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Wed Mar 26 22:50:43 2008 +0100
+
+ Print sensed type also for RandR.
+
+commit 6d628f5658512cb73fd04dda85f5672736e80080
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Wed Mar 26 21:10:31 2008 +0100
+
+ Make debugging output of HPD verbose about the result.
+
+commit 811b0cd66958e32bddcbbca7656893de160b2de8
+Author: Matthias Hopf <mhopf(a)suse.de>
+Date: Tue Mar 25 17:25:14 2008 +0100
+
+ Added quirk table entry for a different Sapphire X1300
+
+commit 89cfb7384b1e34c1de88d3b32ff6202b9ecda287
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Mon Mar 24 23:07:08 2008 +0100
+
+ Add support for RS690 DDIA digital block.
+
+ This will support the second digital output on many RS690 boards.
+
+commit b6418a97bfc448ecd6e15c548bcdeb8af8967619
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Mon Mar 24 09:34:18 2008 +0100
+
+ Add debugging aids.
+
+ The RHDReg??D() functions can be used to print out the register
+ values read/written. When RHD_DEBUG isn't define they will be
+ identical to the versions without the 'D'.
+
+commit c8ad2599d54fa855b4cdf234c6c560301afeebf4
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Mon Mar 24 18:28:55 2008 +0100
+
+ Reset CRTC horizontal counter replication.
+
+ Appearantly this should only be set for 30bpp DVI modes.
+
+commit bd11d76aab42354403dff1bffd5f89dc86c3ecc7
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Mon Mar 24 16:23:08 2008 +0100
+
+ Handle AtomBIOS TMDS PLL parameters correctly.
+
+ NOTE: This code is not used so far but support for this
+ will be added later.
+
+commit 806d95361c11068a078c85db2891c3802a106f9d
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Mon Mar 24 13:57:44 2008 +0100
+
+ HDMI Type B connector is dual link capable.
+
+commit ae3171b9621b54ecacc2a10a133c435f2e380152
+Author: Egbert Eich <eich(a)freedesktop.org>
+Date: Mon Mar 24 13:43:40 2008 +0100
+
+ Add TMDS PLL macro control values for M54 (0x7145).
+
+ Bug #15132, reported by Veli-Jussi Raitila.
+
+commit 19a6eb464a5f988a700259c85042350d67d66ea3
+Author: Stefan Dirsch <sndirsch(a)suse.de>
+Date: Fri Mar 21 11:35:13 2008 +0100
+
+ Chipset name review.
+
+ Added Device ID for Radeon HD 3850 AGP. Fixed typo in Device
+ ID for ATI FireMV 2450.
+
commit 96f36339e2b6dbe60efafc6a150a561111aaf844
Author: Stefan Dirsch <sndirsch(a)suse.de>
Date: Thu Mar 20 17:54:57 2008 +0100
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/configure new/xf86-video-radeonhd-1.1.0/configure
--- old/xf86-video-radeonhd-1.1.0/configure 2008-03-13 19:06:30.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/configure 2008-03-27 17:26:42.000000000 +0100
@@ -22590,7 +22590,7 @@
#define PACKAGE_VERSION_MAJOR `echo $PACKAGE_VERSION | cut -d . -f 1`
_ACEOF
- PVM=`echo $PACKAGE_VERSION | cut -d . -f 2`
+ PVM=`echo $PACKAGE_VERSION | cut -d . -f 2 | cut -d - -f 1`
if test "x$PVM" = "x"; then
PVM="0"
fi
@@ -22599,7 +22599,7 @@
#define PACKAGE_VERSION_MINOR $PVM
_ACEOF
- PVP=`echo $PACKAGE_VERSION | cut -d . -f 3`
+ PVP=`echo $PACKAGE_VERSION | cut -d . -f 3 | cut -d - -f 1`
if test "x$PVP" = "x"; then
PVP="0"
fi
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/git_version.h new/xf86-video-radeonhd-1.1.0/src/git_version.h
--- old/xf86-video-radeonhd-1.1.0/src/git_version.h 2008-03-20 17:39:32.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/git_version.h 2008-03-27 17:32:47.000000000 +0100
@@ -14,13 +14,13 @@
/* git utilities found */
#undef GIT_NOT_FOUND
-#define GIT_VERSION "git version 1.5.3.8"
+#define GIT_VERSION "git version 1.5.4.4"
/* git repo found */
#define GIT_REPO 1
/* Git SHA ID of last commit */
-#define GIT_SHAID "96f36339"
+#define GIT_SHAID "1623f86f"
/* Branch this tree is on */
#define GIT_BRANCH "master"
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/Imakefile new/xf86-video-radeonhd-1.1.0/src/Imakefile
--- old/xf86-video-radeonhd-1.1.0/src/Imakefile 2008-03-20 17:28:42.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/Imakefile 2008-03-27 17:06:00.000000000 +0100
@@ -26,6 +26,7 @@
rhd_cursor.c \
rhd_dac.c \
rhd_dig.c \
+rhd_ddia.c \
rhd_driver.c \
rhd_edid.c \
rhd_helper.c \
@@ -54,6 +55,7 @@
rhd_cursor.o \
rhd_dac.o \
rhd_dig.o \
+rhd_ddia.o \
rhd_driver.o \
rhd_edid.o \
rhd_helper.o \
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/Makefile.am new/xf86-video-radeonhd-1.1.0/src/Makefile.am
--- old/xf86-video-radeonhd-1.1.0/src/Makefile.am 2008-03-13 08:26:05.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/Makefile.am 2008-03-27 16:26:01.000000000 +0100
@@ -33,6 +33,7 @@
rhd_shadow.c \
rhd_randr.c \
rhd_dig.c \
+ rhd_ddia.c \
rhd_atombios.h \
rhd.h \
rhd_i2c.h \
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/Makefile.in new/xf86-video-radeonhd-1.1.0/src/Makefile.in
--- old/xf86-video-radeonhd-1.1.0/src/Makefile.in 2008-03-13 19:06:32.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/Makefile.in 2008-03-27 17:26:44.000000000 +0100
@@ -84,12 +84,13 @@
rhd_connector.c rhd_cursor.c rhd_dac.c rhd_driver.c rhd_edid.c \
rhd_helper.c rhd_id.c rhd_lut.c rhd_lvtma.c rhd_modes.c \
rhd_monitor.c rhd_output.c rhd_pll.c rhd_tmds.c rhd_vga.c \
- rhd_mc.c rhd_shadow.c rhd_randr.c rhd_dig.c rhd_atombios.h \
- rhd.h rhd_i2c.h rhd_card.h rhd_crtc.h rhd_connector.h \
- rhd_cursor.h rhd_lut.h rhd_modes.h rhd_monitor.h rhd_output.h \
- rhd_pll.h rhd_randr.h rhd_regs.h rhd_vga.h rhd_shadow.h \
- rhd_mc.h r5xx_accel.c r5xx_accel.h r5xx_xaa.c r5xx_2dregs.h \
- r5xx_exa.c AtomBios/includes/atombios.h rhd_atomwrapper.h
+ rhd_mc.c rhd_shadow.c rhd_randr.c rhd_dig.c rhd_ddia.c \
+ rhd_atombios.h rhd.h rhd_i2c.h rhd_card.h rhd_crtc.h \
+ rhd_connector.h rhd_cursor.h rhd_lut.h rhd_modes.h \
+ rhd_monitor.h rhd_output.h rhd_pll.h rhd_randr.h rhd_regs.h \
+ rhd_vga.h rhd_shadow.h rhd_mc.h r5xx_accel.c r5xx_accel.h \
+ r5xx_xaa.c r5xx_2dregs.h r5xx_exa.c \
+ AtomBios/includes/atombios.h rhd_atomwrapper.h
@USE_EXA_TRUE@am__objects_1 = radeonhd_drv_la-r5xx_exa.lo
am__objects_2 =
am_radeonhd_drv_la_OBJECTS = radeonhd_drv_la-rhd_atombios.lo \
@@ -103,9 +104,9 @@
radeonhd_drv_la-rhd_pll.lo radeonhd_drv_la-rhd_tmds.lo \
radeonhd_drv_la-rhd_vga.lo radeonhd_drv_la-rhd_mc.lo \
radeonhd_drv_la-rhd_shadow.lo radeonhd_drv_la-rhd_randr.lo \
- radeonhd_drv_la-rhd_dig.lo radeonhd_drv_la-r5xx_accel.lo \
- radeonhd_drv_la-r5xx_xaa.lo $(am__objects_1) $(am__objects_2) \
- $(am__objects_2)
+ radeonhd_drv_la-rhd_dig.lo radeonhd_drv_la-rhd_ddia.lo \
+ radeonhd_drv_la-r5xx_accel.lo radeonhd_drv_la-r5xx_xaa.lo \
+ $(am__objects_1) $(am__objects_2) $(am__objects_2)
nodist_radeonhd_drv_la_OBJECTS =
radeonhd_drv_la_OBJECTS = $(am_radeonhd_drv_la_OBJECTS) \
$(nodist_radeonhd_drv_la_OBJECTS)
@@ -282,12 +283,13 @@
rhd_connector.c rhd_cursor.c rhd_dac.c rhd_driver.c rhd_edid.c \
rhd_helper.c rhd_id.c rhd_lut.c rhd_lvtma.c rhd_modes.c \
rhd_monitor.c rhd_output.c rhd_pll.c rhd_tmds.c rhd_vga.c \
- rhd_mc.c rhd_shadow.c rhd_randr.c rhd_dig.c rhd_atombios.h \
- rhd.h rhd_i2c.h rhd_card.h rhd_crtc.h rhd_connector.h \
- rhd_cursor.h rhd_lut.h rhd_modes.h rhd_monitor.h rhd_output.h \
- rhd_pll.h rhd_randr.h rhd_regs.h rhd_vga.h rhd_shadow.h \
- rhd_mc.h r5xx_accel.c r5xx_accel.h r5xx_xaa.c r5xx_2dregs.h \
- $(am__append_1) $(am__append_2) $(am__append_3)
+ rhd_mc.c rhd_shadow.c rhd_randr.c rhd_dig.c rhd_ddia.c \
+ rhd_atombios.h rhd.h rhd_i2c.h rhd_card.h rhd_crtc.h \
+ rhd_connector.h rhd_cursor.h rhd_lut.h rhd_modes.h \
+ rhd_monitor.h rhd_output.h rhd_pll.h rhd_randr.h rhd_regs.h \
+ rhd_vga.h rhd_shadow.h rhd_mc.h r5xx_accel.c r5xx_accel.h \
+ r5xx_xaa.c r5xx_2dregs.h $(am__append_1) $(am__append_2) \
+ $(am__append_3)
nodist_radeonhd_drv_la_SOURCES = \
git_version.h
@@ -406,6 +408,7 @@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_crtc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_cursor.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_dac.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_ddia.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_dig.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_driver.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/radeonhd_drv_la-rhd_edid.Plo@am__quote@
@@ -627,6 +630,13 @@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(radeonhd_drv_la_CFLAGS) $(CFLAGS) -c -o radeonhd_drv_la-rhd_dig.lo `test -f 'rhd_dig.c' || echo '$(srcdir)/'`rhd_dig.c
+radeonhd_drv_la-rhd_ddia.lo: rhd_ddia.c
+@am__fastdepCC_TRUE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(radeonhd_drv_la_CFLAGS) $(CFLAGS) -MT radeonhd_drv_la-rhd_ddia.lo -MD -MP -MF $(DEPDIR)/radeonhd_drv_la-rhd_ddia.Tpo -c -o radeonhd_drv_la-rhd_ddia.lo `test -f 'rhd_ddia.c' || echo '$(srcdir)/'`rhd_ddia.c
+@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/radeonhd_drv_la-rhd_ddia.Tpo $(DEPDIR)/radeonhd_drv_la-rhd_ddia.Plo
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='rhd_ddia.c' object='radeonhd_drv_la-rhd_ddia.lo' libtool=yes @AMDEPBACKSLASH@
+@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
+@am__fastdepCC_FALSE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(radeonhd_drv_la_CFLAGS) $(CFLAGS) -c -o radeonhd_drv_la-rhd_ddia.lo `test -f 'rhd_ddia.c' || echo '$(srcdir)/'`rhd_ddia.c
+
radeonhd_drv_la-r5xx_accel.lo: r5xx_accel.c
@am__fastdepCC_TRUE@ $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(radeonhd_drv_la_CFLAGS) $(CFLAGS) -MT radeonhd_drv_la-r5xx_accel.lo -MD -MP -MF $(DEPDIR)/radeonhd_drv_la-r5xx_accel.Tpo -c -o radeonhd_drv_la-r5xx_accel.lo `test -f 'r5xx_accel.c' || echo '$(srcdir)/'`r5xx_accel.c
@am__fastdepCC_TRUE@ mv -f $(DEPDIR)/radeonhd_drv_la-r5xx_accel.Tpo $(DEPDIR)/radeonhd_drv_la-r5xx_accel.Plo
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_atombios.c new/xf86-video-radeonhd-1.1.0/src/rhd_atombios.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_atombios.c 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_atombios.c 2008-03-27 16:26:01.000000000 +0100
@@ -115,6 +115,9 @@
static AtomBiosResult
rhdAtomCompassionateDataQuery(atomBiosHandlePtr handle,
AtomBiosRequestID func, AtomBiosArgPtr data);
+static AtomBiosResult
+rhdAtomIntegratedSystemInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data);
enum msgDataFormat {
@@ -167,8 +170,8 @@
"Start of VRAM area used by Firmware", MSG_FORMAT_HEX},
{GET_FW_FB_SIZE, rhdAtomVramInfoQuery,
"Framebuffer space used by Firmware (kb)", MSG_FORMAT_DEC},
- {ATOM_TMDS_FREQUENCY, rhdAtomTmdsInfoQuery,
- "TMDS Frequency", MSG_FORMAT_DEC},
+ {ATOM_TMDS_MAX_FREQUENCY, rhdAtomTmdsInfoQuery,
+ "TMDS Max Frequency", MSG_FORMAT_DEC},
{ATOM_TMDS_PLL_CHARGE_PUMP, rhdAtomTmdsInfoQuery,
"TMDS PLL ChargePump", MSG_FORMAT_DEC},
{ATOM_TMDS_PLL_DUTY_CYCLE, rhdAtomTmdsInfoQuery,
@@ -223,6 +226,10 @@
"Analog TV Supported Modes", MSG_FORMAT_HEX},
{ATOM_GET_CONDITIONAL_GOLDEN_SETTINGS, rhdAtomGetConditionalGoldenSetting,
"Conditional Golden Settings", MSG_FORMAT_NONE},
+ {ATOM_GET_PCIENB_CFG_REG7, rhdAtomIntegratedSystemInfoQuery,
+ "PCIE NB Cfg7Reg", MSG_FORMAT_HEX},
+ {ATOM_GET_CAPABILITY_FLAG, rhdAtomIntegratedSystemInfoQuery,
+ "CapabilityFlag", MSG_FORMAT_HEX},
{FUNC_END, NULL,
NULL, MSG_FORMAT_NONE}
};
@@ -937,7 +944,7 @@
{
atomDataTablesPtr atomDataPtr;
CARD32 *val = &data->val;
- int idx = *val;
+ int i = 0, clock = *val;
atomDataPtr = handle->atomDataPtr;
if (!rhdAtomGetTableRevisionAndSize(
@@ -948,25 +955,38 @@
RHDFUNC(handle);
- switch (func) {
- case ATOM_TMDS_FREQUENCY:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].usFrequency;
- break;
- case ATOM_TMDS_PLL_CHARGE_PUMP:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_ChargePump;
- break;
- case ATOM_TMDS_PLL_DUTY_CYCLE:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_DutyCycle;
- break;
- case ATOM_TMDS_PLL_VCO_GAIN:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_VCO_Gain;
- break;
- case ATOM_TMDS_PLL_VOLTAGE_SWING:
- *val = atomDataPtr->TMDS_Info->asMiscInfo[idx].ucPLL_VoltageSwing;
- break;
- default:
- return ATOM_NOT_IMPLEMENTED;
+ if (func == ATOM_TMDS_MAX_FREQUENCY)
+ *val = atomDataPtr->TMDS_Info->usMaxFrequency * 10;
+ else {
+ if (clock > atomDataPtr->TMDS_Info->usMaxFrequency * 10)
+ return ATOM_FAILED;
+
+ for (;i < ATOM_MAX_MISC_INFO; i++) {
+ if (clock < atomDataPtr->TMDS_Info->asMiscInfo[i].usFrequency * 10) {
+ switch (func) {
+ case ATOM_TMDS_PLL_CHARGE_PUMP:
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[i].ucPLL_ChargePump;
+ break;
+ case ATOM_TMDS_PLL_DUTY_CYCLE:
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[i].ucPLL_DutyCycle;
+ break;
+ case ATOM_TMDS_PLL_VCO_GAIN:
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[i].ucPLL_VCO_Gain;
+ break;
+ case ATOM_TMDS_PLL_VOLTAGE_SWING:
+ *val = atomDataPtr->TMDS_Info->asMiscInfo[i].ucPLL_VoltageSwing;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ break;
+ }
+ }
}
+
+ if (i > ATOM_MAX_MISC_INFO)
+ return ATOM_FAILED;
+
return ATOM_SUCCESS;
}
@@ -1321,6 +1341,47 @@
return ATOM_SUCCESS;
}
+static AtomBiosResult
+rhdAtomIntegratedSystemInfoQuery(atomBiosHandlePtr handle,
+ AtomBiosRequestID func, AtomBiosArgPtr data)
+{
+ atomDataTablesPtr atomDataPtr;
+ CARD8 crev, frev;
+ CARD32 *val = &data->val;
+
+ RHDFUNC(handle);
+
+ atomDataPtr = handle->atomDataPtr;
+
+ if (!rhdAtomGetTableRevisionAndSize(
+ (ATOM_COMMON_TABLE_HEADER *)(atomDataPtr->IntegratedSystemInfo.base),
+ &frev,&crev,NULL)) {
+ return ATOM_FAILED;
+ }
+
+ switch (crev) {
+ case 1:
+ switch (func) {
+ case ATOM_GET_PCIENB_CFG_REG7:
+ *val = atomDataPtr->IntegratedSystemInfo.IntegratedSystemInfo->usPCIENBCfgReg7;
+ break;
+ case ATOM_GET_CAPABILITY_FLAG:
+ *val = atomDataPtr->IntegratedSystemInfo.IntegratedSystemInfo->usCapabilityFlag;
+ break;
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ break;
+ case 2:
+ switch (func) {
+ default:
+ return ATOM_NOT_IMPLEMENTED;
+ }
+ break;
+ }
+ return ATOM_SUCCESS;
+}
+
static DisplayModePtr
rhdAtomAnalogTVTimings(atomBiosHandlePtr handle,
ATOM_ANALOG_TV_INFO *tv_info,
@@ -1721,6 +1782,11 @@
xf86DrvMsg(handle->scrnIndex,X_ERROR,"%s: %s %i exceeds maximum %i\n", \
__func__,name,n,max), TRUE) : FALSE)
+enum rhdChipKind {
+ RHD_CHIP_EXTERNAL = 0,
+ RHD_CHIP_IGP = 1
+};
+
static const struct _rhd_connector_objs
{
char *name;
@@ -1739,7 +1805,7 @@
{ "9PIN_DIN", RHD_CONNECTOR_NONE },
{ "SCART", RHD_CONNECTOR_TV },
{ "HDMI_TYPE_A", RHD_CONNECTOR_DVI_SINGLE },
- { "HDMI_TYPE_B", RHD_CONNECTOR_DVI_SINGLE },
+ { "HDMI_TYPE_B", RHD_CONNECTOR_DVI },
{ "LVDS", RHD_CONNECTOR_PANEL },
{ "7PIN_DIN", RHD_CONNECTOR_TV },
{ "PCIE_CONNECTOR", RHD_CONNECTOR_NONE },
@@ -1752,7 +1818,7 @@
static const struct _rhd_encoders
{
char *name;
- rhdOutputType ot[2];
+ rhdOutputType ot[2]; /* { RHD_CHIP_EXTERNAL, RHD_CHIP_IGP } */
} rhd_encoders[] = {
{ "NONE", {RHD_OUTPUT_NONE, RHD_OUTPUT_NONE }},
{ "INTERNAL_LVDS", { RHD_OUTPUT_LVDS, RHD_OUTPUT_NONE }},
@@ -1816,18 +1882,18 @@
static const struct _rhd_devices
{
char *name;
- rhdOutputType ot;
+ rhdOutputType ot[2];
} rhd_devices[] = {
- {" CRT1", RHD_OUTPUT_NONE },
- {" LCD1", RHD_OUTPUT_LVTMA },
- {" TV1", RHD_OUTPUT_NONE },
- {" DFP1", RHD_OUTPUT_TMDSA },
- {" CRT2", RHD_OUTPUT_NONE },
- {" LCD2", RHD_OUTPUT_LVTMA },
- {" TV2", RHD_OUTPUT_NONE },
- {" DFP2", RHD_OUTPUT_LVTMA },
- {" CV", RHD_OUTPUT_NONE },
- {" DFP3", RHD_OUTPUT_LVTMA }
+ {" CRT1", { RHD_OUTPUT_NONE, RHD_OUTPUT_NONE } },
+ {" LCD1", { RHD_OUTPUT_LVTMA, RHD_OUTPUT_LVTMA } },
+ {" TV1", { RHD_OUTPUT_NONE, RHD_OUTPUT_NONE } },
+ {" DFP1", { RHD_OUTPUT_TMDSA, RHD_OUTPUT_NONE } },
+ {" CRT2", { RHD_OUTPUT_NONE, RHD_OUTPUT_NONE } },
+ {" LCD2", { RHD_OUTPUT_LVTMA, RHD_OUTPUT_NONE } },
+ {" TV2", { RHD_OUTPUT_NONE, RHD_OUTPUT_NONE } },
+ {" DFP2", { RHD_OUTPUT_LVTMA, RHD_OUTPUT_DVO } },
+ {" CV", { RHD_OUTPUT_NONE, RHD_OUTPUT_NONE } },
+ {" DFP3", { RHD_OUTPUT_LVTMA, RHD_OUTPUT_LVTMA } }
};
static const int n_rhd_devices = sizeof(rhd_devices) / sizeof(struct _rhd_devices);
@@ -2197,6 +2263,7 @@
*/
static AtomBiosResult
rhdAtomConnectorInfoFromSupportedDevices(atomBiosHandlePtr handle,
+ enum rhdChipKind kind,
rhdConnectorInfoPtr *ptr)
{
atomDataTablesPtr atomDataPtr;
@@ -2264,7 +2331,7 @@
if ((devices[n].ot
= acc_dac[ci.sucConnectorInfo.sbfAccess.bfAssociatedDAC])
== RHD_OUTPUT_NONE) {
- devices[n].ot = rhd_devices[n].ot;
+ devices[n].ot = rhd_devices[n].ot[kind];
}
} else
devices[n].ot = RHD_OUTPUT_NONE;
@@ -2385,18 +2452,37 @@
/*
*
*/
+enum rhdChipKind
+rhdAtomGetChipKind(enum RHD_CHIPSETS chipset)
+{
+ switch (chipset) {
+ case RHD_RS600:
+ case RHD_RS690:
+ case RHD_RS740:
+ return RHD_CHIP_IGP;
+ default:
+ return RHD_CHIP_EXTERNAL;
+ }
+}
+
+/*
+ *
+ */
static AtomBiosResult
rhdAtomConnectorInfo(atomBiosHandlePtr handle,
AtomBiosRequestID unused, AtomBiosArgPtr data)
{
+ int chipset = data->chipset;
data->connectorInfo = NULL;
if (rhdAtomConnectorInfoFromObjectHeader(handle,&data->connectorInfo)
== ATOM_SUCCESS)
return ATOM_SUCCESS;
- else
- return rhdAtomConnectorInfoFromSupportedDevices(handle,
+ else {
+ enum rhdChipKind kind = rhdAtomGetChipKind(chipset);
+ return rhdAtomConnectorInfoFromSupportedDevices(handle, kind,
&data->connectorInfo);
+ }
}
struct atomCodeDataTableHeader
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_atombios.h new/xf86-video-radeonhd-1.1.0/src/rhd_atombios.h
--- old/xf86-video-radeonhd-1.1.0/src/rhd_atombios.h 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_atombios.h 2008-03-27 16:26:01.000000000 +0100
@@ -50,7 +50,7 @@
GET_REF_CLOCK,
GET_FW_FB_START,
GET_FW_FB_SIZE,
- ATOM_TMDS_FREQUENCY,
+ ATOM_TMDS_MAX_FREQUENCY,
ATOM_TMDS_PLL_CHARGE_PUMP,
ATOM_TMDS_PLL_DUTY_CYCLE,
ATOM_TMDS_PLL_VCO_GAIN,
@@ -79,6 +79,8 @@
ATOM_ANALOG_TV_DEFAULT_MODE,
ATOM_ANALOG_TV_SUPPORTED_MODES,
ATOM_GET_CONDITIONAL_GOLDEN_SETTINGS,
+ ATOM_GET_PCIENB_CFG_REG7,
+ ATOM_GET_CAPABILITY_FLAG,
FUNC_END
} AtomBiosRequestID;
@@ -122,6 +124,7 @@
{
CARD32 val;
struct rhdConnectorInfo *connectorInfo;
+ enum RHD_CHIPSETS chipset;
struct AtomGoldenSettings GoldenSettings;
unsigned char* EDIDBlock;
struct {
@@ -193,10 +196,8 @@
Bool coherent;
};
-Bool
-rhdAtomDigTransmitterControl(atomBiosHandlePtr handle, enum atomTransmitter id,
- enum atomTransmitterAction action, struct atomTransmitterConfig *config);
-
+Bool rhdAtomDigTransmitterControl(atomBiosHandlePtr handle, enum atomTransmitter id,
+ enum atomTransmitterAction action, struct atomTransmitterConfig *config);
# endif
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_connector.c new/xf86-video-radeonhd-1.1.0/src/rhd_connector.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_connector.c 2008-03-13 08:26:05.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_connector.c 2008-03-27 16:26:01.000000000 +0100
@@ -116,7 +116,14 @@
static Bool
RHDHPDCheck(struct rhdConnector *Connector)
{
- return (RHDRegRead(Connector, DC_GPIO_HPD_Y) & Connector->HPDMask);
+ Bool ret;
+
+ RHDFUNC(Connector);
+
+ ret = (RHDRegRead(Connector, DC_GPIO_HPD_Y) & Connector->HPDMask);
+ RHDDebug(Connector->scrnIndex, "%s returned: %x\n",__func__,ret);
+
+ return ret;
}
struct rhdCsState {
@@ -210,6 +217,7 @@
AtomBiosArgRec data;
AtomBiosResult result;
+ data.chipset = rhdPtr->ChipSet;
result = RHDAtomBiosFunc(rhdPtr->scrnIndex, rhdPtr->atomBIOS,
ATOMBIOS_GET_CONNECTORS, &data);
if (result == ATOM_SUCCESS) {
@@ -323,6 +331,11 @@
Output = RHDLVTMAInit(rhdPtr, ConnectorInfo[i].Type);
RHDOutputAdd(rhdPtr, Output);
break;
+ case RHD_OUTPUT_DVO:
+ Output = RHDDDIAInit(rhdPtr, ConnectorInfo[i].Type);
+ if (Output)
+ RHDOutputAdd(rhdPtr, Output);
+ break;
case RHD_OUTPUT_KLDSKP_LVTMA:
case RHD_OUTPUT_UNIPHYA:
case RHD_OUTPUT_UNIPHYB:
@@ -416,8 +429,8 @@
const char *output_name[] =
{ "RHD_OUTPUT_NONE", "RHD_OUTPUT_DACA", "RHD_OUTPUT_DACB", "RHD_OUTPUT_TMDSA",
- "RHD_OUTPUT_LVTMA", "RHD_OUTPUT_KLDSKP_LVTMA", "RHD_OUTPUT_UNIPHYA", "RHD_OUTPUT_UNIPHYB"
- };
+ "RHD_OUTPUT_LVTMA", "RHD_OUTPUT_DVO", "RHD_OUTPUT_KLDSKP_LVTMA",
+ "RHD_OUTPUT_UNIPHYA", "RHD_OUTPUT_UNIPHYB" };
const char **hpd_name;
switch (rhdPtr->hpdUsage) {
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_crtc.c new/xf86-video-radeonhd-1.1.0/src/rhd_crtc.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_crtc.c 2008-03-13 08:26:05.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_crtc.c 2008-03-27 16:26:01.000000000 +0100
@@ -90,6 +90,7 @@
CARD32 CrtcVSyncACntl;
CARD32 CrtcVSyncB;
CARD32 CrtcVSyncBCntl;
+ CARD32 CrtcCountControl;
CARD32 CrtcBlackColor;
CARD32 CrtcBlankControl;
@@ -343,6 +344,9 @@
(Mode->CrtcVSyncEnd - Mode->CrtcVSyncStart) << 16);
RHDRegWrite(Crtc, RegOff + D1CRTC_V_SYNC_A_CNTL, Mode->Flags & V_NVSYNC);
+ /* set D1CRTC_HORZ_COUNT_BY2_EN to 0; should only be set to 1 on 30bpp DVI modes */
+ RHDRegMask(Crtc, RegOff + D1CRTC_COUNT_CONTROL, 0x0, 0x1);
+
Crtc->CurrentMode = Mode;
}
@@ -727,6 +731,10 @@
Store->CrtcBlackColor = RHDRegRead(Crtc, RegOff + D1CRTC_BLACK_COLOR);
Store->CrtcBlankControl = RHDRegRead(Crtc, RegOff + D1CRTC_BLANK_CONTROL);
+ Store->CrtcCountControl = RHDRegRead(Crtc, RegOff + D1CRTC_COUNT_CONTROL);
+ RHDDebug(Crtc->scrnIndex, "Saved CrtcCountControl[%i] = 0x%8.8x\n",
+ Crtc->Id,Store->CrtcCountControl);
+
if (Crtc->Id == RHD_CRTC_1)
Store->CrtcPCLKControl = RHDRegRead(Crtc, PCLK_CRTC1_CNTL);
else
@@ -824,6 +832,8 @@
RHDRegWrite(Crtc, RegOff + D1CRTC_BLACK_COLOR, Store->CrtcBlackColor);
RHDRegWrite(Crtc, RegOff + D1CRTC_BLANK_CONTROL, Store->CrtcBlankControl);
+ RHDRegWrite(Crtc, RegOff + D1CRTC_COUNT_CONTROL, Store->CrtcCountControl);
+
if (Crtc->Id == RHD_CRTC_1)
RHDRegWrite(Crtc, PCLK_CRTC1_CNTL, Store->CrtcPCLKControl);
else
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_ddia.c new/xf86-video-radeonhd-1.1.0/src/rhd_ddia.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_ddia.c 1970-01-01 01:00:00.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_ddia.c 2008-03-27 16:26:01.000000000 +0100
@@ -0,0 +1,379 @@
+/*
+ * Copyright 2007, 2008 Luc Verhaegen <lverhaegen(a)novell.com>
+ * Copyright 2007, 2008 Matthias Hopf <mhopf(a)novell.com>
+ * Copyright 2007, 2008 Egbert Eich <eich(a)novell.com>
+ * Copyright 2007, 2008 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "xf86.h"
+
+/* for usleep */
+#if HAVE_XF86_ANSIC_H
+# include "xf86_ansic.h"
+#else
+# include <unistd.h>
+#endif
+
+#include "rhd.h"
+#include "rhd_crtc.h"
+#include "rhd_connector.h"
+#include "rhd_output.h"
+#include "rhd_regs.h"
+#include "rhd_card.h"
+#ifdef ATOM_BIOS
+#include "rhd_atombios.h"
+#endif
+
+struct DDIAPrivate
+{
+ Bool RunDualLink;
+ CARD32 PcieCfgReg7;
+ CARD32 CapabilityFlag;
+
+ Bool Stored;
+
+ CARD32 DdiaPathControl;
+ CARD32 DdiaCntl;
+ CARD32 DdiaDcbalancerControl;
+ CARD32 DdiaPcieLinkControl2;
+ CARD32 DdiaBitDepthControl;
+};
+
+/*
+ *
+ */
+static ModeStatus
+DDIAModeValid(struct rhdOutput *Output, DisplayModePtr Mode)
+{
+ RHDFUNC(Output);
+
+ if (Mode->Clock < 25000)
+ return MODE_CLOCK_LOW;
+
+ if (Output->Connector->Type == RHD_CONNECTOR_DVI_SINGLE) {
+ if (Mode->Clock > 165000)
+ return MODE_CLOCK_HIGH;
+ } else if (Output->Connector->Type == RHD_CONNECTOR_DVI) {
+ if (Mode->Clock > 330000) /* could go higher still */
+ return MODE_CLOCK_HIGH;
+ }
+
+ return MODE_OK;
+}
+
+/*
+ *
+ */
+static void
+DDIAMode(struct rhdOutput *Output, DisplayModePtr Mode)
+{
+ struct DDIAPrivate *Private = (struct DDIAPrivate *)Output->Private;
+ CARD32 mux0, mux1, mux2, mux3;
+ Bool LaneReversal;
+ RHDPtr rhdPtr = RHDPTRI(Output);
+
+ RHDFUNC(Output);
+
+ if (Mode->SynthClock >= 165000)
+ Private->RunDualLink = TRUE;
+ else
+ Private->RunDualLink = FALSE;
+
+ /* reset on - will be enabled at POWER_ON */
+ RHDRegMask(Output, RS69_DDIA_PATH_CONTROL, RS69_DDIA_PIXVLD_RESET, RS69_DDIA_PIXVLD_RESET);
+ /* RGB 4:4:4 */
+ RHDRegMask(Output, RS69_DDIA_CNTL, 0, RS69_DDIA_PIXEL_ENCODING);
+ /* TMDS_AC */
+ RHDRegMask(Output, RS69_DDIA_PATH_CONTROL,
+ 2 << RS69_DDIA_PATH_SELECT_SHIFT,
+ 0x3 << RS69_DDIA_PATH_SELECT_SHIFT);
+ /* dual link */
+ RHDRegMask(Output, RS69_DDIA_CNTL, Private->RunDualLink ?
+ RS69_DDIA_DUAL_LINK_ENABLE : 0, RS69_DDIA_DUAL_LINK_ENABLE);
+ RHDRegMask(Output, RS69_DDIA_DCBALANCER_CONTROL,
+ RS69_DDIA_DCBALANCER_EN,
+ RS69_DDIA_DCBALANCER_EN);
+
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x0, 0x80);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x0, 0x100);
+
+ mux0 = Private->PcieCfgReg7 & 0x3;
+ mux1 = (Private->PcieCfgReg7 >> 2) & 0x3;
+ mux2 = (Private->PcieCfgReg7 >> 4) & 0x3;
+ mux3 = (Private->PcieCfgReg7 >> 6) & 0x3;
+
+ RHDRegMask(Output, RS69_DDIA_PCIE_LINK_CONTROL2,
+ (mux0 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL0)
+ | (mux1 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL1)
+ | (mux2 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL2)
+ | (mux3 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL3),
+ (3 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL0)
+ | (3 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL1)
+ | (3 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL2)
+ | (3 << RS69_DDIA_PCIE_OUTPUT_MUX_SEL3)
+ );
+ LaneReversal = Private->PcieCfgReg7 & (0x1 << 10);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x0, 0x3);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x2, 0x2);
+
+ RHDRegMask(Output, RS69_DDIA_PCIE_LINK_CONTROL3,
+ LaneReversal ? RS69_DDIA_PCIE_MIRROR_EN : 0,
+ RS69_DDIA_PCIE_MIRROR_EN);
+
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x70, 0x70);
+
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0, 0x10);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0, 0x60);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0, 0x4000000);
+
+ switch (rhdPtr->PciDeviceID) {
+ case 0x791E:
+ if (Mode->SynthClock <= 25000) {
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x2780, 0x3f80);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0, 0xc000);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x039f0000, 0x03000000 | 0x039f0000);
+ } else if (Mode->SynthClock <= 60000) {
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x2780, 0x3f80);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0, 0xc000);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x024f0000, 0x03000000 | 0x024f0000);
+ } else {
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0980, 0x3f80);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0, 0xc000);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x01270000, 0x03000000 | 0x01270000);
+ }
+ break;
+ case 0x791F:
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0980, 0x3f80);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x4000, 0xc000);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x00ac0000, 0x03000000 | 0x00ac0000);
+ if (Private->CapabilityFlag & 0x10) {
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0, 0xc000);
+ if (Mode->SynthClock <= 6500)
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x01ac0000, 0x03ff0000);
+ else
+ RHDRegMaskD(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x01110000, 0x03ff0000);
+ }
+ break;
+ }
+ usleep (1);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x04000000, 0x04000000);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x60, 0x60);
+ usleep(30);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x01, 0x01);
+ usleep(1);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x02, 0x02);
+ usleep(1);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x04, 0x04);
+ usleep(1);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x08, 0x08);
+ usleep(1);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x10, 0x10);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL1, 0x0, 0xf);
+
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x0180, 0x0180);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x600, 0x600);
+ usleep(5);
+ RHDRegMask(Output, RS69_DDIA_PCIE_PHY_CONTROL2, 0x0, 0x600);
+
+ /* hw reset will be turned off at POWER_ON */
+}
+
+/*
+ *
+ */
+static void
+DDIAPower(struct rhdOutput *Output, int Power)
+{
+ RHDFUNC(Output);
+
+ switch (Power) {
+ case RHD_POWER_ON:
+ RHDRegMask(Output, RS69_DDIA_PATH_CONTROL, RS69_DDIA_PIXVLD_RESET,
+ RS69_DDIA_PIXVLD_RESET);
+ RHDRegWrite(Output, RS69_DDIA_BIT_DEPTH_CONTROL, 0);
+ RHDRegMask(Output, RS69_DDIA_BIT_DEPTH_CONTROL,
+ RS69_DDIA_TEMPORAL_DITHER_RESET, RS69_DDIA_TEMPORAL_DITHER_RESET);
+ RHDRegMask(Output, RS69_DDIA_BIT_DEPTH_CONTROL,
+ 0, RS69_DDIA_TEMPORAL_DITHER_RESET);
+ RHDRegMask(Output, RS69_DDIA_CNTL, RS69_DDIA_ENABLE, RS69_DDIA_ENABLE);
+ RHDRegMask(Output, RS69_DDIA_PATH_CONTROL, 0, RS69_DDIA_PIXVLD_RESET);
+ return;
+ case RHD_POWER_RESET:
+ RHDRegMask(Output, RS69_DDIA_CNTL, 0, RS69_DDIA_ENABLE);
+ return;
+ case RHD_POWER_SHUTDOWN:
+ RHDRegMask(Output, RS69_DDIA_BIT_DEPTH_CONTROL,
+ RS69_DDIA_TEMPORAL_DITHER_RESET, RS69_DDIA_TEMPORAL_DITHER_RESET);
+ RHDRegMask(Output, RS69_DDIA_BIT_DEPTH_CONTROL,
+ 0, RS69_DDIA_TEMPORAL_DITHER_RESET);
+ RHDRegMask(Output, RS69_DDIA_BIT_DEPTH_CONTROL,
+ 0,
+ RS69_DDIA_TRUNCATE_EN
+ | RS69_DDIA_TRUNCATE_DEPTH
+ | RS69_DDIA_SPATIAL_DITHER_EN
+ | RS69_DDIA_SPATIAL_DITHER_DEPTH);
+ RHDRegMask(Output, RS69_DDIA_BIT_DEPTH_CONTROL,
+ 0,
+ RS69_DDIA_TEMPORAL_DITHER_EN
+ | RS69_DDIA_TEMPORAL_DITHER_EN
+ | RS69_DDIA_TEMPORAL_DITHER_DEPTH
+ | RS69_DDIA_TEMPORAL_LEVEL);
+ RHDRegMask(Output, RS69_DDIA_CNTL, 0, RS69_DDIA_ENABLE);
+ return;
+ default:
+ return;
+ }
+}
+
+/*
+ *
+ */
+static void
+DDIASave(struct rhdOutput *Output)
+{
+ struct DDIAPrivate *Private = (struct DDIAPrivate *)Output->Private;
+
+ RHDFUNC(Output);
+
+ Private->DdiaPathControl = RHDRegRead(Output, RS69_DDIA_PATH_CONTROL);
+ Private->DdiaCntl = RHDRegRead(Output, RS69_DDIA_CNTL);
+ Private->DdiaDcbalancerControl = RHDRegRead(Output, RS69_DDIA_DCBALANCER_CONTROL);
+ Private->DdiaPcieLinkControl2 = RHDRegRead(Output, RS69_DDIA_PCIE_LINK_CONTROL2);
+ Private->DdiaBitDepthControl = RHDRegRead(Output, RS69_DDIA_BIT_DEPTH_CONTROL);
+
+ Private->Stored = TRUE;
+}
+
+/*
+ *
+ */
+static void
+DDIARestore(struct rhdOutput *Output)
+{
+ struct DDIAPrivate *Private = (struct DDIAPrivate *)Output->Private;
+ RHDFUNC(Output);
+
+ if (!Private->Stored)
+ return;
+
+ /* disalbe */
+ RHDRegMask(Output, RS69_DDIA_CNTL, 0, RS69_DDIA_ENABLE);
+ /* reset on */
+ RHDRegMask(Output, RS69_DDIA_PATH_CONTROL, RS69_DDIA_PIXVLD_RESET, RS69_DDIA_PIXVLD_RESET);
+ RHDRegWrite(Output, RS69_DDIA_PATH_CONTROL, Private->DdiaPathControl | RS69_DDIA_PIXVLD_RESET);
+
+ RHDRegWrite(Output, RS69_DDIA_BIT_DEPTH_CONTROL, Private->DdiaBitDepthControl);
+ /* temporal dither reset on */
+ RHDRegWrite(Output, RS69_DDIA_BIT_DEPTH_CONTROL, Private->DdiaBitDepthControl
+ | RS69_DDIA_TEMPORAL_DITHER_RESET);
+ /* temporal dither reset off */
+ RHDRegWrite(Output, RS69_DDIA_BIT_DEPTH_CONTROL, Private->DdiaBitDepthControl);
+
+ RHDRegWrite(Output, RS69_DDIA_DCBALANCER_CONTROL, Private->DdiaDcbalancerControl);
+ RHDRegWrite(Output, RS69_DDIA_PCIE_LINK_CONTROL2, Private->DdiaPcieLinkControl2);
+ /* enable if enabled at startup */
+ RHDRegWrite(Output, RS69_DDIA_CNTL, Private->DdiaCntl);
+ /* reset off */
+ RHDRegWrite(Output, RS69_DDIA_PATH_CONTROL, Private->DdiaPathControl);
+}
+
+/*
+ *
+ */
+static void
+DDIADestroy(struct rhdOutput *Output)
+{
+ struct DDIAPrivate *Private = (struct DDIAPrivate *)Output->Private;
+
+ RHDFUNC(Output);
+
+ xfree(Private);
+ Output->Private = NULL;
+}
+
+/*
+ *
+ */
+struct rhdOutput *
+RHDDDIAInit(RHDPtr rhdPtr, enum rhdOutputType outputType)
+{
+#ifdef ATOM_BIOS
+ struct rhdOutput *Output;
+ struct DDIAPrivate *Private;
+ AtomBiosArgRec data;
+
+
+ /*
+ * This needs to be handled separately
+ * for now we only deal with it here.
+ */
+ if (rhdPtr->ChipSet != RHD_RS690)
+ return FALSE;
+
+ Output = xnfcalloc(sizeof(struct rhdOutput), 1);
+
+ Output->Name = "DDIA";
+
+ Output->scrnIndex = rhdPtr->scrnIndex;
+ Output->Id = outputType;
+
+ Output->Sense = NULL;
+ Output->ModeValid = DDIAModeValid;
+ Output->Mode = DDIAMode;
+ Output->Power = DDIAPower;
+ Output->Save = DDIASave;
+ Output->Restore = DDIARestore;
+ Output->Destroy = DDIADestroy;
+
+ Private = xnfcalloc(1, sizeof(struct DDIAPrivate));
+ Output->Private = Private;
+ Private->Stored = FALSE;
+
+ if (RHDAtomBiosFunc(rhdPtr->scrnIndex, rhdPtr->atomBIOS,
+ ATOM_GET_PCIENB_CFG_REG7, &data) == ATOM_SUCCESS) {
+ Private->PcieCfgReg7 = data.val;
+ } else {
+ xf86DrvMsg(Output->scrnIndex, X_ERROR, "Retrieval of PCIE MUX values failed. "
+ "no DDIA block support available\n");
+ goto error;
+ }
+ if (RHDAtomBiosFunc(rhdPtr->scrnIndex, rhdPtr->atomBIOS,
+ ATOM_GET_CAPABILITY_FLAG, &data) == ATOM_SUCCESS) {
+ Private->CapabilityFlag = data.val;
+ } else {
+ xf86DrvMsg(Output->scrnIndex, X_ERROR, "Retrieval of Capability flag failed. "
+ "no DDIA block support available\n");
+ goto error;
+ }
+
+ return Output;
+error:
+ xfree(Private);
+ return NULL;
+
+#else
+ return NULL;
+#endif
+}
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_dig.c new/xf86-video-radeonhd-1.1.0/src/rhd_dig.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_dig.c 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_dig.c 2008-03-27 17:29:18.000000000 +0100
@@ -1001,7 +1001,7 @@
#endif
case RHD_OUTPUT_KLDSKP_LVTMA:
- Output->Name = "UNIPHY_KLDSK_LVTMA";
+ Output->Name = "UNIPHY_KLDSKP_LVTMA";
Private->EncoderID = ENCODER_DIG2;
Private->Transmitter.Private =
(struct LVTMATransmitterPrivate *)xnfcalloc(sizeof (struct LVTMATransmitterPrivate), 1);
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_driver.c new/xf86-video-radeonhd-1.1.0/src/rhd_driver.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_driver.c 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_driver.c 2008-03-27 16:26:01.000000000 +0100
@@ -2080,6 +2080,43 @@
_RHDRegWrite(scrnIndex, offset, tmp);
}
+#ifdef RHD_DEBUG
+/*
+ *
+ */
+CARD32
+_RHDRegReadD(int scrnIndex, CARD16 offset)
+{
+ CARD32 tmp = *(volatile CARD32 *)((CARD8 *) RHDPTR(xf86Screens[scrnIndex])->MMIOBase + offset);
+ xf86DrvMsg(scrnIndex, X_INFO, "RHDRegRead(0x%4.4x) = 0x%4.4x\n",offset,tmp);
+ return tmp;
+}
+
+/*
+ *
+ */
+void
+_RHDRegWriteD(int scrnIndex, CARD16 offset, CARD32 value)
+{
+ xf86DrvMsg(scrnIndex, X_INFO, "RHDRegWrite(0x%4.4x,0x%4.4x)\n",offset,tmp);
+ *(volatile CARD32 *)((CARD8 *) RHDPTR(xf86Screens[scrnIndex])->MMIOBase + offset) = value;
+}
+
+/*
+ *
+ */
+void
+_RHDRegMaskD(int scrnIndex, CARD16 offset, CARD32 value, CARD32 mask)
+{
+ CARD32 tmp;
+
+ tmp = _RHDRegReadD(scrnIndex, offset);
+ tmp &= ~mask;
+ tmp |= (value & mask);
+ _RHDRegWriteD(scrnIndex, offset, tmp);
+}
+#endif /* RHD_DEBUG */
+
/* The following two are R5XX only. R6XX doesn't require these */
CARD32
_RHDReadMC(int scrnIndex, CARD32 addr)
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd.h new/xf86-video-radeonhd-1.1.0/src/rhd.h
--- old/xf86-video-radeonhd-1.1.0/src/rhd.h 2008-03-13 08:26:05.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd.h 2008-03-27 16:26:01.000000000 +0100
@@ -321,9 +321,19 @@
#define RHDFUNC(ptr) RHDDebug((ptr)->scrnIndex, "FUNCTION: %s\n", __func__)
#define RHDFUNCI(scrnIndex) RHDDebug(scrnIndex, "FUNCTION: %s\n", __func__)
void RhdDebugDump(int scrnIndex, unsigned char *start, int size);
+
#ifdef RHD_DEBUG
+CARD32 _RHDRegReadD(int scrnIndex, CARD16 offset);
+# define RHDRegReadD(ptr, offset) _RHDRegReadD((ptr)->scrnIndex, (offset))
+void _RHDRegWriteD(int scrnIndex, CARD16 offset, CARD32 value);
+# define RHDRegWriteD(ptr, offset, value) _RHDRegWriteD((ptr)->scrnIndex, (offset), (value))
+void _RHDRegMaskD(int scrnIndex, CARD16 offset, CARD32 value, CARD32 mask);
+# define RHDRegMaskD(ptr, offset, value, mask) _RHDRegMaskD((ptr)->scrnIndex, (offset), (value), (mask))
# define DEBUGP(x) {x;}
#else
+# define RHDRegReadD(ptr, offset) RHDRegRead(ptr, offset)
+# define RHDRegWriteD(ptr, offset, value) RHDRegWrite(ptr, offset, value)
+# define RHDRegMaskD(ptr, offset, value, mask) RHDRegMask(ptr, offset, value, mask)
# define DEBUGP(x)
#endif
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_id.c new/xf86-video-radeonhd-1.1.0/src/rhd_id.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_id.c 2008-03-20 17:26:58.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_id.c 2008-03-27 16:26:01.000000000 +0100
@@ -223,13 +223,14 @@
RHD_DEVICE_MATCH( 0x94C8, RHD_M74 ), /* Mobility Radeon HD 2400 XT */
RHD_DEVICE_MATCH( 0x94C9, RHD_M72 ), /* Mobility Radeon HD 2400 */
RHD_DEVICE_MATCH( 0x94CB, RHD_M72 ), /* ATI RADEON E2400 */
- RHD_DEVICE_MATCH( 0x94CC, RHD_RV610 ), /* RV610 */
+ RHD_DEVICE_MATCH( 0x94CC, RHD_RV610 ), /* ATI Radeon HD 2400 */
RHD_DEVICE_MATCH( 0x9500, RHD_RV670 ), /* RV670 */
RHD_DEVICE_MATCH( 0x9501, RHD_RV670 ), /* ATI Radeon HD3870 */
RHD_DEVICE_MATCH( 0x9505, RHD_RV670 ), /* ATI Radeon HD3850 */
RHD_DEVICE_MATCH( 0x9507, RHD_RV670 ), /* RV670 */
RHD_DEVICE_MATCH( 0x950F, RHD_R680 ), /* ATI Radeon HD3870 X2 */
RHD_DEVICE_MATCH( 0x9511, RHD_RV670 ), /* ATI FireGL V7700 */
+ RHD_DEVICE_MATCH( 0x9515, RHD_RV670 ), /* ATI Radeon HD 3850 AGP */
RHD_DEVICE_MATCH( 0x9580, RHD_RV630 ), /* RV630 */
RHD_DEVICE_MATCH( 0x9581, RHD_M76 ), /* Mobility Radeon HD 2600 */
RHD_DEVICE_MATCH( 0x9583, RHD_M76 ), /* Mobility Radeon HD 2600 XT */
@@ -244,7 +245,7 @@
RHD_DEVICE_MATCH( 0x958E, RHD_RV630 ), /* ATI Radeon HD 2600 LE */
RHD_DEVICE_MATCH( 0x9590, RHD_RV635 ), /* ATI Radeon HD 3600 Series */
RHD_DEVICE_MATCH( 0x9591, RHD_RV635 ), /* ATI Mobility Radeon HD 3650 */
- RHD_DEVICE_MATCH( 0x9596, RHD_RV635 ), /* ATI Radeon HD 3600 Series */
+ RHD_DEVICE_MATCH( 0x9596, RHD_RV635 ), /* ATI Radeon HD 3650 AGP */
RHD_DEVICE_MATCH( 0x9597, RHD_RV635 ), /* ATI Radeon HD 3600 Series */
RHD_DEVICE_MATCH( 0x9598, RHD_RV635 ), /* ATI Radeon HD 3670 */
RHD_DEVICE_MATCH( 0x9599, RHD_RV635 ), /* ATI Radeon HD 3600 Series */
@@ -253,9 +254,9 @@
RHD_DEVICE_MATCH( 0x95C4, RHD_M82 ), /* ATI Mobility Radeon HD 3400 Series (M82) */
RHD_DEVICE_MATCH( 0x95C5, RHD_RV620 ), /* ATI Radeon HD 3450 */
RHD_DEVICE_MATCH( 0x95C7, RHD_RV620 ), /* ATI Radeon HD 3430 */
- RHD_DEVICE_MATCH( 0x95CE, RHD_RV620 ), /* ATI FireMV 2450 */
- RHD_DEVICE_MATCH( 0x95CE, RHD_RV620 ), /* ATI FireMV 2460 */
- RHD_DEVICE_MATCH( 0x95CF, RHD_RV620 ), /* ATI FireMV 2460 */
+ RHD_DEVICE_MATCH( 0x95CD, RHD_RV620 ), /* ATI FireMV 2450 */
+ RHD_DEVICE_MATCH( 0x95CE, RHD_RV620 ), /* ATI FireMV 2260 */
+ RHD_DEVICE_MATCH( 0x95CF, RHD_RV620 ), /* ATI FireMV 2260 */
LIST_END
};
@@ -501,6 +502,7 @@
{ 0x7145, 0x17AA, 0x202A, "Lenovo Thinkpad Z61m", RHD_CARD_FLAG_NONE, PANEL_B2_VGA_A0 },
/* 0x7146 : RV515 : Radeon X1300/X1550 */
{ 0x7146, 0x174B, 0x0470, "Sapphire X1300", RHD_CARD_FLAG_NONE, VGA_B1_DVI_AB01 },
+ { 0x7146, 0x174B, 0x0920, "Sapphire X1300", RHD_CARD_FLAG_HPDSWAP, ID_CONNECTORINFO_EMPTY },
/* 0x7147 : RV505 : Radeon X1550 64-bit */
{ 0x7147, 0x174B, 0x0840, "Sapphire X1550", RHD_CARD_FLAG_HPDSWAP, ID_CONNECTORINFO_EMPTY },
/* 0x7149 : M52 : Mobility Radeon X1300 */
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_lvtma.c new/xf86-video-radeonhd-1.1.0/src/rhd_lvtma.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_lvtma.c 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_lvtma.c 2008-03-27 16:26:01.000000000 +0100
@@ -478,7 +478,7 @@
{
AtomBiosArgRec data;
- if(RHDAtomBiosFunc(rhdPtr->scrnIndex, rhdPtr->atomBIOS,
+ if (RHDAtomBiosFunc(rhdPtr->scrnIndex, rhdPtr->atomBIOS,
ATOM_LVDS_SEQ_DIG_ONTO_DE, &data) == ATOM_SUCCESS)
Private->PowerDigToDE = data.val;
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_output.c new/xf86-video-radeonhd-1.1.0/src/rhd_output.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_output.c 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_output.c 2008-03-27 17:29:18.000000000 +0100
@@ -189,7 +189,8 @@
while (list[i].name) {
if (list[i].type == Output->SensedType) {
xf86DrvMsgVerb(Output->scrnIndex, X_INFO, 3,
- "Sensed Output: %s\n",list[i].name);
+ "%s: Sensed Output: %s\n",Output->Name,
+ list[i].name);
return;
}
i++;
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_output.h new/xf86-video-radeonhd-1.1.0/src/rhd_output.h
--- old/xf86-video-radeonhd-1.1.0/src/rhd_output.h 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_output.h 2008-03-27 16:26:01.000000000 +0100
@@ -34,6 +34,7 @@
RHD_OUTPUT_DACB,
RHD_OUTPUT_TMDSA,
RHD_OUTPUT_LVTMA,
+ RHD_OUTPUT_DVO,
RHD_OUTPUT_KLDSKP_LVTMA,
RHD_OUTPUT_UNIPHYA,
RHD_OUTPUT_UNIPHYB,
@@ -99,4 +100,5 @@
struct rhdOutput *RHDTMDSAInit(RHDPtr rhdPtr);
struct rhdOutput *RHDLVTMAInit(RHDPtr rhdPtr, CARD8 Type);
struct rhdOutput *RHDDIGInit(RHDPtr rhdPtr, enum rhdOutputType outputType, CARD8 ConnectorType);
+struct rhdOutput *RHDDDIAInit(RHDPtr rhdPtr, enum rhdOutputType outputType);
#endif /* _RHD_OUTPUT_H */
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_randr.c new/xf86-video-radeonhd-1.1.0/src/rhd_randr.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_randr.c 2008-03-13 08:26:05.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_randr.c 2008-03-27 16:26:01.000000000 +0100
@@ -772,6 +772,7 @@
if ((rout->Output->SensedType
= rout->Output->Sense(rout->Output,
rout->Connector->Type))) {
+ RHDOutputPrintSensedType(rout->Output);
rout->Output->Connector = rout->Connector; /* @@@ */
return XF86OutputStatusConnected;
} else
@@ -790,8 +791,10 @@
o->Output->Sense) {
/* Yes, this looks wrong, but is correct */
if ((o->Output->SensedType =
- o->Output->Sense(o->Output, o->Connector->Type)))
+ o->Output->Sense(o->Output, o->Connector->Type))) {
+ RHDOutputPrintSensedType(o->Output);
return XF86OutputStatusDisconnected;
+ }
}
}
rout->Output->Connector = rout->Connector; /* @@@ */
@@ -811,6 +814,7 @@
= rout->Output->Sense(rout->Output,
rout->Connector->Type))) {
rout->Output->Connector = rout->Connector; /* @@@ */
+ RHDOutputPrintSensedType(rout->Output);
return XF86OutputStatusConnected;
}
}
@@ -824,6 +828,7 @@
if ((rout->Output->SensedType
= rout->Output->Sense(rout->Output, rout->Connector->Type))) {
rout->Output->Connector = rout->Connector; /* @@@ */
+ RHDOutputPrintSensedType(rout->Output);
return XF86OutputStatusConnected;
} else
return XF86OutputStatusDisconnected;
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_regs.h new/xf86-video-radeonhd-1.1.0/src/rhd_regs.h
--- old/xf86-video-radeonhd-1.1.0/src/rhd_regs.h 2008-03-13 08:26:05.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_regs.h 2008-03-27 16:26:01.000000000 +0100
@@ -109,6 +109,7 @@
D1CRTC_BLANK_CONTROL = 0x6084,
D1CRTC_BLACK_COLOR = 0x6098,
D1CRTC_STATUS = 0x609C,
+ D1CRTC_COUNT_CONTROL = 0x60B4,
/* D1GRPH registers */
D1GRPH_ENABLE = 0x6100,
@@ -190,6 +191,7 @@
D2CRTC_BLANK_CONTROL = 0x6884,
D2CRTC_BLACK_COLOR = 0x6898,
D2CRTC_STATUS = 0x689C,
+ D2CRTC_COUNT_CONTROL = 0x68B4,
/* D2GRPH registers */
D2GRPH_ENABLE = 0x6900,
@@ -600,7 +602,72 @@
RS69_DC_I2C_DDC_SETUP_Q = 0x7D44, /* (RW) */
RS69_DC_I2C_DATA = 0x7D58, /* (RW) *//**/
RS69_DC_I2C_TRANSACTION0 = 0x7D48, /* (RW) *//**/
- RS69_DC_I2C_TRANSACTION1 = 0x7D4C /* (RW) *//**/
+ RS69_DC_I2C_TRANSACTION1 = 0x7D4C, /* (RW) *//**/
+ /* DDIA */
+ RS69_DDIA_CNTL = 0x7200,
+ RS69_DDIA_BIT_DEPTH_CONTROL = 0x7214,
+ RS69_DDIA_DCBALANCER_CONTROL = 0x7250,
+ RS69_DDIA_PATH_CONTROL = 0x7264,
+ RS69_DDIA_PCIE_LINK_CONTROL2 = 0x7278,
+ RS69_DDIA_PCIE_LINK_CONTROL3 = 0x727c,
+ RS69_DDIA_PCIE_PHY_CONTROL1 = 0x728c,
+ RS69_DDIA_PCIE_PHY_CONTROL2 = 0x7290
+};
+
+enum RS69_DDIA_CNTL_BITS {
+ RS69_DDIA_ENABLE = 1 << 0,
+ RS69_DDIA_HDMI_EN = 1 << 2,
+ RS69_DDIA_ENABLE_HPD_MASK = 1 << 4,
+ RS69_DDIA_HPD_SELECT = 1 << 8,
+ RS69_DDIA_SYNC_PHASE = 1 << 12,
+ RS69_DDIA_PIXEL_ENCODING = 1 << 16,
+ RS69_DDIA_DUAL_LINK_ENABLE = 1 << 24,
+ RS69_DDIA_SWAP = 1 << 28
+};
+
+enum RS69_DDIA_LINK_CONTROL2_SHIFT {
+ RS69_DDIA_PCIE_OUTPUT_MUX_SEL0 = 0,
+ RS69_DDIA_PCIE_OUTPUT_MUX_SEL1 = 4,
+ RS69_DDIA_PCIE_OUTPUT_MUX_SEL2 = 8,
+ RS69_DDIA_PCIE_OUTPUT_MUX_SEL3 = 12
+};
+
+enum RS69_DDIA_BIT_DEPTH_CONTROL_BITS {
+ RS69_DDIA_TRUNCATE_EN = 1 << 0,
+ RS69_DDIA_TRUNCATE_DEPTH = 1 << 4,
+ RS69_DDIA_SPATIAL_DITHER_EN = 1 << 8,
+ RS69_DDIA_SPATIAL_DITHER_DEPTH = 1 << 12,
+ RS69_DDIA_TEMPORAL_DITHER_EN = 1 << 16,
+ RS69_DDIA_TEMPORAL_DITHER_DEPTH = 1 << 20,
+ RS69_DDIA_TEMPORAL_LEVEL = 1 << 24,
+ RS69_DDIA_TEMPORAL_DITHER_RESET = 1 << 25
+};
+
+enum RS69_DDIA_DCBALANCER_CONTROL_BITS {
+ RS69_DDIA_DCBALANCER_EN = 1 << 0,
+ RS69_DDIA_SYNC_DCBAL_EN = 1 << 4,
+ RS69_DDIA_DCBALANCER_TEST_EN = 1 << 8,
+ RS69_DDIA_DCBALANCER_TEST_IN_SHIFT = 16,
+ RS69_DDIA_DCBALANCER_FORCE = 1 << 24
+};
+
+enum RS69_DDIA_PATH_CONTROL_BITS {
+ RS69_DDIA_PATH_SELECT_SHIFT = 0,
+ RS69_DDIA_DDPII_DE_ALIGN_EN = 1 << 4,
+ RS69_DDIA_DDPII_TRAIN_EN = 1 << 8,
+ RS69_DDIA_DDPII_TRAIN_SELECT = 1 << 12,
+ RS69_DDIA_DDPII_SCRAMBLE_EN = 1 << 16,
+ RS69_DDIA_REPL_MODE_SELECT = 1 << 20,
+ RS69_DDIA_RB_30b_SWAP_EN = 1 << 24,
+ RS69_DDIA_PIXVLD_RESET = 1 << 28,
+ RS69_DDIA_REARRANGER_EN = 1 << 30
+};
+
+enum RS69_DDIA_PCIE_LINK_CONTROL3_BITS {
+ RS69_DDIA_PCIE_MIRROR_EN = 1 << 0,
+ RS69_DDIA_PCIE_CFGDUALLINK = 1 << 4,
+ RS69_DDIA_PCIE_NCHG3EN = 1 << 8,
+ RS69_DDIA_PCIE_RX_PDNB_SHIFT = 12
};
enum RS69_MC_INDEX_BITS {
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/src/rhd_tmds.c new/xf86-video-radeonhd-1.1.0/src/rhd_tmds.c
--- old/xf86-video-radeonhd-1.1.0/src/rhd_tmds.c 2008-03-13 18:55:09.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/src/rhd_tmds.c 2008-03-27 16:26:01.000000000 +0100
@@ -145,6 +145,7 @@
} R5xxTMDSAMacro[] = {
{ 0x7104, 0x00C00414 }, /* R520 */
{ 0x7142, 0x00A00415 }, /* RV515 */
+ { 0x7145, 0x00A00416 }, /* M54 */
{ 0x7146, 0x00C0041F }, /* RV515 */
{ 0x7147, 0x00C00418 }, /* RV505 */
{ 0x7149, 0x00800416 }, /* M56 */
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-radeonhd-1.1.0/utils/conntest/git_version.h new/xf86-video-radeonhd-1.1.0/utils/conntest/git_version.h
--- old/xf86-video-radeonhd-1.1.0/utils/conntest/git_version.h 2008-03-20 17:39:32.000000000 +0100
+++ new/xf86-video-radeonhd-1.1.0/utils/conntest/git_version.h 2008-03-27 17:32:48.000000000 +0100
@@ -14,13 +14,13 @@
/* git utilities found */
#undef GIT_NOT_FOUND
-#define GIT_VERSION "git version 1.5.3.8"
+#define GIT_VERSION "git version 1.5.4.4"
/* git repo found */
#define GIT_REPO 1
/* Git SHA ID of last commit */
-#define GIT_SHAID "96f36339"
+#define GIT_SHAID "1623f86f"
/* Branch this tree is on */
#define GIT_BRANCH "master"
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