Hello community, here is the log from the commit of package xorg-x11-driver-video checked in at Wed Jun 6 01:22:05 CEST 2007. -------- --- xorg-x11-driver-video/xorg-x11-driver-video.changes 2007-06-04 12:48:45.000000000 +0200 +++ /mounts/work_src_done/STABLE/xorg-x11-driver-video/xorg-x11-driver-video.changes 2007-06-05 23:37:51.000000000 +0200 @@ -1,0 +2,9 @@ +Tue Jun 5 23:26:04 CEST 2007 - sndirsch@suse.de + +- updated intel driver to current git (2007-06-05) + * support for 945GME + * support for 965GME/GLE + * support for G33, Q35, Q33 + * bugfixes + +------------------------------------------------------------------- Old: ---- xf86-video-intel-20070603.tar.bz2 New: ---- xf86-video-intel-20070605.tar.bz2 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ xorg-x11-driver-video.spec ++++++ --- /var/tmp/diff_new_pack.u22528/_old 2007-06-06 01:21:48.000000000 +0200 +++ /var/tmp/diff_new_pack.u22528/_new 2007-06-06 01:21:48.000000000 +0200 @@ -15,7 +15,7 @@ BuildRequires: Mesa-devel libdrm-devel pkgconfig xorg-x11-proto-devel xorg-x11-server-sdk URL: http://xorg.freedesktop.org/ Version: 7.2 -Release: 115 +Release: 116 License: X11/MIT BuildRoot: %{_tmppath}/%{name}-%{version}-build Group: System/X11/Servers/XF86_4 @@ -67,7 +67,7 @@ Source42: xf86-video-voodoo-1.1.1.tar.bz2 Source43: xf86-video-impact-0.2.0.tar.bz2 Source44: HALlib-4.1.tar.gz -Source45: xf86-video-intel-20070603.tar.bz2 +Source45: xf86-video-intel-20070605.tar.bz2 Source46: xf86-video-ati.randr12-20070603.tar.bz2 Source48: xf86-video-mga.randr12-20070417.tar.bz2 Patch: xf86-video-intel.diff @@ -263,6 +263,12 @@ %{_mandir}/man4/* %changelog +* Tue Jun 05 2007 - sndirsch@suse.de +- updated intel driver to current git (2007-06-05) + * support for 945GME + * support for 965GME/GLE + * support for G33, Q35, Q33 + * bugfixes * Mon Jun 04 2007 - sndirsch@suse.de - do not overwrite i810 manual page with link to intel manual page * Sun Jun 03 2007 - sndirsch@suse.de ++++++ xf86-video-intel-20070603.tar.bz2 -> xf86-video-intel-20070605.tar.bz2 ++++++ diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/common.h new/xf86-video-intel/src/common.h --- old/xf86-video-intel/src/common.h 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/common.h 2007-06-05 23:20:51.000000000 +0200 @@ -361,6 +361,21 @@ #define PCI_CHIP_I965_GM_BRIDGE 0x2A00 #endif +#ifndef PCI_CHIP_G33_G +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_G33_G_BRIDGE 0x29C0 +#endif + +#ifndef PCI_CHIP_Q35_G +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q35_G_BRIDGE 0x29B0 +#endif + +#ifndef PCI_CHIP_Q33_G +#define PCI_CHIP_Q33_G 0x29D2 +#define PCI_CHIP_Q33_G_BRIDGE 0x29D0 +#endif + #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_E) @@ -378,7 +393,10 @@ #define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM || pI810->PciInfo->chipType == PCI_CHIP_I945_GME) #define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME) #define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ || pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810)) +#define IS_G33CLASS(pI810) (pI810->PciInfo->chipType == PCI_CHIP_G33_G ||\ + pI810->PciInfo->chipType == PCI_CHIP_Q35_G ||\ + pI810->PciInfo->chipType == PCI_CHIP_Q33_G) +#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810)) #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810)) diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i810_driver.c new/xf86-video-intel/src/i810_driver.c --- old/xf86-video-intel/src/i810_driver.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i810_driver.c 2007-06-05 23:20:51.000000000 +0200 @@ -147,6 +147,9 @@ {PCI_CHIP_I946_GZ, "946GZ"}, {PCI_CHIP_I965_GM, "965GM"}, {PCI_CHIP_I965_GME, "965GME/GLE"}, + {PCI_CHIP_G33_G, "G33"}, + {PCI_CHIP_Q35_G, "Q35"}, + {PCI_CHIP_Q33_G, "Q33"}, {-1, NULL} }; @@ -173,6 +176,9 @@ {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, {PCI_CHIP_I965_GME, PCI_CHIP_I965_GME, RES_SHARED_VGA}, + {PCI_CHIP_G33_G, PCI_CHIP_G33_G, RES_SHARED_VGA}, + {PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA}, + {PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED } }; @@ -620,6 +626,9 @@ case PCI_CHIP_I946_GZ: case PCI_CHIP_I965_GM: case PCI_CHIP_I965_GME: + case PCI_CHIP_G33_G: + case PCI_CHIP_Q35_G: + case PCI_CHIP_Q33_G: xf86SetEntitySharable(usedChips[i]); /* Allocate an entity private if necessary */ diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i810_reg.h new/xf86-video-intel/src/i810_reg.h --- old/xf86-video-intel/src/i810_reg.h 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i810_reg.h 2007-06-05 23:20:51.000000000 +0200 @@ -525,6 +525,9 @@ #define PGETBL_SIZE_512KB (0 << 1) #define PGETBL_SIZE_256KB (1 << 1) #define PGETBL_SIZE_128KB (2 << 1) +#define G33_PGETBL_SIZE_MASK (3 << 8) +#define G33_PGETBL_SIZE_1M (1 << 8) +#define G33_PGETBL_SIZE_2M (2 << 8) #define I830_PTE_BASE 0x10000 #define PTE_ADDRESS_MASK 0xfffff000 @@ -2076,12 +2079,12 @@ #define I830_GMCH_MEM_64M 0x1 #define I830_GMCH_MEM_128M 0 -#define I830_GMCH_GMS_MASK 0x70 -#define I830_GMCH_GMS_DISABLED 0x00 +#define I830_GMCH_GMS_MASK 0xF0 +#define I830_GMCH_GMS_DISABLED 0x00 #define I830_GMCH_GMS_LOCAL 0x10 -#define I830_GMCH_GMS_STOLEN_512 0x20 -#define I830_GMCH_GMS_STOLEN_1024 0x30 -#define I830_GMCH_GMS_STOLEN_8192 0x40 +#define I830_GMCH_GMS_STOLEN_512 0x20 +#define I830_GMCH_GMS_STOLEN_1024 0x30 +#define I830_GMCH_GMS_STOLEN_8192 0x40 #define I830_RDRAM_CHANNEL_TYPE 0x03010 #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5) @@ -2096,6 +2099,8 @@ #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) #define I915G_GMCH_GMS_STOLEN_48M (0x6 << 4) #define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4) +#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) +#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) #define I85X_CAPID 0x44 #define I85X_VARIANT_MASK 0x7 diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_common.h new/xf86-video-intel/src/i830_common.h --- old/xf86-video-intel/src/i830_common.h 2007-05-06 12:12:56.000000000 +0200 +++ new/xf86-video-intel/src/i830_common.h 2007-06-05 23:20:51.000000000 +0200 @@ -54,6 +54,7 @@ #define DRM_I830_DESTROY_HEAP 0x0c #define DRM_I830_SET_VBLANK_PIPE 0x0d #define DRM_I830_GET_VBLANK_PIPE 0x0e +#define DRM_I830_HWS_PAGE_ADDR 0x11 typedef struct { @@ -224,4 +225,8 @@ int pipe; } drmI830VBlankPipe; +typedef struct { + uint64_t addr; +} drmI830HWS; + #endif /* _I830_DRM_H_ */ diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_dri.c new/xf86-video-intel/src/i830_dri.c --- old/xf86-video-intel/src/i830_dri.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_dri.c 2007-06-05 23:20:51.000000000 +0200 @@ -232,6 +232,22 @@ return TRUE; } +static Bool +I830SetHWS(ScrnInfoPtr pScrn, int addr) +{ + I830Ptr pI830 = I830PTR(pScrn); + drmI830HWS hws; + + hws.addr = addr; + + if (drmCommandWrite(pI830->drmSubFD, DRM_I830_HWS_PAGE_ADDR, + &hws, sizeof(drmI830HWS))) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "G33 status page initialization Failed\n"); + return FALSE; + } + return TRUE; +} static Bool I830InitVisualConfigs(ScreenPtr pScreen) @@ -933,6 +949,12 @@ return FALSE; } + if (IS_G33CLASS(pI830)) { + if (!I830SetHWS(pScrn, pI830->hw_status->offset)) { + DRICloseScreen(pScreen); + return FALSE; + } + } /* init to zero to be safe */ sarea->front_handle = 0; sarea->back_handle = 0; diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_driver.c new/xf86-video-intel/src/i830_driver.c --- old/xf86-video-intel/src/i830_driver.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_driver.c 2007-06-05 23:20:51.000000000 +0200 @@ -236,6 +236,9 @@ {PCI_CHIP_I946_GZ, "946GZ"}, {PCI_CHIP_I965_GM, "965GM"}, {PCI_CHIP_I965_GME, "965GME/GLE"}, + {PCI_CHIP_G33_G, "G33"}, + {PCI_CHIP_Q35_G, "Q35"}, + {PCI_CHIP_Q33_G, "Q33"}, {-1, NULL} }; @@ -256,6 +259,9 @@ {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA}, {PCI_CHIP_I965_GM, PCI_CHIP_I965_GM, RES_SHARED_VGA}, {PCI_CHIP_I965_GME, PCI_CHIP_I965_GME, RES_SHARED_VGA}, + {PCI_CHIP_G33_G, PCI_CHIP_G33_G, RES_SHARED_VGA}, + {PCI_CHIP_Q35_G, PCI_CHIP_Q35_G, RES_SHARED_VGA}, + {PCI_CHIP_Q33_G, PCI_CHIP_Q33_G, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED} }; @@ -436,6 +442,19 @@ default: FatalError("Unknown GTT size value: %08x\n", (int)INREG(PGETBL_CTL)); } + } else if (IS_G33CLASS(pI830)) { + /* G33's GTT size is detect in GMCH_CTRL */ + switch (gmch_ctrl & G33_PGETBL_SIZE_MASK) { + case G33_PGETBL_SIZE_1M: + gtt_size = 1024; + break; + case G33_PGETBL_SIZE_2M: + gtt_size = 2048; + break; + default: + FatalError("Unknown GTT size value: %08x\n", + (int)(gmch_ctrl & G33_PGETBL_SIZE_MASK)); + } } else { /* Older chipsets only had GTT appropriately sized for the aperture. */ gtt_size = pI830->FbMapSize / (1024*1024); @@ -473,6 +492,14 @@ if (IS_I9XX(pI830)) memsize = MB(64) - KB(range); break; + case G33_GMCH_GMS_STOLEN_128M: + if (IS_G33CLASS(pI830)) + memsize = MB(128) - KB(range); + break; + case G33_GMCH_GMS_STOLEN_256M: + if (IS_G33CLASS(pI830)) + memsize = MB(256) - KB(range); + break; } } else { switch (gmch_ctrl & I830_GMCH_GMS_MASK) { @@ -1076,6 +1103,15 @@ case PCI_CHIP_I965_GME: chipname = "965GME/GLE"; break; + case PCI_CHIP_G33_G: + chipname = "G33"; + break; + case PCI_CHIP_Q35_G: + chipname = "Q35"; + break; + case PCI_CHIP_Q33_G: + chipname = "Q33"; + break; default: chipname = "unknown chipset"; break; @@ -1430,7 +1466,7 @@ else pI830->CursorNeedsPhysical = FALSE; - if (IS_I965G(pI830)) + if (IS_I965G(pI830) || IS_G33CLASS(pI830)) pI830->CursorNeedsPhysical = FALSE; /* diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_exa.c new/xf86-video-intel/src/i830_exa.c --- old/xf86-video-intel/src/i830_exa.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_exa.c 2007-06-05 23:20:51.000000000 +0200 @@ -509,7 +509,7 @@ pI830->EXADriverPtr->Composite = i830_composite; pI830->EXADriverPtr->DoneComposite = i830_done_composite; } else if (IS_I915G(pI830) || IS_I915GM(pI830) || - IS_I945G(pI830) || IS_I945GM(pI830)) + IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) { pI830->EXADriverPtr->CheckComposite = i915_check_composite; pI830->EXADriverPtr->PrepareComposite = i915_prepare_composite; diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830.h new/xf86-video-intel/src/i830.h --- old/xf86-video-intel/src/i830.h 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830.h 2007-06-05 23:20:51.000000000 +0200 @@ -319,6 +319,7 @@ i830_memory *depth_buffer; i830_memory *textures; /**< Compatibility texture memory */ i830_memory *memory_manager; /**< DRI memory manager aperture */ + i830_memory *hw_status; /* for G33 hw status page alloc */ int TexGranularity; int drmMinor; diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_lvds.c new/xf86-video-intel/src/i830_lvds.c --- old/xf86-video-intel/src/i830_lvds.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_lvds.c 2007-06-05 23:20:51.000000000 +0200 @@ -496,7 +496,16 @@ dev_priv->panel_fixed_mode = i830_crtc_mode_get(pScrn, crtc); if (dev_priv->panel_fixed_mode != NULL) dev_priv->panel_fixed_mode->type |= M_T_PREFERRED; + } + } + /* Get the LVDS fixed mode out of the BIOS. We should support LVDS with + * the BIOS being unavailable or broken, but lack the configuration options + * for now. + */ + bios_mode = i830_bios_get_panel_mode(pScrn, &dev_priv->panel_wants_dither); + if (bios_mode != NULL) { + if (dev_priv->panel_fixed_mode != NULL) { /* Fixup for a 1280x768 panel with the horizontal trimmed * down to 1024 for text mode. */ @@ -512,16 +521,7 @@ dev_priv->panel_fixed_mode->HSyncEnd = 1440; dev_priv->panel_fixed_mode->HTotal = 1688; } - } - } - /* Get the LVDS fixed mode out of the BIOS. We should support LVDS with - * the BIOS being unavailable or broken, but lack the configuration options - * for now. - */ - bios_mode = i830_bios_get_panel_mode(pScrn, &dev_priv->panel_wants_dither); - if (bios_mode != NULL) { - if (dev_priv->panel_fixed_mode != NULL) { if (pI830->debug_modes && !xf86ModesEqual(dev_priv->panel_fixed_mode, bios_mode)) { diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_memory.c new/xf86-video-intel/src/i830_memory.c --- old/xf86-video-intel/src/i830_memory.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_memory.c 2007-06-05 23:20:51.000000000 +0200 @@ -1312,6 +1312,22 @@ return TRUE; } +static Bool +i830_allocate_hwstatus(ScrnInfoPtr pScrn) +{ +#define HWSTATUS_PAGE_SIZE (4*1024) + I830Ptr pI830 = I830PTR(pScrn); + + pI830->hw_status = i830_allocate_memory(pScrn, "G33 hw status", + HWSTATUS_PAGE_SIZE, GTT_PAGE_SIZE, 0); + if (pI830->hw_status == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Failed to allocate hw status page for G33.\n"); + return FALSE; + } + return TRUE; +} + Bool i830_allocate_3d_memory(ScrnInfoPtr pScrn) { @@ -1319,6 +1335,11 @@ DPRINTF(PFX, "i830_allocate_3d_memory\n"); + if (IS_G33CLASS(pI830)) { + if (!i830_allocate_hwstatus(pScrn)) + return FALSE; + } + if (!i830_allocate_backbuffer(pScrn, &pI830->back_buffer, &pI830->back_tiled, "back buffer")) return FALSE; diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_video.c new/xf86-video-intel/src/i830_video.c --- old/xf86-video-intel/src/i830_video.c 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_video.c 2007-06-05 23:20:51.000000000 +0200 @@ -345,27 +345,55 @@ } #endif -static int -I830CrtcPipe (xf86CrtcPtr crtc) -{ - if (crtc == NULL) - return 0; - return ((I830CrtcPrivatePtr) crtc->driver_private)->pipe; -} +static void +I830SetOneLineModeRatio(ScrnInfoPtr pScrn); -static xf86CrtcPtr -I830CrtcForPipe (ScrnInfoPtr pScrn, int pipe) +static void +i830_overlay_switch_to_crtc (ScrnInfoPtr pScrn, xf86CrtcPtr crtc) { - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - int c; + I830Ptr pI830 = I830PTR(pScrn); + I830PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn); + I830CrtcPrivatePtr intel_crtc = crtc->driver_private; + int pipeconf_reg = intel_crtc->pipe == 0 ? PIPEACONF : PIPEBCONF; - for (c = 0; c < xf86_config->num_crtc; c++) + if (INREG(pipeconf_reg) & PIPEACONF_DOUBLE_WIDE) + pPriv->overlayOK = FALSE; + else + pPriv->overlayOK = TRUE; + + if (!pPriv->overlayOK) + return; + + /* Check we have an LFP connected */ + if (i830PipeHasType(crtc, I830_OUTPUT_LVDS)) { - xf86CrtcPtr crtc = xf86_config->crtc[c]; - if (I830CrtcPipe (crtc) == pipe) - return crtc; + + int vtotal_reg = intel_crtc->pipe ? VTOTAL_A : VTOTAL_B; + CARD32 size = intel_crtc->pipe ? INREG(PIPEBSRC) : INREG(PIPEASRC); + CARD32 active; + CARD32 hsize, vsize; + + hsize = (size >> 16) & 0x7FF; + vsize = size & 0x7FF; + active = INREG(vtotal_reg) & 0x7FF; + + if (vsize < active && hsize > 1024) + I830SetOneLineModeRatio(pScrn); + + if (pPriv->scaleRatio & 0xFFFE0000) + { + /* Possible bogus ratio, using in-accurate fallback */ + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Bogus panel fit register, Xvideo positioning may not " + "be accurate.\n"); + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Using fallback ratio - was 0x%x, now 0x%x\n", + pPriv->scaleRatio, + (int)(((float)active * 65536)/(float)vsize)); + + pPriv->scaleRatio = (int)(((float)active * 65536) / (float)vsize); + } } - return NULL; } /* @@ -383,24 +411,17 @@ I830OverlayRegPtr overlay = I830OVERLAYREG(pI830); I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr; Bool deactivate = FALSE; - xf86CrtcPtr crtc0 = NULL; if (*pI830->overlayOn) return; /* - * On I830, if pipe A is off the first time the overlay - * is enabled, it will fail to turn and blank the entire - * screen. Light up pipe A in this case to provide a clock - * for the overlay hardware + * On I830, if pipe A is off when the overlayis enabled, it will fail to + * turn on and blank the entire screen or lock up the ring. Light up pipe + * A in this case to provide a clock for the overlay hardware */ - if (pPriv->current_crtc && - i830_crtc_pipe (pPriv->current_crtc) != 0 && - !pPriv->started_video) - { - pPriv->started_video = TRUE; + if (pPriv->current_crtc && i830_crtc_pipe (pPriv->current_crtc) != 0) deactivate = i830_pipe_a_require_activate (pScrn); - } overlay->OCMD &= ~OVERLAY_ENABLE; BEGIN_LP_RING(6); @@ -551,7 +572,7 @@ } /* Set up overlay video if we can do it at this depth. */ - if (!IS_I965G(pI830) && pScrn->bitsPerPixel != 8 && + if (!IS_I965G(pI830) && !IS_G33CLASS(pI830) && pScrn->bitsPerPixel != 8 && pI830->overlay_regs != NULL) { overlayAdaptor = I830SetupImageVideoOverlay(pScreen); @@ -633,7 +654,7 @@ * Select which pipe the overlay is enabled on. */ overlay->OCONFIG &= ~OVERLAY_PIPE_MASK; - if (I830CrtcPipe (pPriv->current_crtc) == 0) + if (i830_crtc_pipe (pPriv->current_crtc) == 0) overlay->OCONFIG |= OVERLAY_PIPE_A; else overlay->OCONFIG |= OVERLAY_PIPE_B; @@ -1717,9 +1738,6 @@ OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height, dstPitch); - if (!pPriv->overlayOK) - return; - #if VIDEO_DEBUG CompareOverlay(pI830, (CARD32 *) overlay, 0x100); #endif @@ -1737,9 +1755,14 @@ if (crtc != pPriv->current_crtc) { pPriv->current_crtc = crtc; - I830ResetVideo (pScrn); + i830_overlay_switch_to_crtc (pScrn, crtc); + if (pPriv->overlayOK) + I830ResetVideo (pScrn); } + if (!pPriv->overlayOK) + return; + switch (crtc->rotation & 0xf) { case RR_Rotate_0: dstBox->x1 -= crtc->x; @@ -2271,7 +2294,7 @@ if (pI830->entityPrivate) { if (pI830->entityPrivate->XvInUse != -1 && - pI830->entityPrivate->XvInUse != I830CrtcPipe (pPriv->current_crtc)) { + pI830->entityPrivate->XvInUse != i830_crtc_pipe (pPriv->current_crtc)) { #ifdef PANORAMIX if (!noPanoramiXExtension) { return Success; /* faked for trying to share it */ @@ -2282,7 +2305,7 @@ } } - pI830->entityPrivate->XvInUse = I830CrtcPipe (pPriv->current_crtc);; + pI830->entityPrivate->XvInUse = i830_crtc_pipe (pPriv->current_crtc);; } /* overlay limits */ @@ -2766,7 +2789,7 @@ if (pI830->entityPrivate) { if (pI830->entityPrivate->XvInUse != -1 && - pI830->entityPrivate->XvInUse != I830CrtcPipe (pI830Priv->current_crtc)) { + pI830->entityPrivate->XvInUse != i830_crtc_pipe (pI830Priv->current_crtc)) { #ifdef PANORAMIX if (!noPanoramiXExtension) { return Success; /* faked for trying to share it */ @@ -2777,7 +2800,7 @@ } } - pI830->entityPrivate->XvInUse = I830CrtcPipe (pI830Priv->current_crtc); + pI830->entityPrivate->XvInUse = i830_crtc_pipe (pI830Priv->current_crtc); } x1 = src_x; @@ -2861,7 +2884,6 @@ ScrnInfoPtr pScrn = crtc->scrn; I830Ptr pI830 = I830PTR(pScrn); I830PortPrivPtr pPriv; - I830CrtcPrivatePtr intel_crtc = crtc->driver_private; if (pI830->adaptor == NULL) return; @@ -2872,53 +2894,12 @@ pPriv = GET_PORT_PRIVATE(pScrn); - /* Check if it's the crtc the overlay is on */ if (crtc != pPriv->current_crtc) return; + /* Check if it's the crtc the overlay is on */ if (on) { - int size, hsize, vsize, active; - int pipeconf_reg = intel_crtc->pipe == 0 ? PIPEACONF : PIPEBCONF; - char pipename = intel_crtc->pipe == 0 ? 'A' : 'B'; - - pPriv->overlayOK = TRUE; - - if (INREG(pipeconf_reg) & PIPEACONF_DOUBLE_WIDE) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Disabling XVideo output because Pipe %c is in " - "double-wide mode.\n", pipename); - pPriv->overlayOK = FALSE; - } else if (!pPriv->overlayOK) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Re-enabling XVideo output because Pipe %c is now in " - "single-wide mode.\n", pipename); - pPriv->overlayOK = TRUE; - } - - /* Check we have an LFP connected */ - if (i830PipeHasType(crtc, I830_OUTPUT_LVDS)) { - int vtotal_reg = intel_crtc->pipe ? VTOTAL_A : VTOTAL_B; - size = intel_crtc->pipe ? INREG(PIPEBSRC) : INREG(PIPEASRC); - hsize = (size >> 16) & 0x7FF; - vsize = size & 0x7FF; - active = INREG(vtotal_reg) & 0x7FF; - - if (vsize < active && hsize > 1024) - I830SetOneLineModeRatio(pScrn); - - if (pPriv->scaleRatio & 0xFFFE0000) { - /* Possible bogus ratio, using in-accurate fallback */ - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Bogus panel fit register, Xvideo positioning may not " - "be accurate.\n"); - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Using fallback ratio - was 0x%x, now 0x%x\n", - pPriv->scaleRatio, - (int)(((float)active * 65536)/(float)vsize)); - - pPriv->scaleRatio = (int)(((float)active * 65536) / (float)vsize); - } - } + i830_overlay_switch_to_crtc (pScrn, crtc); } else { /* We stop the video when mode switching, so we don't lock up * the engine. The overlayOK will determine whether we can re-enable diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/xf86-video-intel/src/i830_video.h new/xf86-video-intel/src/i830_video.h --- old/xf86-video-intel/src/i830_video.h 2007-06-03 10:47:40.000000000 +0200 +++ new/xf86-video-intel/src/i830_video.h 2007-06-05 23:20:51.000000000 +0200 @@ -77,7 +77,6 @@ int oneLineMode; int scaleRatio; Bool textured; - Bool started_video; } I830PortPrivRec, *I830PortPrivPtr; #define GET_PORT_PRIVATE(pScrn) \ ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Remember to have fun... --------------------------------------------------------------------- To unsubscribe, e-mail: opensuse-commit+unsubscribe@opensuse.org For additional commands, e-mail: opensuse-commit+help@opensuse.org