Darrell Shively wrote:
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Hi William:
On Wednesday 07 April 2004 05:54, William A. Mahaffey III wrote:
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Hmmmm .... I thought the CPUs talked to eachother (at least the 200 & 800 series) through high speed busses & could shuttle data between eachother as fast as direct memory access (except for some small latency to start the proceedings), no ?
Turns out no. The Hyptertransport connection between the processors *is* very fast but not as fast as each processors' 128+ bit wide memory bus. This is why the processor affinity feature of NUMA kernels is important; it tries to keep a process on the processor whose RAM contains its data.
I had been leaning toward some of the balanced MP boards (TYAN S2882, Arima HDAMA) on that count.
It depends on your needs. A second processor can be useful even if it's memory access is via a hypertransport link. It depends on what sort of jobs you are running - if stuff fits mostly in the 2nd processors' cache then there is happiness.
Regards, - Darrell - -- sused@mucus.com "Perfect! ....what am I doing?" -- Washu -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux)
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Actually most of the stuff I run would be large jobs requiring a significant fraction of available RAM, too big to fit into cache. I thought the actual data speed of the hyper-transport bus (6.4 GB/s) was similar to the memory bus (6.4 GB/s using PC3200 RAM, 5.3 GB/s using PC2700 RAM), although by different means (64 bit dual-channel DDR bus at either 166 MHz or 200 MHz for the RAM, 16 bit DDR at 1600 MHz for the hyper-transport bus). I would also be interested in knowing how SMP is working .... just to help keep the already busy thread going :-).