Re: [radeonhd] Re: Radeon HD2900XT
Hi Pete! Thank you for this investigation! It helps to pin down another set of problems that need addressing. We should look into this issue, right now there are all sorts of other pressing issues pending,though. We only have documentation to a small subset of the available hardware. What we got is not really complete either. So it's likely that the required bits are missing. We don't have anything on the original R600. Cheers, Egbert. Pete Chown writes:
Hi Egbert,
I've managed to get the driver working with this card, though I suspect you'll need to ask AMD why this "fix" works...
diff --git a/src/rhd_crtc.c b/src/rhd_crtc.c index 6bd7f93..1aad727 100644 --- a/src/rhd_crtc.c +++ b/src/rhd_crtc.c @@ -191,7 +191,7 @@ DxFBSet(struct rhdCrtc *Crtc, CARD16 Pitch, CARD16 Width, CA }
RHDRegWrite(Crtc, RegOff + D1GRPH_PRIMARY_SURFACE_ADDRESS, - rhdPtr->FbIntAddress + Offset); + rhdPtr->FbIntAddress + Offset + 0x10000000); RHDRegWrite(Crtc, RegOff + D1GRPH_PITCH, Pitch); RHDRegWrite(Crtc, RegOff + D1GRPH_SURFACE_OFFSET_X, 0); RHDRegWrite(Crtc, RegOff + D1GRPH_SURFACE_OFFSET_Y, 0);
My card has 512M of RAM, but it looks as though you can only map 256M at a time into the CPU's address space. Presumably there is a way to choose *which* 256M you want, but I can't find it in the docs AMD have published. (Am I right that the docs are actually for a slightly different device?)
The VGA memory is 256M into the RAM, so I guessed that the top half of the memory might be selected when the display is in text mode. My results are consistent with this: moving the framebuffer up 256M makes things start working.
Pete
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Hi Egbert,
We should look into this issue, right now there are all sorts of other pressing issues pending,though.
From my point of view there's no rush -- obviously the change I made is an awful hack, but it does make the driver work for me!
Is there someone at AMD who could explain how this is supposed to work? I'd be very happy to produce a proper fix for this issue, if I can get the information I need. Pete -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On Tue, Oct 16, 2007 at 01:15:11PM +0100, Pete wrote:
Hi Egbert,
Is there someone at AMD who could explain how this is supposed to work? I'd be very happy to produce a proper fix for this issue, if I can get the information I need.
Pete
Interesting. We think we're addressing the lower half of memory, while the hardware is accessing the higher half. Can you get us a copy of your VGA bios? Thanks, Luc Verhaegen. SUSE/Novell X Driver Developer. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
Hi Luc,
We think we're addressing the lower half of memory, while the hardware is accessing the higher half.
Can you get us a copy of your VGA bios?
No problem, you can download it from http://www.friendlyfrog.net/radeon2900/ . Thanks, Pete -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
participants (3)
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Egbert Eich
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Luc Verhaegen
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Pete