RS690 full-HD performance
Tristan Hoffmann wrote:
Christiaan van Dijk wrote:
Christian König wrote:
Since the audio pipeline from application->alsa->audio codec->hdm <snip> I'm very puzzled by this behavior but will try to think of some new experiments.
Regds, Christiaan.
I'm not sure, but I think these audio dropouts might not be directly related to the driver. I have an RS690 system and it's simply not powerful enough to play FullHD videos, the playback isn't smooth and I also have dropouts using the normal headphone output.
This is an interesting point. I got my RS690 board for use in a HTPC, checked out the specifications and commercial blatter and all seemed fine. Driver support from supplier and from open-source, what more can you wish for? After fighting this system now for a couple of months I have to come to the following conclusions: * Supplier Linux driver is not usable on a full-HD setup with a recent kernel. * Full-HD X264 decompression is (easily) possible on a 4850e processor with coreavc-for-linux (it's not free but very good cost/performance ratio). * Great work is being done on the open source drivers but for a full-HD setup you really have to use every bit of the graphics processor as efficient as possible. The drivers are not yet doing this which results in just not sufficient performance. I did not realize how much data actually needs to be processed for a full-HD frame in the available time, if you calculate the numbers it's pretty amazing what the graphics processor can do but right now it can barely handle 25 frames per second. * I did personally not expect so many problems and complications to get tear-free video. Right now I'm running a very crude patch which uses double buffering by using the hardware overlay functions but this is far from optimal at the moment. * Critical features for a HTPC like full HDMI support are still in development, great work is being done here but it is not yet usable/stable enough for daily use. These are my personal findings, use them for what you think it's worth. My board has also been showing some other quirks which I did not look into yet, at the moment I am considering switching to an Intel based GM45 board like the MSI IM-GM45. Problem is the same as with the AMD board; you will only find out if the board can handle full-HD once you've got the whole setup up and running. Any user experiences on this point would be welcome. If you use the RS690 in lower resolutions performance is actually quite good, full-HD is just pushing it a bit too far. Regds, Christiaan. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
Christiaan and Christian :-), Rafal,
what's the status of the HDMI RS690 audio patch? Is it finished, or are
you guys still fiddling with it?
No need to hurry, I just don't want to have this dropped on the floor,
and maybe you guys are waiting eagerly for this to be committed ;-)
CU
Matthias
--
Matthias Hopf
2009/5/12 Matthias Hopf
Christiaan and Christian :-), Rafal,
what's the status of the HDMI RS690 audio patch? Is it finished, or are you guys still fiddling with it?
No need to hurry, I just don't want to have this dropped on the floor, and maybe you guys are waiting eagerly for this to be committed ;-)
Can't tell you anything about code itself, I don't know much about drivers programming. However can more-or-less sum up current (last-known?) status: 1) AFAIK tested only on one RS690 (do you have some RS690 to test it? guess would be nice) 2) Works for sending "normal" sound as well as pass through (both AC3 and DTS). Earlier reported problems were caused by kernel modules for alsa. 3) Doesn't cause regressions on M82 (RV620) 4) I still wasn't able to test second version of patch for regressions on RV635 :/ I'm fighting with my Seagate 7200.11 "black serie" which switched itself to some /emergency/ mode. 5) Last time there were sill some audio drop outs on RS690. Christiaan van Dijk noticed some interesting clocks relations: http://lists.opensuse.org/radeonhd/2009-04/msg00290.html If there were some more interesting discussion since (5) I wasn't included ;) I'm very interested about that part:
Another side effect is noticeable in the video playback; playback is very smooth with the lower resolution. In the 1920x1080 resolution playback is not smooth.
I belive I also experienced that. Playing some movie on my notebook (1600x900) was smooth, but not anymore after switching to 1920x1080 HD TV. I have to test that, measure somehow. Will post if I notice something. -- Rafał Miłecki -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
zajec5@gmail.com said:
1) AFAIK tested only on one RS690 (do you have some RS690 to test it? guess would be nice)
As I have an RS690, In could test it to my TV if yyou want. However, I'm not sure if HDMI audio is such a big deal, anyway. Most (all?) computers are already hooked up to some audio device, and what's coming out of your average TV/LCD speakers is not of great quality. :-( My guess is that the RS690 community would prefer to use the HD decoding capability rather than HDMI audio if they have to choose. Amyway, I guess you want if done, as the work's already done. What should I test? AFAIK, my TV has no indication for "yes I'm receiving AC3/xxx/yyy audio from you fine". /Anders -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
2009/5/12 Anders Eriksson
zajec5@gmail.com said:
1) AFAIK tested only on one RS690 (do you have some RS690 to test it? guess would be nice)
As I have an RS690, In could test it to my TV if yyou want. However, I'm not sure if HDMI audio is such a big deal, anyway. Most (all?) computers are already hooked up to some audio device, and what's coming out of your average TV/LCD speakers is not of great quality. :-(
My guess is that the RS690 community would prefer to use the HD decoding capability rather than HDMI audio if they have to choose.
Ouch, please, read and reconsider your opinion :) With normal, standard analog jack out you will transfer sound in quite poor quality. Solution for better quality is digital output: S/PDIF in form of RCA/jack (coaxial) or optical (Toslink)... or HDMI of course. With S/PDIF and RCA/jack problem is that it's usually not available in most notebooks and not awlays available in motherboards with integrated audio cards. So having ATI card in notebooks I can play digital sound to /some/ device. Now about /some/ device. It doesn't have to be TV with poor speakers actually. First I can connect with HDMI to TV and then forward sound (still in digital form) from TV to some real audio device. Second you can connect with HDMI to some "A/V receiver" (it's called amplifier in some languages, like Polish) and that receiver parses digital sound (sending it to many speakers) and forward video to TV. And even if you have PC (not notebook) and want to connect it to TV to play movies I still belive it's great to use HDMI. With just that one cable you can transffer video and audio (digital). In other case you would need to use two cables which means more work and bigger costs :) That's what I did with my RV635.
Amyway, I guess you want if done, as the work's already done. What should I test? AFAIK, my TV has no indication for "yes I'm receiving AC3/xxx/yyy audio from you fine".
I belive TVs mostly can't decode "pure" AC3 or DTS. But you can still try sending audio in already decoded form to your TV. 1) get sources of radeonhd from git 2) get RS690 patch (http://lists.opensuse.org/radeonhd/2009-04/msg00265.html - I'm afraid you have to copy&paste it from archive) 3) apply patch, compile, install, restart X 4) check "aplay -l" for something like card 1: HDMI [HDA ATI HDMI], device 3: ATI HDMI [ATI HDMI] 5) just try mplayer -ao alsa:device=hw=0.0 some.video.or.audio.file Or maybe start from point 4 to avoid discovering audio device too late :P -- Rafał Miłecki -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
2009/5/12 Rafał Miłecki
I belive TVs mostly can't decode "pure" AC3 or DTS. But you can still try sending audio in already decoded form to your TV.
1) get sources of radeonhd from git 2) get RS690 patch (http://lists.opensuse.org/radeonhd/2009-04/msg00265.html - I'm afraid you have to copy&paste it from archive) 3) apply patch, compile, install, restart X 4) check "aplay -l" for something like card 1: HDMI [HDA ATI HDMI], device 3: ATI HDMI [ATI HDMI] 5) just try mplayer -ao alsa:device=hw=0.0 some.video.or.audio.file
Or maybe start from point 4 to avoid discovering audio device too late :P
I let myself put patch on http server. So: git clone git://anongit.freedesktop.org/git/xorg/driver/xf86-video-radeonhd wget http://estudent.put.poznan.pl/rafal.milecki/RS690.patch cd xf86-video-radeonhd git checkout -t -b rs690 origin/master patch -p1 --dry-run < ../RS690.patch patch -p1 < ../RS690.patch make sudo make install If one command will fail, don't execute next. Try resolve problem or post it here if you fail. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
zajec5@gmail.com said:
git clone git://anongit.freedesktop.org/git/xorg/driver/xf86-video-radeonhd wget http://estudent.put.poznan.pl/rafal.milecki/RS690.patch cd xf86-video-radeonhd git checkout -t -b rs690 origin/master patch -p1 --dry-run < ../RS690.patch patch -p1 < ../RS690.patch make sudo make install
Did that. No dice. The device shows up, but I get no sound. mplayer plays the movie at double speed and shows the "your computer is too slow..." screen. anders@tv ~ $ grep -i audio /var/log/Xorg.0.log (**) RADEONHD(0): Option "Audio" "true" (II) RADEONHD(0): RHDAudioSetSupported: config 0x60040 codec 0x1 (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x01 IEC60958 status bits and 0x00 category code (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: playing with 2 channels, 48000 Hz sampling rate, 16 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x01 IEC60958 status bits and 0x00 category code (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x01 IEC60958 status bits and 0x00 category code (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: playing with 2 channels, 48000 Hz sampling rate, 16 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x01 IEC60958 status bits and 0x00 category code (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x01 IEC60958 status bits and 0x00 category code anders@tv ~ $ aplay -l **** List of PLAYBACK Hardware Devices **** card 0: SB [HDA ATI SB], device 0: ALC883 Analog [ALC883 Analog] Subdevices: 1/1 Subdevice #0: subdevice #0 card 0: SB [HDA ATI SB], device 1: ALC883 Digital [ALC883 Digital] Subdevices: 1/1 Subdevice #0: subdevice #0 card 1: HDMI [HDA ATI HDMI], device 0: ATI HDMI [ATI HDMI] Subdevices: 1/1 Subdevice #0: subdevice #0 I told maplyer to use -ao alsa:device=hw=1.0 is there anything I need to "unmute" on hw=1.0 ? alsamixer showed only a single knob (mute on/off) for the playback device and it was unmuted. Other dependencies? I'm on 2.6.25 if that matters.... /Anders -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
zajec5@gmail.com said:
Ouch, please, read and reconsider your opinion :) :-) I figured it could be a touchy subject.
With normal, standard analog jack out you will transfer sound in quite poor quality.
Sure. But still, it's on par with what people are use to from the pre-digital era, and non-stuttering, and non-skuppy and all that. It "just works".
Solution for better quality is digital output: S/PDIF in form of RCA/jack (coaxial) or optical (Toslink)... or HDMI of course. With S/PDIF and RCA/jack problem is that it's usually not available in most notebooks and not awlays available in motherboards with integrated audio cards. So having ATI card in notebooks I can play digital sound to /some/ device.
2009/5/12 Anders Eriksson
With normal, standard analog jack out you will transfer sound in quite poor quality.
Sure. But still, it's on par with what people are use to from the pre-digital era, and non-stuttering, and non-skuppy and all that. It "just works".
Yeah, that whole digital era makes me crazy for many years already ;) People buy great, expensive audio devices... and use poor analog connections to them (from DVD / TV / computer / whatever). Next ppl spend even more money for fantastic 48 or even 52 inches TVs... and (yes, you guess right) connect DVDs or terrestrial television receivers to them, not even considering Blu-Ray players or notebooks with (at least) 720p :) I consider myself far from being audiophile, but there IS difference between analog single-jack signal and digital signal with nice audio receiver. That's definitely crazy: connection of digital era with "it just works" :)
Solution for better quality is digital output: S/PDIF in form of RCA/jack (coaxial) or optical (Toslink)... or HDMI of course. With S/PDIF and RCA/jack problem is that it's usually not available in most notebooks and not awlays available in motherboards with integrated audio cards. So having ATI card in notebooks I can play digital sound to /some/ device.
If I have to _choose_ between high-end audio with broken video, or traditional audio and _working_ video playback, I sure know where my vote is.
I don't think using audio in HDMI actually affects video playback. Didn't notice that ever.
But of course, if I can have it all, so much the better! How far off is HD video playback on the RS690, anyway?
You can split whole video playback into two / three main parts: 1) Decoding video from some file format (ex. h264) 2) Converting colors 3) Scaling video (for example you have video 1200x720 but you want to play it fullscreen on 1920x1080) 2 and 3 are done in GPU thanks to Xv - that works since "always" on RS690 and since months on R6xx-R7xx (DRM needed for that will hit 2.6.30). So here you shouldn't experience problems. More problematic may be decoding. That can be in 4 ways: 1) Software (CPU) decoding 2) Software (CPU) multi-thread decoding 3) Hardware (GPU) decoding with special hardware engine (vendor specified) 4) Hardware (GPU) decoding with shaders (universal) 1) On modern CPUs you can succesfully decode most 720p movies. 2) Problem comes with 1080p, when one core (for example on my Intel C2D P8400) is often not enought. Then you have to use more cores but standard ffmpeg (used by MPlayer) can't do that. It's implemented in experimental ffmpeg-mt but it is not stable yet (and won't be soon). 3) Both AMD and NVidia has special hardware blocks to decode video (RS690 doesn't AFAIR). Unfortunately that won't become available in open source driver due to some legal issues. NVidia offers it in it's closed driver (VDPAU), AMD doesn't even in fglrx. 4) Nothing special available for now, read http://bitblitter.blogspot.com/ So it's really hard to play full HD material on ATI :( What's worse I don't see any solution coming soon. Personally I use ffmpeg-mt for playing 1080p materials. It sometimes crashes but it mostly happens on starting, stoping and seeking video. Almost never after you already started playback. If I missed something I would love to hear other solutions. -- Rafał Miłecki -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On Tue, May 12, 2009 at 11:08 AM, Rafał Miłecki
2009/5/12 Anders Eriksson
: With normal, standard analog jack out you will transfer sound in quite poor quality.
Sure. But still, it's on par with what people are use to from the pre-digital era, and non-stuttering, and non-skuppy and all that. It "just works".
Yeah, that whole digital era makes me crazy for many years already ;) People buy great, expensive audio devices... and use poor analog connections to them (from DVD / TV / computer / whatever). Next ppl spend even more money for fantastic 48 or even 52 inches TVs... and (yes, you guess right) connect DVDs or terrestrial television receivers to them, not even considering Blu-Ray players or notebooks with (at least) 720p :)
I consider myself far from being audiophile, but there IS difference between analog single-jack signal and digital signal with nice audio receiver.
That's definitely crazy: connection of digital era with "it just works" :)
Solution for better quality is digital output: S/PDIF in form of RCA/jack (coaxial) or optical (Toslink)... or HDMI of course. With S/PDIF and RCA/jack problem is that it's usually not available in most notebooks and not awlays available in motherboards with integrated audio cards. So having ATI card in notebooks I can play digital sound to /some/ device.
If I have to _choose_ between high-end audio with broken video, or traditional audio and _working_ video playback, I sure know where my vote is.
I don't think using audio in HDMI actually affects video playback. Didn't notice that ever.
But of course, if I can have it all, so much the better! How far off is HD video playback on the RS690, anyway?
You can split whole video playback into two / three main parts: 1) Decoding video from some file format (ex. h264) 2) Converting colors 3) Scaling video (for example you have video 1200x720 but you want to play it fullscreen on 1920x1080)
2 and 3 are done in GPU thanks to Xv - that works since "always" on RS690 and since months on R6xx-R7xx (DRM needed for that will hit 2.6.30). So here you shouldn't experience problems.
More problematic may be decoding. That can be in 4 ways: 1) Software (CPU) decoding 2) Software (CPU) multi-thread decoding 3) Hardware (GPU) decoding with special hardware engine (vendor specified) 4) Hardware (GPU) decoding with shaders (universal)
1) On modern CPUs you can succesfully decode most 720p movies.
2) Problem comes with 1080p, when one core (for example on my Intel C2D P8400) is often not enought. Then you have to use more cores but standard ffmpeg (used by MPlayer) can't do that. It's implemented in experimental ffmpeg-mt but it is not stable yet (and won't be soon).
3) Both AMD and NVidia has special hardware blocks to decode video (RS690 doesn't AFAIR). Unfortunately that won't become available in open source driver due to some legal issues. NVidia offers it in it's closed driver (VDPAU), AMD doesn't even in fglrx.
4) Nothing special available for now, read http://bitblitter.blogspot.com/
So it's really hard to play full HD material on ATI :( What's worse I don't see any solution coming soon. Personally I use ffmpeg-mt for playing 1080p materials. It sometimes crashes but it mostly happens on starting, stoping and seeking video. Almost never after you already started playback.
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined. Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
Hey guys, I have RV635, with driver 1.2.5 it gave me a full system freeze when I'm trying to use EXA How can I help to investigate this? -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
W dniu 12 maja 2009 17:17 użytkownik A.Yerenkow
Hey guys, I have RV635, with driver 1.2.5 it gave me a full system freeze when I'm trying to use EXA How can I help to investigate this?
I'm not any expert, but some details would be nice to developers. Do you use mesa/drm branch of 2.6.30-rcX? Can you do SysRq reboot (with unmounting) after freeze? Can you ssh to that freezed machine and safe reboot it? Try to attach your Xorg.0.log.old after rebooting. Does the same happen with radeon (xf86-video-ati)? -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
Rafał Miłecki wrote:
W dniu 12 maja 2009 17:17 użytkownik A.Yerenkow
napisał: Hey guys, I have RV635, with driver 1.2.5 it gave me a full system freeze when I'm trying to use EXA How can I help to investigate this?
I'm not any expert, but some details would be nice to developers. Do you use mesa/drm branch of 2.6.30-rcX? Can you do SysRq reboot (with unmounting) after freeze? Can you ssh to that freezed machine and safe reboot it? Try to attach your Xorg.0.log.old after rebooting.
Does the same happen with radeon (xf86-video-ati)?
Hm, seems some old .so left after I used nvidia card; reinstall all mesa-related and boot OK, no problems left. BTW, my card is 0x9598:0x174B:0x3001: and it's Sapphire HD3750 - (--) RADEONHD(0): Detected an RV635 on an unidentified card BIOS Bootup Message: HD3750 GDDR3_16MX32 128BIT 512MB 800E/700M Maybe you could add identifier to driver :) -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
I have here hanged xorg; it disable all on my pc; I sshed, killed xorg, it restarts but without acceleration. 1 file - it's originally started xorg with error; 2 file - from xorg started second time. X.Org X Server 1.5.3 Release Date: 5 November 2008 X Protocol Version 11, Revision 0 Build Operating System: FreeBSD 7.0-RELEASE i386 Current Operating System: FreeBSD pcbsd 7.2-PRERELEASE FreeBSD 7.2-PRERELEASE #12: Fri Apr 17 15:37:58 EDT 2009 root@pcbsdx32-7:/usr/obj/pcbsd-build71/cvs/7.1-src/sys/PCBSD i386 Build Date: 31 March 2009 02:52:21AM Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Wed May 13 13:29:25 2009 (==) Using config file: "/etc/X11/xorg.conf" (==) ServerLayout "XFree86 Configured" (**) |-->Screen "Screen0" (0) (**) | |-->Monitor "Monitor0" (**) | |-->Device "Card0" (**) |-->Input Device "Mouse0" (**) |-->Input Device "Keyboard0" (**) Option "DisableVidModeExtension" "True" (**) Option "AllowEmptyInput" "Off" (**) Option "AutoAddDevices" "False" (**) Not automatically adding devices (==) Automatically enabling devices (WW) The directory "/PCBSD/local/lib/X11/fonts/illinoy/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/webfonts/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/Speedo/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/CID/" does not exist. Entry deleted from font path. (WW) `fonts.dir' not found (or not valid) in "/PCBSD/local/lib/X11/fonts/dejavu/". Entry deleted from font path. (Run 'mkfontdir' on "/PCBSD/local/lib/X11/fonts/dejavu/"). (WW) The directory "/PCBSD/local/lib/X11/fonts/hebrew/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/vietnamese/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/indic/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/AAHS" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/AGA" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/FS" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/Kasr" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/MCS" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/Shmookh" does not exist. Entry deleted from font path. (WW) `fonts.dir' not found (or not valid) in "/PCBSD/local/lib/X11/fonts/local/". Entry deleted from font path. (Run 'mkfontdir' on "/PCBSD/local/lib/X11/fonts/local/"). (==) Including the default font path /PCBSD/local/lib/X11/fonts/misc/,/PCBSD/local/lib/X11/fonts/TTF/,/PCBSD/local/lib/X11/fonts/OTF,/PCBSD/local/lib/X11/fonts/Type1/,/PCBSD/local/lib/X11/fonts/100dpi/,/PCBSD/local/lib/X11/fonts/75dpi/. (**) FontPath set to: /PCBSD/local/lib/X11/fonts/cyrillic/, /PCBSD/local/lib/X11/fonts/TrueType/, /PCBSD/local/lib/X11/fonts/misc/, /PCBSD/local/lib/X11/fonts/TTF/, /PCBSD/local/lib/X11/fonts/Type1/, /PCBSD/local/lib/X11/fonts/75dpi/, /PCBSD/local/lib/X11/fonts/100dpi/, /PCBSD/local/lib/X11/fonts/cyrillic/, /PCBSD/local/lib/X11/fonts/misc/, /PCBSD/local/lib/X11/fonts/TTF/, /PCBSD/local/lib/X11/fonts/OTF, /PCBSD/local/lib/X11/fonts/Type1/, /PCBSD/local/lib/X11/fonts/100dpi/, /PCBSD/local/lib/X11/fonts/75dpi/ (**) ModulePath set to "/PCBSD/local/lib/modules,/PCBSD/local/lib/xorg/modules" (II) Loader magic: 0x81bcde0 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 4.1 X.Org XInput driver : 2.1 X.Org Server Extension : 1.1 X.Org Font Renderer : 0.6 (II) Loader running on freebsd (--) Using syscons driver with X support (version 2.0) (--) using VT number 9 (--) PCI:*(0@1:0:0) ATI Technologies Inc Mobility Radeon HD 3600 Series rev 0, Mem @ 0xd0000000/0, 0xfe9f0000/0, I/O @ 0x0000d000/0, BIOS @ 0x????????/65536 (II) System resource ranges: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) "extmod" will be loaded. This was enabled by default and also specified in the config file. (II) "dbe" will be loaded. This was enabled by default and also specified in the config file. (II) "glx" will be loaded. This was enabled by default and also specified in the config file. (II) "freetype" will be loaded. This was enabled by default and also specified in the config file. (II) "record" will be loaded. This was enabled by default and also specified in the config file. (II) "dri" will be loaded. This was enabled by default and also specified in the config file. (II) LoadModule: "record" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension RECORD (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) LoadModule: "dri" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 1.1 (II) Loading extension XFree86-DRI (II) LoadModule: "dbe" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "extmod" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension SHAPE (II) Loading extension MIT-SUNDRY-NONSTANDARD (II) Loading extension BIG-REQUESTS (II) Loading extension SYNC (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XC-MISC (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-Misc (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension TOG-CUP (II) Loading extension Extended-Visual-Information (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "glx" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 1.1 (==) AIGLX disabled (==) Exporting typical set of GLX visuals (II) Loading extension GLX (II) LoadModule: "xtrap" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libxtrap.so (II) Module xtrap: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension DEC-XTRAP (II) LoadModule: "freetype" (II) Loading /PCBSD/local/lib/xorg/modules/fonts//libfreetype.so (II) Module freetype: vendor="X.Org Foundation & the After X-TT Project" compiled for 1.5.3, module version = 2.1.0 Module class: X.Org Font Renderer ABI class: X.Org Font Renderer, version 0.6 (II) Loading font FreeType (II) LoadModule: "radeonhd" (II) Loading /PCBSD/local/lib/xorg/modules/drivers//radeonhd_drv.so (II) Module radeonhd: vendor="AMD GPG" compiled for 1.5.3, module version = 1.2.5 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 4.1 (II) LoadModule: "mouse" (II) Loading /PCBSD/local/lib/xorg/modules/input//mouse_drv.so (II) Module mouse: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.4.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 2.1 (II) LoadModule: "kbd" (II) Loading /PCBSD/local/lib/xorg/modules/input//kbd_drv.so (II) Module kbd: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.3.2 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 2.1 (II) RADEONHD: X driver for the following AMD GPG (ATI) graphics devices: RV505 : Radeon X1550, X1550 64bit. RV515 : Radeon X1300, X1550, X1600; FireGL V3300, V3350. RV516 : Radeon X1300, X1550, X1550 64-bit, X1600; FireMV 2250. R520 : Radeon X1800; FireGL V5300, V7200, V7300, V7350. RV530 : Radeon X1300 XT, X1600, X1600 Pro, X1650; FireGL V3400, V5200. RV535 : Radeon X1300, X1650. RV550 : Radeon X2300 HD. RV560 : Radeon X1650. RV570 : Radeon X1950, X1950 GT; FireGL V7400. R580 : Radeon X1900, X1950; AMD Stream Processor. R600 : Radeon HD 2900 GT/Pro/XT; FireGL V7600/V8600/V8650. RV610 : Radeon HD 2350, HD 2400 Pro/XT, HD 2400 Pro AGP; FireGL V4000. RV620 : Radeon HD 3450, HD 3470. RV630 : Radeon HD 2600 LE/Pro/XT, HD 2600 Pro/XT AGP; Gemini RV630; FireGL V3600/V5600. RV635 : Radeon HD 3650, HD 3670. RV670 : Radeon HD 3690, 3850, HD 3870, FireGL V7700, FireStream 9170. R680 : Radeon HD 3870 X2. M52 : Mobility Radeon X1300. M54 : Mobility Radeon X1400; M54-GL. M56 : Mobility Radeon X1600; Mobility FireGL V5200. M58 : Mobility Radeon X1800, X1800 XT; Mobility FireGL V7100, V7200. M62 : Mobility Radeon X1350. M64 : Mobility Radeon X1450, X2300. M66 : Mobility Radeon X1700, X1700 XT; FireGL V5250. M68 : Mobility Radeon X1900. M71 : Mobility Radeon HD 2300. M72 : Mobility Radeon HD 2400; Radeon E2400. M74 : Mobility Radeon HD 2400 XT. M76 : Mobility Radeon HD 2600; (Gemini ATI) Mobility Radeon HD 2600 XT. M82 : Mobility Radeon HD 3400. M86 : Mobility Radeon HD 3650, HD 3670, Mobility FireGL V5700. M88 : Mobility Radeon HD 3850, HD 3850 X2, HD 3870, HD3870 X2. RS600 : Radeon Xpress 1200, Xpress 1250. RS690 : Radeon X1200, X1250, X1270. RS740 : RS740, RS740M. RS780 : Radeon HD 3100/3200/3300 Series. RV770 : Radeon HD 4800 Series; Everest, K2, Denali ATI FirePro. R700 : Radeon R700. M98 : Radeon M98 Mobility. RV730 : Radeon HD4670, HD4650. M96 : Radeon M96 Mobility. RV710 : Radeon HD4570, HD4350. (II) RADEONHD: version 1.2.5, built from dist of git branch master, commit cb54f48b (II) Primary Device is: PCI 01@00:00:0 (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) resource ranges after probing: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Setting vga for screen 0. (**) RADEONHD(0): Depth 24, (--) framebuffer bpp 32 (**) RADEONHD(0): Option "NoAccel" "False" (**) RADEONHD(0): Option "AccelMethod" "EXA" (**) RADEONHD(0): Option "DRI" "On" (**) RADEONHD(0): Selected EXA 2D acceleration. (II) RADEONHD(0): Unknown card detected: 0x9598:0x174B:0x3001. If - and only if - your card does not work or does not work optimally please contact radeonhd@opensuse.org to help rectify this. Use the subject: 0x9598:0x174B:0x3001: <name of board> and *please* describe the problems you are seeing in your message. (--) RADEONHD(0): Detected an RV635 on an unidentified card (II) RADEONHD(0): Mapped IO @ 0xfe9f0000 to 0x286b6000 (size 0x00010000) (II) RADEONHD(0): PCIE Card Detected (II) RADEONHD(0): Getting BIOS copy from legacy VBIOS location (II) RADEONHD(0): ATOM BIOS Rom: SubsystemVendorID: 0x174b SubsystemID: 0x3001 IOBaseAddress: 0xd000 Filename: DE4202SA.004 BIOS Bootup Message: HD3750 GDDR3_16MX32 128BIT 512MB 800E/700M (II) RADEONHD(0): Analog TV Default Mode: 8 (II) RADEONHD(0): Found default TV Mode PAL (II) RADEONHD(0): The detected amount of videoram exceeds the PCI BAR aperture. (II) RADEONHD(0): Using only 262144kB of the total 524288kB. (--) RADEONHD(0): VideoRAM: 262144 kByte (II) RADEONHD(0): Framebuffer space used by Firmware (kb): 16 (II) RADEONHD(0): Start of VRAM area used by Firmware: 0x1fffc000 (II) RADEONHD(0): AtomBIOS requests 16kB of VRAM scratch space (II) RADEONHD(0): AtomBIOS VRAM scratch base: 0x1fffc000 (WW) RADEONHD(0): rhdAtomAllocateFbScratch: FW FB scratch area 536854528 (size: 16384) extends beyond available framebuffer size 268435456 (II) RADEONHD(0): Cannot get VRAM scratch space. Allocating in main memory instead (II) RADEONHD(0): Default Engine Clock: 800000 (II) RADEONHD(0): Default Memory Clock: 700000 (II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000 (II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Input: 13500 (II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Input: 1000 (II) RADEONHD(0): Maximum Pixel Clock: 400000 (II) RADEONHD(0): Reference Clock: 27000 (WW) RADEONHD(0): Direct rendering for R600 and up forced on - This is NOT officially supported yet and may cause instability or lockups (II) RADEONHD(0): Found libdri 5.4.0. drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: drmOpenMinor returns 10 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) RADEONHD(0): Found libdrm 1.3.0. (II) RADEONHD(0): Found radeon drm 1.29.0. (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) RADEONHD(0): Reference Clock: 27000 (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f90 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f90 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 0" initialized. (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f94 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f94 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 1" initialized. (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f98 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f98 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 2" initialized. (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f88 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f88 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 3" initialized. (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000 (II) RADEONHD(0): Maximum Pixel Clock: 400000 (II) RADEONHD(0): Reference Clock: 27000 (II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00000000 (size = 0x00004000) (II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00004000 (size = 0x00004000) (II) RADEONHD(0): Connector[0] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I CRT1 DFP2", RHD_DDC_0, RHD_HPD_1, { RHD_OUTPUT_KLDSKP_LVTMA, RHD_OUTPUT_DACA } } (II) RADEONHD(0): Connector[1] {RHD_CONNECTOR_TV, "7PIN_DIN TV1 CV", RHD_DDC_0, RHD_HPD_NONE, { RHD_OUTPUT_DACB, RHD_OUTPUT_NONE } } (II) RADEONHD(0): Connector[2] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I DFP1 CRT2", RHD_DDC_1, RHD_HPD_0, { RHD_OUTPUT_UNIPHYA, RHD_OUTPUT_DACB } } (--) RADEONHD(0): Attaching Output UNIPHY_KLDSKP_LVTMA to Connector DVI-I 1 (--) RADEONHD(0): Attaching Output DAC A to Connector DVI-I 1 (--) RADEONHD(0): Attaching Output DAC B to Connector TV 7PIN_DIN (--) RADEONHD(0): Attaching Output UNIPHY_A to Connector DVI-I 2 (--) RADEONHD(0): Attaching Output DAC B to Connector DVI-I 2 (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/digital for Output UNIPHY_KLDSKP_LVTMA (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/analog for Output DAC A (II) RADEONHD(0): RandR: Adding RRoutput TV_7PIN_DIN for Output DAC B (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_2/digital for Output UNIPHY_A (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_2/analog for Output DAC B (II) RADEONHD(0): Output DVI-I_1/digital using monitor section Monitor0 (II) RADEONHD(0): Output DVI-I_1/digital has no monitor section (II) RADEONHD(0): Output DVI-I_1/analog has no monitor section (II) RADEONHD(0): Output TV_7PIN_DIN has no monitor section (II) RADEONHD(0): Output DVI-I_2/digital has no monitor section (II) RADEONHD(0): Output DVI-I_2/analog has no monitor section (II) RADEONHD(0): Setting UNIPHY_KLDSKP_LVTMA to incoherent (II) RADEONHD(0): I2C device "RHD I2C line 0:ddc2" registered at address 0xA0. (II) RADEONHD(0): EDID data for W2600 (II) RADEONHD(0): Manufacturer: GSM Model: 5675 Serial#: 216259 (II) RADEONHD(0): Year: 2008 Week: 7 (II) RADEONHD(0): EDID Version: 1.3 (II) RADEONHD(0): Digital Display Input (II) RADEONHD(0): Max Image Size [cm]: horiz.: 55 vert.: 34 (II) RADEONHD(0): Gamma: 2.20 (II) RADEONHD(0): DPMS capabilities: StandBy Suspend Off (II) RADEONHD(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEONHD(0): First detailed timing is preferred mode (II) RADEONHD(0): redX: 0.659 redY: 0.327 greenX: 0.218 greenY: 0.682 (II) RADEONHD(0): blueX: 0.141 blueY: 0.068 whiteX: 0.313 whiteY: 0.329 (II) RADEONHD(0): Supported VESA Video Modes: (II) RADEONHD(0): 720x400@70Hz (II) RADEONHD(0): 640x480@60Hz (II) RADEONHD(0): 640x480@75Hz (II) RADEONHD(0): 800x600@60Hz (II) RADEONHD(0): 800x600@75Hz (II) RADEONHD(0): 1024x768@60Hz (II) RADEONHD(0): 1024x768@75Hz (II) RADEONHD(0): 1280x1024@75Hz (II) RADEONHD(0): 1152x870@75Hz (II) RADEONHD(0): Manufacturer's mask: 0 (II) RADEONHD(0): Supported Future Video Modes: (II) RADEONHD(0): #0: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEONHD(0): #1: hsize: 1280 vsize 1024 refresh: 75 vid: 36737 (II) RADEONHD(0): #2: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEONHD(0): #3: hsize: 1280 vsize 960 refresh: 75 vid: 20353 (II) RADEONHD(0): #4: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 154.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1920 h_sync: 1968 h_sync_end 2000 h_blank_end 2080 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1203 v_sync_end 1209 v_blanking: 1235 v_border: 0 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 162.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1600 h_sync: 1664 h_sync_end 1856 h_blank_end 2160 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1201 v_sync_end 1204 v_blanking: 1250 v_border: 0 (II) RADEONHD(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 83 kHz, PixClock max 170 MHz (II) RADEONHD(0): Monitor name: W2600 (II) RADEONHD(0): EDID (in hex): (II) RADEONHD(0): 00ffffffffffff001e6d7556c34c0300 (II) RADEONHD(0): 0712010380372278eafe25a85337ae24 (II) RADEONHD(0): 115054a54b80a940818fb300814f8180 (II) RADEONHD(0): 010101010101283c80a070b023403020 (II) RADEONHD(0): 360026572100001a483f403062b03240 (II) RADEONHD(0): 40c0130026572100001e000000fd0038 (II) RADEONHD(0): 4b1e5311000a202020202020000000fc (II) RADEONHD(0): 0057323630300a202020202020200017 (II) RADEONHD(0): EDID vendor "GSM", prod id 22133 (II) RADEONHD(0): Using hsync ranges from config file (II) RADEONHD(0): Using vrefresh ranges from config file (II) RADEONHD(0): Printing DDC gathered Modelines: (II) RADEONHD(0): Modeline "1920x1200"x0.0 154.00 1920 1968 2000 2080 1200 1203 1209 1235 +hsync -vsync (74.0 kHz) (II) RADEONHD(0): Modeline "1600x1200"x0.0 162.00 1600 1664 1856 2160 1200 1201 1204 1250 +hsync +vsync (75.0 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEONHD(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEONHD(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz) (II) RADEONHD(0): Modeline "1600x1200"x60.0 160.96 1600 1704 1880 2160 1200 1201 1204 1242 -hsync +vsync (74.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x75.0 138.54 1280 1368 1504 1728 1024 1025 1028 1069 -hsync +vsync (80.2 kHz) (II) RADEONHD(0): Modeline "1680x1050"x60.0 147.14 1680 1784 1968 2256 1050 1051 1054 1087 -hsync +vsync (65.2 kHz) (II) RADEONHD(0): Modeline "1280x960"x75.0 129.86 1280 1368 1504 1728 960 961 964 1002 -hsync +vsync (75.2 kHz) (II) RADEONHD(0): Modeline "1280x1024"x60.0 108.88 1280 1360 1496 1712 1024 1025 1028 1060 -hsync +vsync (63.6 kHz) (II) RADEONHD(0): Output DVI-I_1/digital connected (II) RADEONHD(0): Output DVI-I_1/analog disconnected (II) RADEONHD(0): Output TV_7PIN_DIN disconnected (II) RADEONHD(0): Output DVI-I_2/digital disconnected (II) RADEONHD(0): Output DVI-I_2/analog disconnected (II) RADEONHD(0): Using user preference for initial modes (II) RADEONHD(0): Output DVI-I_1/digital using initial mode 1920x1200 (II) RADEONHD(0): RandR 1.2 support enabled (==) RADEONHD(0): RGB weight 888 (==) RADEONHD(0): Default visual is TrueColor (==) RADEONHD(0): Using gamma correction (1.0, 1.0, 1.0) (II) RADEONHD(0): Using 1920x1920 Framebuffer with 1920 pitch (II) RADEONHD(0): FB: Allocated ScanoutBuffer at offset 0x00008000 (size = 0x00E10000) (**) RADEONHD(0): Display dimensions: (550, 340) mm (**) RADEONHD(0): DPI set to (88, 143) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /PCBSD/local/lib/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (II) Loading sub module "exa" (II) LoadModule: "exa" (II) Loading /PCBSD/local/lib/xorg/modules//libexa.so (II) Module exa: vendor="X.Org Foundation" compiled for 1.5.3, module version = 2.4.0 ABI class: X.Org Video Driver, version 4.1 (II) RADEONHD(0): FB: Allocated Offscreen Buffer at offset 0x00E18000 (size = 0x0199A000) (II) RADEONHD(0): FB: Allocated DRI Back Buffer at offset 0x027B2000 (size = 0x00E10000) (II) RADEONHD(0): FB: Allocated DRI Depth Buffer at offset 0x035C2000 (size = 0x00E10000) (II) RADEONHD(0): FB: Allocated GART table at offset 0x0FFF0000 (size = 0x00010000, end of FB) (II) RADEONHD(0): FB: Allocated DRI Textures at offset 0x043D2000 (size = 0x0BC00000) (II) RADEONHD(0): Using 16 MB GART aperture (II) RADEONHD(0): Using 2 MB for the ring buffer (II) RADEONHD(0): Using 2 MB for vertex/indirect buffers (II) RADEONHD(0): Using 12 MB for GART textures (--) Depth 24 pixmap format is 32 bpp (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) RADEONHD(0): Mapped IO @ 0xfe9f0000 to 0x286b6000 (size 0x00010000) (II) RADEONHD(0): Mapped FB @ 0xd0000000 to 0x28c00000 (size 0x10000000) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: drmOpenMinor returns 10 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) [drm] DRM interface version 1.2 (II) [drm] DRM open master succeeded. (II) RADEONHD(0): [drm] Using the DRM lock SAREA also for drawables. (II) RADEONHD(0): [drm] framebuffer handle = 0xd0000000 (II) RADEONHD(0): [drm] added 1 reserved context for kernel (II) RADEONHD(0): X context handle = 0x2 (II) RADEONHD(0): [drm] installed DRM signal handler (EE) RADEONHD(0): [pci] Out of memory (-12) (EE) RADEONHD(0): [pci] PCI failed to initialize. Disabling the DRI. (II) RADEONHD(0): [drm] removed 1 reserved context for kernel (II) RADEONHD(0): [drm] unmapping 8192 bytes of SAREA 0xc695e000 at 0x286f8000 (II) RADEONHD(0): [drm] Closed DRM master. (WW) RADEONHD(0): RHDCSInit: No CS for R600 and up yet. (==) RADEONHD(0): Backing store disabled (==) RADEONHD(0): Silken mouse enabled (II) RADEONHD(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): Mapping DIG2 encoder to KLDSKP_LVTMA (II) RADEONHD(0): On Crtc 0 Setting 60.0 Hz Mode: Modeline "1920x1200" 154.00 1920 1968 2000 2080 1200 1203 1209 1235 +hsync -vsync None (II) RADEONHD(0): RHDAudioSetClock: using UNIPHY_KLDSKP_LVTMA as clock source with 154000 khz (II) RADEONHD(0): Using ACR timing N=4096 CTS=154000 for frequency 32000 (II) RADEONHD(0): Using ACR timing N=6272 CTS=171111 for frequency 44100 (II) RADEONHD(0): Using ACR timing N=6144 CTS=154000 for frequency 48000 (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): RHDAudioSetSupported: config 0x60040 codec 0x1 (**) Option "dpms" (**) RADEONHD(0): DPMS enabled (--) RandR disabled (II) Setting vga for screen 0. (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) Initializing built-in extension XEVIE (II) AIGLX: Loaded and initialized /PCBSD/local/lib/dri/swrast_dri.so (II) GLX: Initialized DRISWRAST GL provider for screen 0 (II) RADEONHD(0): Setting screen physical size to 550 x 343 (**) Option "Protocol" "auto" (**) Mouse0: Device: "/dev/sysmouse" (**) Mouse0: Protocol: "auto" (**) Option "CorePointer" (**) Mouse0: always reports core events (**) Option "Device" "/dev/sysmouse" (**) Option "Buttons" "6" (**) Option "Emulate3Buttons" (**) Mouse0: Emulate3Buttons, Emulate3Timeout: 50 (**) Option "ZAxisMapping" "4 5" (**) Mouse0: ZAxisMapping: buttons 4 and 5 (**) Mouse0: Buttons: 10 (**) Mouse0: Sensitivity: 1 (**) Option "CoreKeyboard" (**) Keyboard0: always reports core events (**) Option "Protocol" "standard" (**) Keyboard0: Protocol: standard (**) Option "AutoRepeat" "500 30" (**) Option "XkbRules" "xorg" (**) Keyboard0: XkbRules: "xorg" (**) Option "XkbModel" "pc105" (**) Keyboard0: XkbModel: "pc105" (**) Option "XkbLayout" "us" (**) Keyboard0: XkbLayout: "us" (WW) Option "XkbVariant" requires an string value (**) Option "CustomKeycodes" "off" (**) Keyboard0: CustomKeycodes disabled (II) evaluating device (Mouse0) (II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE) (II) evaluating device (Keyboard0) (II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD) (II) Mouse0: SetupAuto: hw.iftype is 4, hw.model is 0 (II) Mouse0: SetupAuto: protocol is SysMouse (II) UnloadModule: "mouse" (II) UnloadModule: "kbd" rhd_crtc.c:586: DxModeRestore: Assertion '!RHD_CHECKDEBUGFLAG(rhdPtr, VGA_SETUP)' failed. Fatal server error: Caught signal 11. Server aborting rhd_crtc.c:586: DxModeRestore: Assertion '!RHD_CHECKDEBUGFLAG(rhdPtr, VGA_SETUP)' failed. FatalError re-entered, aborting Server aborting X.Org X Server 1.5.3 Release Date: 5 November 2008 X Protocol Version 11, Revision 0 Build Operating System: FreeBSD 7.0-RELEASE i386 Current Operating System: FreeBSD pcbsd 7.2-PRERELEASE FreeBSD 7.2-PRERELEASE #12: Fri Apr 17 15:37:58 EDT 2009 root@pcbsdx32-7:/usr/obj/pcbsd-build71/cvs/7.1-src/sys/PCBSD i386 Build Date: 31 March 2009 02:52:21AM Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Wed May 13 13:32:55 2009 (==) Using config file: "/etc/X11/xorg.conf" (==) ServerLayout "XFree86 Configured" (**) |-->Screen "Screen0" (0) (**) | |-->Monitor "Monitor0" (**) | |-->Device "Card0" (**) |-->Input Device "Mouse0" (**) |-->Input Device "Keyboard0" (**) Option "DisableVidModeExtension" "True" (**) Option "AllowEmptyInput" "Off" (**) Option "AutoAddDevices" "False" (**) Not automatically adding devices (==) Automatically enabling devices (WW) The directory "/PCBSD/local/lib/X11/fonts/illinoy/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/webfonts/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/Speedo/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/CID/" does not exist. Entry deleted from font path. (WW) `fonts.dir' not found (or not valid) in "/PCBSD/local/lib/X11/fonts/dejavu/". Entry deleted from font path. (Run 'mkfontdir' on "/PCBSD/local/lib/X11/fonts/dejavu/"). (WW) The directory "/PCBSD/local/lib/X11/fonts/hebrew/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/vietnamese/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/indic/" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/AAHS" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/AGA" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/FS" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/Kasr" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/MCS" does not exist. Entry deleted from font path. (WW) The directory "/PCBSD/local/lib/X11/fonts/ae_fonts1/Shmookh" does not exist. Entry deleted from font path. (WW) `fonts.dir' not found (or not valid) in "/PCBSD/local/lib/X11/fonts/local/". Entry deleted from font path. (Run 'mkfontdir' on "/PCBSD/local/lib/X11/fonts/local/"). (==) Including the default font path /PCBSD/local/lib/X11/fonts/misc/,/PCBSD/local/lib/X11/fonts/TTF/,/PCBSD/local/lib/X11/fonts/OTF,/PCBSD/local/lib/X11/fonts/Type1/,/PCBSD/local/lib/X11/fonts/100dpi/,/PCBSD/local/lib/X11/fonts/75dpi/. (**) FontPath set to: /PCBSD/local/lib/X11/fonts/cyrillic/, /PCBSD/local/lib/X11/fonts/TrueType/, /PCBSD/local/lib/X11/fonts/misc/, /PCBSD/local/lib/X11/fonts/TTF/, /PCBSD/local/lib/X11/fonts/Type1/, /PCBSD/local/lib/X11/fonts/75dpi/, /PCBSD/local/lib/X11/fonts/100dpi/, /PCBSD/local/lib/X11/fonts/cyrillic/, /PCBSD/local/lib/X11/fonts/misc/, /PCBSD/local/lib/X11/fonts/TTF/, /PCBSD/local/lib/X11/fonts/OTF, /PCBSD/local/lib/X11/fonts/Type1/, /PCBSD/local/lib/X11/fonts/100dpi/, /PCBSD/local/lib/X11/fonts/75dpi/ (**) ModulePath set to "/PCBSD/local/lib/modules,/PCBSD/local/lib/xorg/modules" (II) Loader magic: 0x81bcde0 (II) Module ABI versions: X.Org ANSI C Emulation: 0.4 X.Org Video Driver: 4.1 X.Org XInput driver : 2.1 X.Org Server Extension : 1.1 X.Org Font Renderer : 0.6 (II) Loader running on freebsd (--) Using syscons driver with X support (version 2.0) (--) using VT number 9 (--) PCI:*(0@1:0:0) ATI Technologies Inc Mobility Radeon HD 3600 Series rev 0, Mem @ 0xd0000000/0, 0xfe9f0000/0, I/O @ 0x0000d000/0, BIOS @ 0x????????/65536 (II) System resource ranges: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) "extmod" will be loaded. This was enabled by default and also specified in the config file. (II) "dbe" will be loaded. This was enabled by default and also specified in the config file. (II) "glx" will be loaded. This was enabled by default and also specified in the config file. (II) "freetype" will be loaded. This was enabled by default and also specified in the config file. (II) "record" will be loaded. This was enabled by default and also specified in the config file. (II) "dri" will be loaded. This was enabled by default and also specified in the config file. (II) LoadModule: "record" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension RECORD (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) LoadModule: "dri" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 1.1 (II) Loading extension XFree86-DRI (II) LoadModule: "dbe" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "extmod" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension SHAPE (II) Loading extension MIT-SUNDRY-NONSTANDARD (II) Loading extension BIG-REQUESTS (II) Loading extension SYNC (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XC-MISC (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-Misc (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension TOG-CUP (II) Loading extension Extended-Visual-Information (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "glx" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org Server Extension, version 1.1 (==) AIGLX disabled (==) Exporting typical set of GLX visuals (II) Loading extension GLX (II) LoadModule: "xtrap" (II) Loading /PCBSD/local/lib/xorg/modules/extensions//libxtrap.so (II) Module xtrap: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 1.1 (II) Loading extension DEC-XTRAP (II) LoadModule: "freetype" (II) Loading /PCBSD/local/lib/xorg/modules/fonts//libfreetype.so (II) Module freetype: vendor="X.Org Foundation & the After X-TT Project" compiled for 1.5.3, module version = 2.1.0 Module class: X.Org Font Renderer ABI class: X.Org Font Renderer, version 0.6 (II) Loading font FreeType (II) LoadModule: "radeonhd" (II) Loading /PCBSD/local/lib/xorg/modules/drivers//radeonhd_drv.so (II) Module radeonhd: vendor="AMD GPG" compiled for 1.5.3, module version = 1.2.5 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 4.1 (II) LoadModule: "mouse" (II) Loading /PCBSD/local/lib/xorg/modules/input//mouse_drv.so (II) Module mouse: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.4.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 2.1 (II) LoadModule: "kbd" (II) Loading /PCBSD/local/lib/xorg/modules/input//kbd_drv.so (II) Module kbd: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.3.2 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 2.1 (II) RADEONHD: X driver for the following AMD GPG (ATI) graphics devices: RV505 : Radeon X1550, X1550 64bit. RV515 : Radeon X1300, X1550, X1600; FireGL V3300, V3350. RV516 : Radeon X1300, X1550, X1550 64-bit, X1600; FireMV 2250. R520 : Radeon X1800; FireGL V5300, V7200, V7300, V7350. RV530 : Radeon X1300 XT, X1600, X1600 Pro, X1650; FireGL V3400, V5200. RV535 : Radeon X1300, X1650. RV550 : Radeon X2300 HD. RV560 : Radeon X1650. RV570 : Radeon X1950, X1950 GT; FireGL V7400. R580 : Radeon X1900, X1950; AMD Stream Processor. R600 : Radeon HD 2900 GT/Pro/XT; FireGL V7600/V8600/V8650. RV610 : Radeon HD 2350, HD 2400 Pro/XT, HD 2400 Pro AGP; FireGL V4000. RV620 : Radeon HD 3450, HD 3470. RV630 : Radeon HD 2600 LE/Pro/XT, HD 2600 Pro/XT AGP; Gemini RV630; FireGL V3600/V5600. RV635 : Radeon HD 3650, HD 3670. RV670 : Radeon HD 3690, 3850, HD 3870, FireGL V7700, FireStream 9170. R680 : Radeon HD 3870 X2. M52 : Mobility Radeon X1300. M54 : Mobility Radeon X1400; M54-GL. M56 : Mobility Radeon X1600; Mobility FireGL V5200. M58 : Mobility Radeon X1800, X1800 XT; Mobility FireGL V7100, V7200. M62 : Mobility Radeon X1350. M64 : Mobility Radeon X1450, X2300. M66 : Mobility Radeon X1700, X1700 XT; FireGL V5250. M68 : Mobility Radeon X1900. M71 : Mobility Radeon HD 2300. M72 : Mobility Radeon HD 2400; Radeon E2400. M74 : Mobility Radeon HD 2400 XT. M76 : Mobility Radeon HD 2600; (Gemini ATI) Mobility Radeon HD 2600 XT. M82 : Mobility Radeon HD 3400. M86 : Mobility Radeon HD 3650, HD 3670, Mobility FireGL V5700. M88 : Mobility Radeon HD 3850, HD 3850 X2, HD 3870, HD3870 X2. RS600 : Radeon Xpress 1200, Xpress 1250. RS690 : Radeon X1200, X1250, X1270. RS740 : RS740, RS740M. RS780 : Radeon HD 3100/3200/3300 Series. RV770 : Radeon HD 4800 Series; Everest, K2, Denali ATI FirePro. R700 : Radeon R700. M98 : Radeon M98 Mobility. RV730 : Radeon HD4670, HD4650. M96 : Radeon M96 Mobility. RV710 : Radeon HD4570, HD4350. (II) RADEONHD: version 1.2.5, built from dist of git branch master, commit cb54f48b (II) Primary Device is: PCI 01@00:00:0 (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) resource ranges after probing: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Setting vga for screen 0. (**) RADEONHD(0): Depth 24, (--) framebuffer bpp 32 (**) RADEONHD(0): Option "NoAccel" "False" (**) RADEONHD(0): Option "AccelMethod" "EXA" (**) RADEONHD(0): Option "DRI" "On" (**) RADEONHD(0): Selected EXA 2D acceleration. (II) RADEONHD(0): Unknown card detected: 0x9598:0x174B:0x3001. If - and only if - your card does not work or does not work optimally please contact radeonhd@opensuse.org to help rectify this. Use the subject: 0x9598:0x174B:0x3001: <name of board> and *please* describe the problems you are seeing in your message. (--) RADEONHD(0): Detected an RV635 on an unidentified card (II) RADEONHD(0): Mapped IO @ 0xfe9f0000 to 0x286b6000 (size 0x00010000) (II) RADEONHD(0): PCIE Card Detected (II) RADEONHD(0): Getting BIOS copy from legacy VBIOS location (II) RADEONHD(0): ATOM BIOS Rom: SubsystemVendorID: 0x174b SubsystemID: 0x3001 IOBaseAddress: 0xd000 Filename: DE4202SA.004 BIOS Bootup Message: HD3750 GDDR3_16MX32 128BIT 512MB 800E/700M (II) RADEONHD(0): Analog TV Default Mode: 8 (II) RADEONHD(0): Found default TV Mode PAL (II) RADEONHD(0): The detected amount of videoram exceeds the PCI BAR aperture. (II) RADEONHD(0): Using only 262144kB of the total 524288kB. (--) RADEONHD(0): VideoRAM: 262144 kByte (II) RADEONHD(0): Framebuffer space used by Firmware (kb): 16 (II) RADEONHD(0): Start of VRAM area used by Firmware: 0x1fffc000 (II) RADEONHD(0): AtomBIOS requests 16kB of VRAM scratch space (II) RADEONHD(0): AtomBIOS VRAM scratch base: 0x1fffc000 (WW) RADEONHD(0): rhdAtomAllocateFbScratch: FW FB scratch area 536854528 (size: 16384) extends beyond available framebuffer size 268435456 (II) RADEONHD(0): Cannot get VRAM scratch space. Allocating in main memory instead (II) RADEONHD(0): Default Engine Clock: 800000 (II) RADEONHD(0): Default Memory Clock: 700000 (II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000 (II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Input: 13500 (II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Input: 1000 (II) RADEONHD(0): Maximum Pixel Clock: 400000 (II) RADEONHD(0): Reference Clock: 27000 (WW) RADEONHD(0): Direct rendering for R600 and up forced on - This is NOT officially supported yet and may cause instability or lockups (II) RADEONHD(0): Found libdri 5.4.0. drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: drmOpenMinor returns 10 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) RADEONHD(0): Found libdrm 1.3.0. (II) RADEONHD(0): Found radeon drm 1.29.0. (II) Loading sub module "i2c" (II) LoadModule: "i2c" (II) Module "i2c" already built-in (II) RADEONHD(0): Reference Clock: 27000 (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f90 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f90 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 0" initialized. (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f94 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f94 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 1" initialized. (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f98 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f98 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 2" initialized. (II) RADEONHD(0): GPIO_I2C_Clk_Mask: 0x1f88 (II) RADEONHD(0): GPIO_I2C_Clk_Mask_Shift: 0x0 (II) RADEONHD(0): GPIO_I2C_Data_Mask: 0x1f88 (II) RADEONHD(0): GPIO_I2C_Data_Mask_Shift: 0x8 (II) RADEONHD(0): I2C bus "RHD I2C line 3" initialized. (II) Loading sub module "ddc" (II) LoadModule: "ddc" (II) Module "ddc" already built-in (II) RADEONHD(0): Minimum Pixel ClockPLL Frequency Output: 0 (II) RADEONHD(0): Maximum Pixel ClockPLL Frequency Output: 1200000 (II) RADEONHD(0): Maximum Pixel Clock: 400000 (II) RADEONHD(0): Reference Clock: 27000 (II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00000000 (size = 0x00004000) (II) RADEONHD(0): FB: Allocated Cursor Image at offset 0x00004000 (size = 0x00004000) (II) RADEONHD(0): Connector[0] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I CRT1 DFP2", RHD_DDC_0, RHD_HPD_1, { RHD_OUTPUT_KLDSKP_LVTMA, RHD_OUTPUT_DACA } } (II) RADEONHD(0): Connector[1] {RHD_CONNECTOR_TV, "7PIN_DIN TV1 CV", RHD_DDC_0, RHD_HPD_NONE, { RHD_OUTPUT_DACB, RHD_OUTPUT_NONE } } (II) RADEONHD(0): Connector[2] {RHD_CONNECTOR_DVI, "DUAL_LINK_DVI_I DFP1 CRT2", RHD_DDC_1, RHD_HPD_0, { RHD_OUTPUT_UNIPHYA, RHD_OUTPUT_DACB } } (--) RADEONHD(0): Attaching Output UNIPHY_KLDSKP_LVTMA to Connector DVI-I 1 (--) RADEONHD(0): Attaching Output DAC A to Connector DVI-I 1 (--) RADEONHD(0): Attaching Output DAC B to Connector TV 7PIN_DIN (--) RADEONHD(0): Attaching Output UNIPHY_A to Connector DVI-I 2 (--) RADEONHD(0): Attaching Output DAC B to Connector DVI-I 2 (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/digital for Output UNIPHY_KLDSKP_LVTMA (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_1/analog for Output DAC A (II) RADEONHD(0): RandR: Adding RRoutput TV_7PIN_DIN for Output DAC B (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_2/digital for Output UNIPHY_A (II) RADEONHD(0): RandR: Adding RRoutput DVI-I_2/analog for Output DAC B (II) RADEONHD(0): Output DVI-I_1/digital using monitor section Monitor0 (II) RADEONHD(0): Output DVI-I_1/digital has no monitor section (II) RADEONHD(0): Output DVI-I_1/analog has no monitor section (II) RADEONHD(0): Output TV_7PIN_DIN has no monitor section (II) RADEONHD(0): Output DVI-I_2/digital has no monitor section (II) RADEONHD(0): Output DVI-I_2/analog has no monitor section (II) RADEONHD(0): Setting UNIPHY_KLDSKP_LVTMA to incoherent (II) RADEONHD(0): I2C device "RHD I2C line 0:ddc2" registered at address 0xA0. (II) RADEONHD(0): EDID data for W2600 (II) RADEONHD(0): Manufacturer: GSM Model: 5675 Serial#: 216259 (II) RADEONHD(0): Year: 2008 Week: 7 (II) RADEONHD(0): EDID Version: 1.3 (II) RADEONHD(0): Digital Display Input (II) RADEONHD(0): Max Image Size [cm]: horiz.: 55 vert.: 34 (II) RADEONHD(0): Gamma: 2.20 (II) RADEONHD(0): DPMS capabilities: StandBy Suspend Off (II) RADEONHD(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEONHD(0): First detailed timing is preferred mode (II) RADEONHD(0): redX: 0.659 redY: 0.327 greenX: 0.218 greenY: 0.682 (II) RADEONHD(0): blueX: 0.141 blueY: 0.068 whiteX: 0.313 whiteY: 0.329 (II) RADEONHD(0): Supported VESA Video Modes: (II) RADEONHD(0): 720x400@70Hz (II) RADEONHD(0): 640x480@60Hz (II) RADEONHD(0): 640x480@75Hz (II) RADEONHD(0): 800x600@60Hz (II) RADEONHD(0): 800x600@75Hz (II) RADEONHD(0): 1024x768@60Hz (II) RADEONHD(0): 1024x768@75Hz (II) RADEONHD(0): 1280x1024@75Hz (II) RADEONHD(0): 1152x870@75Hz (II) RADEONHD(0): Manufacturer's mask: 0 (II) RADEONHD(0): Supported Future Video Modes: (II) RADEONHD(0): #0: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEONHD(0): #1: hsize: 1280 vsize 1024 refresh: 75 vid: 36737 (II) RADEONHD(0): #2: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEONHD(0): #3: hsize: 1280 vsize 960 refresh: 75 vid: 20353 (II) RADEONHD(0): #4: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 154.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1920 h_sync: 1968 h_sync_end 2000 h_blank_end 2080 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1203 v_sync_end 1209 v_blanking: 1235 v_border: 0 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 162.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1600 h_sync: 1664 h_sync_end 1856 h_blank_end 2160 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1201 v_sync_end 1204 v_blanking: 1250 v_border: 0 (II) RADEONHD(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 83 kHz, PixClock max 170 MHz (II) RADEONHD(0): Monitor name: W2600 (II) RADEONHD(0): EDID (in hex): (II) RADEONHD(0): 00ffffffffffff001e6d7556c34c0300 (II) RADEONHD(0): 0712010380372278eafe25a85337ae24 (II) RADEONHD(0): 115054a54b80a940818fb300814f8180 (II) RADEONHD(0): 010101010101283c80a070b023403020 (II) RADEONHD(0): 360026572100001a483f403062b03240 (II) RADEONHD(0): 40c0130026572100001e000000fd0038 (II) RADEONHD(0): 4b1e5311000a202020202020000000fc (II) RADEONHD(0): 0057323630300a202020202020200017 (II) RADEONHD(0): EDID vendor "GSM", prod id 22133 (II) RADEONHD(0): Using hsync ranges from config file (II) RADEONHD(0): Using vrefresh ranges from config file (II) RADEONHD(0): Printing DDC gathered Modelines: (II) RADEONHD(0): Modeline "1920x1200"x0.0 154.00 1920 1968 2000 2080 1200 1203 1209 1235 +hsync -vsync (74.0 kHz) (II) RADEONHD(0): Modeline "1600x1200"x0.0 162.00 1600 1664 1856 2160 1200 1201 1204 1250 +hsync +vsync (75.0 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEONHD(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEONHD(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz) (II) RADEONHD(0): Modeline "1600x1200"x60.0 160.96 1600 1704 1880 2160 1200 1201 1204 1242 -hsync +vsync (74.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x75.0 138.54 1280 1368 1504 1728 1024 1025 1028 1069 -hsync +vsync (80.2 kHz) (II) RADEONHD(0): Modeline "1680x1050"x60.0 147.14 1680 1784 1968 2256 1050 1051 1054 1087 -hsync +vsync (65.2 kHz) (II) RADEONHD(0): Modeline "1280x960"x75.0 129.86 1280 1368 1504 1728 960 961 964 1002 -hsync +vsync (75.2 kHz) (II) RADEONHD(0): Modeline "1280x1024"x60.0 108.88 1280 1360 1496 1712 1024 1025 1028 1060 -hsync +vsync (63.6 kHz) (II) RADEONHD(0): Output DVI-I_1/digital connected (II) RADEONHD(0): Output DVI-I_1/analog disconnected (II) RADEONHD(0): Output TV_7PIN_DIN disconnected (II) RADEONHD(0): Output DVI-I_2/digital disconnected (II) RADEONHD(0): Output DVI-I_2/analog disconnected (II) RADEONHD(0): Using user preference for initial modes (II) RADEONHD(0): Output DVI-I_1/digital using initial mode 1920x1200 (II) RADEONHD(0): RandR 1.2 support enabled (==) RADEONHD(0): RGB weight 888 (==) RADEONHD(0): Default visual is TrueColor (==) RADEONHD(0): Using gamma correction (1.0, 1.0, 1.0) (II) RADEONHD(0): Using 1920x1920 Framebuffer with 1920 pitch (II) RADEONHD(0): FB: Allocated ScanoutBuffer at offset 0x00008000 (size = 0x00E10000) (**) RADEONHD(0): Display dimensions: (550, 340) mm (**) RADEONHD(0): DPI set to (88, 143) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /PCBSD/local/lib/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.5.3, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.4 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac" (II) Module "ramdac" already built-in (II) Loading sub module "exa" (II) LoadModule: "exa" (II) Loading /PCBSD/local/lib/xorg/modules//libexa.so (II) Module exa: vendor="X.Org Foundation" compiled for 1.5.3, module version = 2.4.0 ABI class: X.Org Video Driver, version 4.1 (II) RADEONHD(0): FB: Allocated Offscreen Buffer at offset 0x00E18000 (size = 0x0199A000) (II) RADEONHD(0): FB: Allocated DRI Back Buffer at offset 0x027B2000 (size = 0x00E10000) (II) RADEONHD(0): FB: Allocated DRI Depth Buffer at offset 0x035C2000 (size = 0x00E10000) (II) RADEONHD(0): FB: Allocated GART table at offset 0x0FFF0000 (size = 0x00010000, end of FB) (II) RADEONHD(0): FB: Allocated DRI Textures at offset 0x043D2000 (size = 0x0BC00000) (II) RADEONHD(0): Using 16 MB GART aperture (II) RADEONHD(0): Using 2 MB for the ring buffer (II) RADEONHD(0): Using 2 MB for vertex/indirect buffers (II) RADEONHD(0): Using 12 MB for GART textures (--) Depth 24 pixmap format is 32 bpp (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [5] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [6] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [7] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [8] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [9] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [10] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) RADEONHD(0): Mapped IO @ 0xfe9f0000 to 0x286b6000 (size 0x00010000) (II) RADEONHD(0): Mapped FB @ 0xd0000000 to 0x28c00000 (size 0x10000000) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: Searching for BusID pci:0000:01:00.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 10, (OK) drmOpenByBusid: drmOpenMinor returns 10 drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0 (II) [drm] DRM interface version 1.2 (II) [drm] DRM open master succeeded. (II) RADEONHD(0): [drm] Using the DRM lock SAREA also for drawables. (II) RADEONHD(0): [drm] framebuffer handle = 0xd0000000 (II) RADEONHD(0): [drm] added 1 reserved context for kernel (II) RADEONHD(0): X context handle = 0x2 (II) RADEONHD(0): [drm] installed DRM signal handler (EE) RADEONHD(0): [pci] Out of memory (-12) (EE) RADEONHD(0): [pci] PCI failed to initialize. Disabling the DRI. (II) RADEONHD(0): [drm] removed 1 reserved context for kernel (II) RADEONHD(0): [drm] unmapping 8192 bytes of SAREA 0xc9e20000 at 0x286f8000 (II) RADEONHD(0): [drm] Closed DRM master. (WW) RADEONHD(0): RHDCSInit: No CS for R600 and up yet. (==) RADEONHD(0): Backing store disabled (==) RADEONHD(0): Silken mouse enabled (II) RADEONHD(0): RandR 1.2 enabled, ignore the following RandR disabled message. (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): Mapping DIG2 encoder to KLDSKP_LVTMA (II) RADEONHD(0): On Crtc 0 Setting 60.0 Hz Mode: Modeline "1920x1200" 154.00 1920 1968 2000 2080 1200 1203 1209 1235 +hsync -vsync None (II) RADEONHD(0): RHDAudioSetClock: using UNIPHY_KLDSKP_LVTMA as clock source with 154000 khz (II) RADEONHD(0): Using ACR timing N=4096 CTS=154000 for frequency 32000 (II) RADEONHD(0): Using ACR timing N=6272 CTS=171111 for frequency 44100 (II) RADEONHD(0): Using ACR timing N=6144 CTS=154000 for frequency 48000 (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): Calling UNIPHYTransmitterControl (II) RADEONHD(0): UNIPHYTransmitterControl Successful (II) RADEONHD(0): RHDAudioSetSupported: config 0x60040 codec 0x1 (**) Option "dpms" (**) RADEONHD(0): DPMS enabled (--) RandR disabled (II) Setting vga for screen 0. (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) Initializing built-in extension XEVIE (II) AIGLX: Loaded and initialized /PCBSD/local/lib/dri/swrast_dri.so (II) GLX: Initialized DRISWRAST GL provider for screen 0 (II) RADEONHD(0): Setting screen physical size to 550 x 343 (**) Option "Protocol" "auto" (**) Mouse0: Device: "/dev/sysmouse" (**) Mouse0: Protocol: "auto" (**) Option "CorePointer" (**) Mouse0: always reports core events (**) Option "Device" "/dev/sysmouse" (**) Option "Buttons" "6" (**) Option "Emulate3Buttons" (**) Mouse0: Emulate3Buttons, Emulate3Timeout: 50 (**) Option "ZAxisMapping" "4 5" (**) Mouse0: ZAxisMapping: buttons 4 and 5 (**) Mouse0: Buttons: 10 (**) Mouse0: Sensitivity: 1 (**) Option "CoreKeyboard" (**) Keyboard0: always reports core events (**) Option "Protocol" "standard" (**) Keyboard0: Protocol: standard (**) Option "AutoRepeat" "500 30" (**) Option "XkbRules" "xorg" (**) Keyboard0: XkbRules: "xorg" (**) Option "XkbModel" "pc105" (**) Keyboard0: XkbModel: "pc105" (**) Option "XkbLayout" "us" (**) Keyboard0: XkbLayout: "us" (WW) Option "XkbVariant" requires an string value (**) Option "CustomKeycodes" "off" (**) Keyboard0: CustomKeycodes disabled (II) evaluating device (Mouse0) (II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE) (II) evaluating device (Keyboard0) (II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD) (II) Mouse0: SetupAuto: hw.iftype is 4, hw.model is 0 (II) Mouse0: SetupAuto: protocol is SysMouse (II) config/hal: Adding input device USB Multimedia Keyboard (EE) config/hal: NewInputDeviceRequest failed (II) config/hal: Adding input device AT Keyboard (EE) config/hal: NewInputDeviceRequest failed (II) config/hal: Adding input device PS/2 Mouse (EE) config/hal: NewInputDeviceRequest failed (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x00 IEC60958 status bits and 0x00 category code (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: stoped with 1 channels, 48000 Hz sampling rate, 8 bits per sample, (II) RADEONHD(0): RHDHdmiUpdateAudioSettings: 0x00 IEC60958 status bits and 0x00 category code (II) RADEONHD(0): EDID data for W2600 (II) RADEONHD(0): Manufacturer: GSM Model: 5675 Serial#: 216259 (II) RADEONHD(0): Year: 2008 Week: 7 (II) RADEONHD(0): EDID Version: 1.3 (II) RADEONHD(0): Digital Display Input (II) RADEONHD(0): Max Image Size [cm]: horiz.: 55 vert.: 34 (II) RADEONHD(0): Gamma: 2.20 (II) RADEONHD(0): DPMS capabilities: StandBy Suspend Off (II) RADEONHD(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEONHD(0): First detailed timing is preferred mode (II) RADEONHD(0): redX: 0.659 redY: 0.327 greenX: 0.218 greenY: 0.682 (II) RADEONHD(0): blueX: 0.141 blueY: 0.068 whiteX: 0.313 whiteY: 0.329 (II) RADEONHD(0): Supported VESA Video Modes: (II) RADEONHD(0): 720x400@70Hz (II) RADEONHD(0): 640x480@60Hz (II) RADEONHD(0): 640x480@75Hz (II) RADEONHD(0): 800x600@60Hz (II) RADEONHD(0): 800x600@75Hz (II) RADEONHD(0): 1024x768@60Hz (II) RADEONHD(0): 1024x768@75Hz (II) RADEONHD(0): 1280x1024@75Hz (II) RADEONHD(0): 1152x870@75Hz (II) RADEONHD(0): Manufacturer's mask: 0 (II) RADEONHD(0): Supported Future Video Modes: (II) RADEONHD(0): #0: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEONHD(0): #1: hsize: 1280 vsize 1024 refresh: 75 vid: 36737 (II) RADEONHD(0): #2: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEONHD(0): #3: hsize: 1280 vsize 960 refresh: 75 vid: 20353 (II) RADEONHD(0): #4: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 154.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1920 h_sync: 1968 h_sync_end 2000 h_blank_end 2080 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1203 v_sync_end 1209 v_blanking: 1235 v_border: 0 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 162.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1600 h_sync: 1664 h_sync_end 1856 h_blank_end 2160 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1201 v_sync_end 1204 v_blanking: 1250 v_border: 0 (II) RADEONHD(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 83 kHz, PixClock max 170 MHz (II) RADEONHD(0): Monitor name: W2600 (II) RADEONHD(0): EDID (in hex): (II) RADEONHD(0): 00ffffffffffff001e6d7556c34c0300 (II) RADEONHD(0): 0712010380372278eafe25a85337ae24 (II) RADEONHD(0): 115054a54b80a940818fb300814f8180 (II) RADEONHD(0): 010101010101283c80a070b023403020 (II) RADEONHD(0): 360026572100001a483f403062b03240 (II) RADEONHD(0): 40c0130026572100001e000000fd0038 (II) RADEONHD(0): 4b1e5311000a202020202020000000fc (II) RADEONHD(0): 0057323630300a202020202020200017 (II) RADEONHD(0): EDID vendor "GSM", prod id 22133 (II) RADEONHD(0): Using hsync ranges from config file (II) RADEONHD(0): Using vrefresh ranges from config file (II) RADEONHD(0): Printing DDC gathered Modelines: (II) RADEONHD(0): Modeline "1920x1200"x0.0 154.00 1920 1968 2000 2080 1200 1203 1209 1235 +hsync -vsync (74.0 kHz) (II) RADEONHD(0): Modeline "1600x1200"x0.0 162.00 1600 1664 1856 2160 1200 1201 1204 1250 +hsync +vsync (75.0 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEONHD(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEONHD(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz) (II) RADEONHD(0): Modeline "1600x1200"x60.0 160.96 1600 1704 1880 2160 1200 1201 1204 1242 -hsync +vsync (74.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x75.0 138.54 1280 1368 1504 1728 1024 1025 1028 1069 -hsync +vsync (80.2 kHz) (II) RADEONHD(0): Modeline "1680x1050"x60.0 147.14 1680 1784 1968 2256 1050 1051 1054 1087 -hsync +vsync (65.2 kHz) (II) RADEONHD(0): Modeline "1280x960"x75.0 129.86 1280 1368 1504 1728 960 961 964 1002 -hsync +vsync (75.2 kHz) (II) RADEONHD(0): Modeline "1280x1024"x60.0 108.88 1280 1360 1496 1712 1024 1025 1028 1060 -hsync +vsync (63.6 kHz) (II) RADEONHD(0): EDID data for W2600 (II) RADEONHD(0): Manufacturer: GSM Model: 5675 Serial#: 216259 (II) RADEONHD(0): Year: 2008 Week: 7 (II) RADEONHD(0): EDID Version: 1.3 (II) RADEONHD(0): Digital Display Input (II) RADEONHD(0): Max Image Size [cm]: horiz.: 55 vert.: 34 (II) RADEONHD(0): Gamma: 2.20 (II) RADEONHD(0): DPMS capabilities: StandBy Suspend Off (II) RADEONHD(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 (II) RADEONHD(0): First detailed timing is preferred mode (II) RADEONHD(0): redX: 0.659 redY: 0.327 greenX: 0.218 greenY: 0.682 (II) RADEONHD(0): blueX: 0.141 blueY: 0.068 whiteX: 0.313 whiteY: 0.329 (II) RADEONHD(0): Supported VESA Video Modes: (II) RADEONHD(0): 720x400@70Hz (II) RADEONHD(0): 640x480@60Hz (II) RADEONHD(0): 640x480@75Hz (II) RADEONHD(0): 800x600@60Hz (II) RADEONHD(0): 800x600@75Hz (II) RADEONHD(0): 1024x768@60Hz (II) RADEONHD(0): 1024x768@75Hz (II) RADEONHD(0): 1280x1024@75Hz (II) RADEONHD(0): 1152x870@75Hz (II) RADEONHD(0): Manufacturer's mask: 0 (II) RADEONHD(0): Supported Future Video Modes: (II) RADEONHD(0): #0: hsize: 1600 vsize 1200 refresh: 60 vid: 16553 (II) RADEONHD(0): #1: hsize: 1280 vsize 1024 refresh: 75 vid: 36737 (II) RADEONHD(0): #2: hsize: 1680 vsize 1050 refresh: 60 vid: 179 (II) RADEONHD(0): #3: hsize: 1280 vsize 960 refresh: 75 vid: 20353 (II) RADEONHD(0): #4: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 154.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1920 h_sync: 1968 h_sync_end 2000 h_blank_end 2080 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1203 v_sync_end 1209 v_blanking: 1235 v_border: 0 (II) RADEONHD(0): Supported additional Video Mode: (II) RADEONHD(0): clock: 162.0 MHz Image Size: 550 x 343 mm (II) RADEONHD(0): h_active: 1600 h_sync: 1664 h_sync_end 1856 h_blank_end 2160 h_border: 0 (II) RADEONHD(0): v_active: 1200 v_sync: 1201 v_sync_end 1204 v_blanking: 1250 v_border: 0 (II) RADEONHD(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 83 kHz, PixClock max 170 MHz (II) RADEONHD(0): Monitor name: W2600 (II) RADEONHD(0): EDID (in hex): (II) RADEONHD(0): 00ffffffffffff001e6d7556c34c0300 (II) RADEONHD(0): 0712010380372278eafe25a85337ae24 (II) RADEONHD(0): 115054a54b80a940818fb300814f8180 (II) RADEONHD(0): 010101010101283c80a070b023403020 (II) RADEONHD(0): 360026572100001a483f403062b03240 (II) RADEONHD(0): 40c0130026572100001e000000fd0038 (II) RADEONHD(0): 4b1e5311000a202020202020000000fc (II) RADEONHD(0): 0057323630300a202020202020200017 (II) RADEONHD(0): EDID vendor "GSM", prod id 22133 (II) RADEONHD(0): Using hsync ranges from config file (II) RADEONHD(0): Using vrefresh ranges from config file (II) RADEONHD(0): Printing DDC gathered Modelines: (II) RADEONHD(0): Modeline "1920x1200"x0.0 154.00 1920 1968 2000 2080 1200 1203 1209 1235 +hsync -vsync (74.0 kHz) (II) RADEONHD(0): Modeline "1600x1200"x0.0 162.00 1600 1664 1856 2160 1200 1201 1204 1250 +hsync +vsync (75.0 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) RADEONHD(0): Modeline "640x480"x0.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) RADEONHD(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz) (II) RADEONHD(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) RADEONHD(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) RADEONHD(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz) (II) RADEONHD(0): Modeline "1600x1200"x60.0 160.96 1600 1704 1880 2160 1200 1201 1204 1242 -hsync +vsync (74.5 kHz) (II) RADEONHD(0): Modeline "1280x1024"x75.0 138.54 1280 1368 1504 1728 1024 1025 1028 1069 -hsync +vsync (80.2 kHz) (II) RADEONHD(0): Modeline "1680x1050"x60.0 147.14 1680 1784 1968 2256 1050 1051 1054 1087 -hsync +vsync (65.2 kHz) (II) RADEONHD(0): Modeline "1280x960"x75.0 129.86 1280 1368 1504 1728 960 961 964 1002 -hsync +vsync (75.2 kHz) (II) RADEONHD(0): Modeline "1280x1024"x60.0 108.88 1280 1360 1496 1712 1024 1025 1028 1060 -hsync +vsync (63.6 kHz)
2009/5/13 yerenkow@uct.ua
I have here hanged xorg; it disable all on my pc; I sshed, killed xorg, it restarts but without acceleration.
1 file - it's originally started xorg with error; 2 file - from xorg started second time.
somethings wrong with your drm most likely: (EE) RADEONHD(0): [pci] Out of memory (-12) (EE) RADEONHD(0): [pci] PCI failed to initialize. Disabling the DRI. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
W dniu 12 maja 2009 17:13 użytkownik Alex Deucher
On Tue, May 12, 2009 at 11:08 AM, Rafał Miłecki
wrote: More problematic may be decoding. That can be in 4 ways: 1) Software (CPU) decoding 2) Software (CPU) multi-thread decoding 3) Hardware (GPU) decoding with special hardware engine (vendor specified) 4) Hardware (GPU) decoding with shaders (universal)
1) On modern CPUs you can succesfully decode most 720p movies.
2) Problem comes with 1080p, when one core (for example on my Intel C2D P8400) is often not enought. Then you have to use more cores but standard ffmpeg (used by MPlayer) can't do that. It's implemented in experimental ffmpeg-mt but it is not stable yet (and won't be soon).
3) Both AMD and NVidia has special hardware blocks to decode video (RS690 doesn't AFAIR). Unfortunately that won't become available in open source driver due to some legal issues. NVidia offers it in it's closed driver (VDPAU), AMD doesn't even in fglrx.
4) Nothing special available for now, read http://bitblitter.blogspot.com/
So it's really hard to play full HD material on ATI :( What's worse I don't see any solution coming soon. Personally I use ffmpeg-mt for playing 1080p materials. It sometimes crashes but it mostly happens on starting, stoping and seeking video. Almost never after you already started playback.
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined.
Can you be more specific about this, please? I'm really intereseted Do you mean "is mostly done" or rather "can be mostly done"? Is that implemented anywhere? Does that hardware mean RS690 or R5xx-R7xx, or...? If you mean shared-based decoding why do you mention 3D specs? I thought such a shaders decoding is quite universal, as shareds itself are universal. Don't really understand that, I really would love to hear something more on that. -- Rafał Miłecki -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On Tue, May 12, 2009 at 11:25 AM, Rafał Miłecki
W dniu 12 maja 2009 17:13 użytkownik Alex Deucher
napisał: On Tue, May 12, 2009 at 11:08 AM, Rafał Miłecki
wrote: More problematic may be decoding. That can be in 4 ways: 1) Software (CPU) decoding 2) Software (CPU) multi-thread decoding 3) Hardware (GPU) decoding with special hardware engine (vendor specified) 4) Hardware (GPU) decoding with shaders (universal)
1) On modern CPUs you can succesfully decode most 720p movies.
2) Problem comes with 1080p, when one core (for example on my Intel C2D P8400) is often not enought. Then you have to use more cores but standard ffmpeg (used by MPlayer) can't do that. It's implemented in experimental ffmpeg-mt but it is not stable yet (and won't be soon).
3) Both AMD and NVidia has special hardware blocks to decode video (RS690 doesn't AFAIR). Unfortunately that won't become available in open source driver due to some legal issues. NVidia offers it in it's closed driver (VDPAU), AMD doesn't even in fglrx.
4) Nothing special available for now, read http://bitblitter.blogspot.com/
So it's really hard to play full HD material on ATI :( What's worse I don't see any solution coming soon. Personally I use ffmpeg-mt for playing 1080p materials. It sometimes crashes but it mostly happens on starting, stoping and seeking video. Almost never after you already started playback.
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined.
Can you be more specific about this, please? I'm really intereseted
Do you mean "is mostly done" or rather "can be mostly done"? Is that implemented anywhere? Does that hardware mean RS690 or R5xx-R7xx, or...? If you mean shared-based decoding why do you mention 3D specs? I thought such a shaders decoding is quite universal, as shareds itself are universal. Don't really understand that, I really would love to hear something more on that.
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders. I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever. Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On 13/05/2009, at 3:42 AM, Alex Deucher wrote:
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined.
Can you be more specific about this, please? I'm really intereseted
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders. I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever.
Now this is really interesting. I have some experience in image processing. While I have never really specifically worked on video codecs I am quite familiar with the mathematics of discrete Fourier transforms and the like, and currently have a student working on FPGA implementations of the FFT. I definitely would be interested in coding up the IDCT and MC. I would have to learn about the shaders. It's a bummer XvMC doesn't support h.264 as that is the codec I ultimately would be most interested in. (My computer is powerful enough to decode MPEG2 but not MPEG4). The main problem is time. I don't know if I can put much effort into this. Then again, if I could score a publication or two from it that might help justify some work time or getting a student to do this. Implementing IDCT and MC probably won't achieve that - I'm assuming that it's well known, but maybe implementing some signal processing for image ranging on GPU at the same time... Hmm, I'm starting to ramble - I'll have a think about this. Cheers Michael. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
An XvMC implementation would be a good way to get comfortable with shader-processed video, but the same approach could be used for both motion comp and in-loop deblocking of H.264, you'd just need a different API. I sometimes wonder if it might be easier to just add the shader code to ffmpeg/libavcodec and have it run directly over the drm. That would give more flexibility for incrementally moving the "acceleration point" further up the stack as more work is completed. -----Original Message----- From: Michael Cree [mailto:mcree@orcon.net.nz] Sent: Tuesday, May 12, 2009 5:51 PM To: Alex Deucher Cc: Rafał Miłecki; Anders Eriksson; Matthias Hopf; Christiaan van Dijk; Christian König; radeonhd@opensuse.org Subject: Re: [radeonhd] RS690 full-HD performance On 13/05/2009, at 3:42 AM, Alex Deucher wrote:
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined.
Can you be more specific about this, please? I'm really intereseted
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders. I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever.
Now this is really interesting. I have some experience in image processing. While I have never really specifically worked on video codecs I am quite familiar with the mathematics of discrete Fourier transforms and the like, and currently have a student working on FPGA implementations of the FFT. I definitely would be interested in coding up the IDCT and MC. I would have to learn about the shaders. It's a bummer XvMC doesn't support h.264 as that is the codec I ultimately would be most interested in. (My computer is powerful enough to decode MPEG2 but not MPEG4). The main problem is time. I don't know if I can put much effort into this. Then again, if I could score a publication or two from it that might help justify some work time or getting a student to do this. Implementing IDCT and MC probably won't achieve that - I'm assuming that it's well known, but maybe implementing some signal processing for image ranging on GPU at the same time... Hmm, I'm starting to ramble - I'll have a think about this. Cheers Michael. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
Am Dienstag, den 12.05.2009, 18:00 -0400 schrieb Bridgman, John:
An XvMC implementation would be a good way to get comfortable with shader-processed video, but the same approach could be used for both motion comp and in-loop deblocking of H.264, you'd just need a different API. I actually tried to implement a iDCT test inside r600demo. Haven't been successfully so far, but it should be quite simple. It's just an pixel shader with some cosinus functions, nothing more. You don't even need to do a FFT, because that's only needed in the encoder part, not at decoding time.
@Matthias: I will send you the RS690 HDMI patch tomorrow, don't know if it will work in all cases, but it's at least a good start. Bye, Christian. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On May 13, 09 00:25:01 +0200, Christian König wrote:
@Matthias: I will send you the RS690 HDMI patch tomorrow, don't know if it will work in all cases, but it's at least a good start.
As I said, no need to hurry ;)
Thanks
Matthias
--
Matthias Hopf
Wow,
what a discussion, very nice too see all the comments. Let me also
comment on some points.
First of all using digital audio is a must with modern TV's doing heavy
video processing. The processing causes delays which are compensated in
the audio if digital audio input is used. Audio pass-through has to go
via the TV for best results.
Full-HD decoding can be done in software. The solution with CoreAVC and
"CoreAVC for linux" is not free but affordable and performs very good on
multi-core processors. This is no CoreAVC promotion, just my findings :-)
I still haven't done very detailed testing of the patch. It's running on
my system for some time now without any mayor problems. There are still
some dropouts in the sound but these do not seem to relate to any of the
PLL programming. I suspect the amounts of data being processed and
transferred around during full-HD playback are actually causing the
audio dropouts. I did some more experimental optimizing of the video
part and this greatly reduced audio drop outs.
I have included the patch of my last status. Experimental is the right
word for the patch. Very very very experimental would fit even better
:-). I am still using double buffering with overlay video and if no
scaling is required I'm not using the 3D engine but simply copy/sort out
the data and let the overlay part handle the color space conversion.
This only works for YV12 right now and is horribly messy at the moment.
The whole stuff breaks lot of stuff for other cards and should only be
used on RS690 cards... You have been warned :-).
It would be useful to have a way to see what the load on the memory
controller/GPU is during full-HD playback. Right now it's just guessing
at what's going wrong.
Best regards,
Christiaan van Dijk.
diff -u -r xf86-video-radeonhd/src/r5xx_3dregs.h xf86-video-radeonhd-work/src/r5xx_3dregs.h
--- xf86-video-radeonhd/src/r5xx_3dregs.h 2009-04-24 19:32:07.000000000 +0200
+++ xf86-video-radeonhd-work/src/r5xx_3dregs.h 2009-05-03 16:15:22.000000000 +0200
@@ -545,9 +545,10 @@
#define R300_SC_SCREENDOOR 0x43e8
#define R300_TX_FILTER0_0 0x4400
-# define R300_TX_CLAMP_S(x) (x << 0)
-# define R300_TX_CLAMP_T(x) (x << 3)
-# define R300_TX_CLAMP_R(x) (x << 6)
+#define R300_TX_FILTER0_1 0x4404
+# define R300_TX_CLAMP_S(x) ((x) << 0)
+# define R300_TX_CLAMP_T(x) ((x) << 3)
+# define R300_TX_CLAMP_R(x) ((x) << 6)
# define R300_TX_CLAMP_WRAP 0
# define R300_TX_CLAMP_MIRROR 1
# define R300_TX_CLAMP_CLAMP_LAST 2
@@ -561,18 +562,18 @@
# define R300_TX_MAG_FILTER_LINEAR (2 << 9)
# define R300_TX_MIN_FILTER_LINEAR (2 << 11)
# define R300_TX_ID_SHIFT 28
-
#define R300_TX_FILTER1_0 0x4440
-
+#define R300_TX_FILTER1_1 0x4444
#define R300_TX_FORMAT0_0 0x4480
+#define R300_TX_FORMAT0_1 0x4484
# define R300_TXWIDTH_SHIFT 0
# define R300_TXHEIGHT_SHIFT 11
# define R300_NUM_LEVELS_SHIFT 26
# define R300_NUM_LEVELS_MASK 0x
# define R300_TXPROJECTED (1 << 30)
# define R300_TXPITCH_EN (1 << 31)
-
#define R300_TX_FORMAT1_0 0x44c0
+#define R300_TX_FORMAT1_1 0x44c4
# define R300_TX_FORMAT_X8 0x0
# define R300_TX_FORMAT_X16 0x1
# define R300_TX_FORMAT_Y4X4 0x2
@@ -645,67 +646,29 @@
# define R300_TX_FORMAT_YUV_TO_RGB_NO_CLAMP (2 << 22)
# define R300_TX_FORMAT_SWAP_YUV (1 << 24)
+#define R300_TX_FORMAT2_0 0x4500
+#define R300_TX_FORMAT2_1 0x4504
+# define R500_TXWIDTH_11 (1 << 15)
+# define R500_TXHEIGHT_11 (1 << 16)
+
#define R300_TX_OFFSET_0 0x4540
+#define R300_TX_OFFSET_1 0x4544
# define R300_ENDIAN_SWAP_16_BIT (1 << 0)
# define R300_ENDIAN_SWAP_32_BIT (2 << 0)
# define R300_ENDIAN_SWAP_HALF_DWORD (3 << 0)
# define R300_MACRO_TILE (1 << 2)
-#define R300_US_CONFIG 0x4600
-# define R300_NLEVEL_SHIFT 0
-# define R300_FIRST_TEX (1 << 3)
-# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1)
-#define R300_US_PIXSIZE 0x4604
-#define R300_US_CODE_OFFSET 0x4608
-# define R300_ALU_CODE_OFFSET(x) (x << 0)
-# define R300_ALU_CODE_SIZE(x) (x << 6)
-# define R300_TEX_CODE_OFFSET(x) (x << 13)
-# define R300_TEX_CODE_SIZE(x) (x << 18)
-#define R300_US_CODE_ADDR_0 0x4610
-# define R300_ALU_START(x) (x << 0)
-# define R300_ALU_SIZE(x) (x << 6)
-# define R300_TEX_START(x) (x << 12)
-# define R300_TEX_SIZE(x) (x << 17)
-# define R300_RGBA_OUT (1 << 22)
-# define R300_W_OUT (1 << 23)
-#define R300_US_CODE_ADDR_1 0x4614
-#define R300_US_CODE_ADDR_2 0x4618
-#define R300_US_CODE_ADDR_3 0x461c
-#define R300_US_TEX_INST_0 0x4620
-#define R300_US_TEX_INST_1 0x4624
-#define R300_US_TEX_INST_2 0x4628
-# define R300_TEX_SRC_ADDR(x) (x << 0)
-# define R300_TEX_DST_ADDR(x) (x << 6)
-# define R300_TEX_ID(x) (x << 11)
-# define R300_TEX_INST(x) (x << 15)
-# define R300_TEX_INST_NOP 0
-# define R300_TEX_INST_LD 1
-# define R300_TEX_INST_TEXKILL 2
-# define R300_TEX_INST_PROJ 3
-# define R300_TEX_INST_LODBIAS 4
-
-#define R300_TX_FORMAT2_0 0x4500
-# define R500_TXWIDTH_11 (1 << 15)
-# define R500_TXHEIGHT_11 (1 << 16)
-
#define R300_TX_BORDER_COLOR_0 0x45c0
-#define R500_US_FC_CTRL 0x4624
-
-/* note that these are 8 bit lengths, despite the offsets, at least for R500 */
-#define R500_US_CODE_ADDR 0x4630
-# define R500_US_CODE_START_ADDR(x) (x << 0)
-# define R500_US_CODE_END_ADDR(x) (x << 16)
-#define R500_US_CODE_RANGE 0x4634
-# define R500_US_CODE_RANGE_ADDR(x) (x << 0)
-# define R500_US_CODE_RANGE_SIZE(x) (x << 16)
-#define R500_US_CODE_OFFSET 0x4638
-# define R500_US_CODE_OFFSET_ADDR(x) (x << 0)
+#define R300_TX_ENABLE 0x4104
+# define R300_TEX_0_ENABLE (1 << 0)
+# define R300_TEX_1_ENABLE (1 << 1)
-#define R300_US_OUT_FMT_0 0x46a4
+#define R300_US_W_FMT 0x46b4
#define R300_US_OUT_FMT_1 0x46a8
#define R300_US_OUT_FMT_2 0x46ac
#define R300_US_OUT_FMT_3 0x46b0
+#define R300_US_OUT_FMT_0 0x46a4
# define R300_OUT_FMT_C4_8 (0 << 0)
# define R300_OUT_FMT_C4_10 (1 << 0)
# define R300_OUT_FMT_C4_10_GAMMA (2 << 0)
@@ -743,55 +706,70 @@
# define R300_OUT_FMT_C3_SEL_RED (1 << 14)
# define R300_OUT_FMT_C3_SEL_GREEN (2 << 14)
# define R300_OUT_FMT_C3_SEL_BLUE (3 << 14)
-#define R300_US_W_FMT 0x46b4
+#define R300_US_CONFIG 0x4600
+# define R300_NLEVEL_SHIFT 0
+# define R300_FIRST_TEX (1 << 3)
+# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1)
+#define R300_US_PIXSIZE 0x4604
+#define R300_US_CODE_OFFSET 0x4608
+# define R300_ALU_CODE_OFFSET(x) (x << 0)
+# define R300_ALU_CODE_SIZE(x) (x << 6)
+# define R300_TEX_CODE_OFFSET(x) (x << 13)
+# define R300_TEX_CODE_SIZE(x) (x << 18)
+#define R300_US_CODE_ADDR_0 0x4610
+# define R300_ALU_START(x) (x << 0)
+# define R300_ALU_SIZE(x) (x << 6)
+# define R300_TEX_START(x) (x << 12)
+# define R300_TEX_SIZE(x) (x << 17)
+# define R300_RGBA_OUT (1 << 22)
+# define R300_W_OUT (1 << 23)
+#define R300_US_CODE_ADDR_1 0x4614
+#define R300_US_CODE_ADDR_2 0x4618
+#define R300_US_CODE_ADDR_3 0x461c
+
+#define R300_US_TEX_INST_0 0x4620
+#define R300_US_TEX_INST_1 0x4624
+#define R300_US_TEX_INST_2 0x4628
+#define R300_US_TEX_INST(x) (R300_US_TEX_INST_0 + (x)*4)
+# define R300_TEX_SRC_ADDR(x) ((x) << 0)
+# define R300_TEX_DST_ADDR(x) ((x) << 6)
+# define R300_TEX_ID(x) ((x) << 11)
+# define R300_TEX_INST(x) ((x) << 15)
+# define R300_TEX_INST_NOP 0
+# define R300_TEX_INST_LD 1
+# define R300_TEX_INST_TEXKILL 2
+# define R300_TEX_INST_PROJ 3
+# define R300_TEX_INST_LODBIAS 4
#define R300_US_ALU_RGB_ADDR_0 0x46c0
#define R300_US_ALU_RGB_ADDR_1 0x46c4
#define R300_US_ALU_RGB_ADDR_2 0x46c8
+#define R300_US_ALU_RGB_ADDR(x) (R300_US_ALU_RGB_ADDR_0 + (x)*4)
/* for ADDR0-2, values 0-31 specify a location in the pixel stack,
values 32-63 specify a constant */
-# define R300_ALU_RGB_ADDR0(x) (x << 0)
-# define R300_ALU_RGB_ADDR1(x) (x << 6)
-# define R300_ALU_RGB_ADDR2(x) (x << 12)
+# define R300_ALU_RGB_ADDR0(x) ((x) << 0)
+# define R300_ALU_RGB_ADDR1(x) ((x) << 6)
+# define R300_ALU_RGB_ADDR2(x) ((x) << 12)
+# define R300_ALU_RGB_CONST(x) ((x) | (1 << 5))
/* ADDRD - where on the pixel stack the result of this instruction
will be written */
-# define R300_ALU_RGB_ADDRD(x) (x << 18)
-# define R300_ALU_RGB_WMASK(x) (x << 23)
-# define R300_ALU_RGB_OMASK(x) (x << 26)
+# define R300_ALU_RGB_ADDRD(x) ((x) << 18)
+# define R300_ALU_RGB_WMASK(x) ((x) << 23)
+# define R300_ALU_RGB_OMASK(x) ((x) << 26)
# define R300_ALU_RGB_MASK_NONE 0
# define R300_ALU_RGB_MASK_R 1
# define R300_ALU_RGB_MASK_G 2
# define R300_ALU_RGB_MASK_B 4
+# define R300_ALU_RGB_MASK_RGB 7
# define R300_ALU_RGB_TARGET_A (0 << 29)
# define R300_ALU_RGB_TARGET_B (1 << 29)
# define R300_ALU_RGB_TARGET_C (2 << 29)
# define R300_ALU_RGB_TARGET_D (3 << 29)
-
-#define R300_US_ALU_ALPHA_ADDR_0 0x47c0
-#define R300_US_ALU_ALPHA_ADDR_1 0x47c4
-#define R300_US_ALU_ALPHA_ADDR_2 0x47c8
-/* for ADDR0-2, values 0-31 specify a location in the pixel stack,
- values 32-63 specify a constant */
-# define R300_ALU_ALPHA_ADDR0(x) (x << 0)
-# define R300_ALU_ALPHA_ADDR1(x) (x << 6)
-# define R300_ALU_ALPHA_ADDR2(x) (x << 12)
-/* ADDRD - where on the pixel stack the result of this instruction
- will be written */
-# define R300_ALU_ALPHA_ADDRD(x) (x << 18)
-# define R300_ALU_ALPHA_WMASK(x) (x << 23)
-# define R300_ALU_ALPHA_OMASK(x) (x << 24)
-# define R300_ALU_ALPHA_OMASK_W(x) (x << 27)
-# define R300_ALU_ALPHA_MASK_NONE 0
-# define R300_ALU_ALPHA_MASK_A 1
-# define R300_ALU_ALPHA_TARGET_A (0 << 25)
-# define R300_ALU_ALPHA_TARGET_B (1 << 25)
-# define R300_ALU_ALPHA_TARGET_C (2 << 25)
-# define R300_ALU_ALPHA_TARGET_D (3 << 25)
-
#define R300_US_ALU_RGB_INST_0 0x48c0
#define R300_US_ALU_RGB_INST_1 0x48c4
#define R300_US_ALU_RGB_INST_2 0x48c8
-# define R300_ALU_RGB_SEL_A(x) (x << 0)
+#define R300_US_ALU_RGB_INST(x) (R300_US_ALU_RGB_INST_0 + (x)*4)
+# define R300_ALU_RGB_SEL_A(x) ((x) << 0)
# define R300_ALU_RGB_SRC0_RGB 0
# define R300_ALU_RGB_SRC0_RRR 1
# define R300_ALU_RGB_SRC0_GGG 2
@@ -824,21 +802,21 @@
# define R300_ALU_RGB_SRC0_ABG 29
# define R300_ALU_RGB_SRC1_ABG 30
# define R300_ALU_RGB_SRC2_ABG 31
-# define R300_ALU_RGB_MOD_A(x) (x << 5)
+# define R300_ALU_RGB_MOD_A(x) ((x) << 5)
# define R300_ALU_RGB_MOD_NOP 0
# define R300_ALU_RGB_MOD_NEG 1
# define R300_ALU_RGB_MOD_ABS 2
# define R300_ALU_RGB_MOD_NAB 3
-# define R300_ALU_RGB_SEL_B(x) (x << 7)
-# define R300_ALU_RGB_MOD_B(x) (x << 12)
-# define R300_ALU_RGB_SEL_C(x) (x << 14)
-# define R300_ALU_RGB_MOD_C(x) (x << 19)
-# define R300_ALU_RGB_SRCP_OP(x) (x << 21)
+# define R300_ALU_RGB_SEL_B(x) ((x) << 7)
+# define R300_ALU_RGB_MOD_B(x) ((x) << 12)
+# define R300_ALU_RGB_SEL_C(x) ((x) << 14)
+# define R300_ALU_RGB_MOD_C(x) ((x) << 19)
+# define R300_ALU_RGB_SRCP_OP(x) ((x) << 21)
# define R300_ALU_RGB_SRCP_OP_1_MINUS_2RGB0 0
# define R300_ALU_RGB_SRCP_OP_RGB1_MINUS_RGB0 1
# define R300_ALU_RGB_SRCP_OP_RGB1_PLUS_RGB0 2
# define R300_ALU_RGB_SRCP_OP_1_MINUS_RGB0 3
-# define R300_ALU_RGB_OP(x) (x << 23)
+# define R300_ALU_RGB_OP(x) ((x) << 23)
# define R300_ALU_RGB_OP_MAD 0
# define R300_ALU_RGB_OP_DP3 1
# define R300_ALU_RGB_OP_DP4 2
@@ -849,7 +827,7 @@
# define R300_ALU_RGB_OP_CMP 8
# define R300_ALU_RGB_OP_FRC 9
# define R300_ALU_RGB_OP_SOP 10
-# define R300_ALU_RGB_OMOD(x) (x << 27)
+# define R300_ALU_RGB_OMOD(x) ((x) << 27)
# define R300_ALU_RGB_OMOD_NONE 0
# define R300_ALU_RGB_OMOD_MUL_2 1
# define R300_ALU_RGB_OMOD_MUL_4 2
@@ -859,11 +837,33 @@
# define R300_ALU_RGB_OMOD_DIV_8 6
# define R300_ALU_RGB_CLAMP (1 << 30)
# define R300_ALU_RGB_INSERT_NOP (1 << 31)
-
+#define R300_US_ALU_ALPHA_ADDR_0 0x47c0
+#define R300_US_ALU_ALPHA_ADDR_1 0x47c4
+#define R300_US_ALU_ALPHA_ADDR_2 0x47c8
+#define R300_US_ALU_ALPHA_ADDR(x) (R300_US_ALU_ALPHA_ADDR_0 + (x)*4)
+/* for ADDR0-2, values 0-31 specify a location in the pixel stack,
+ values 32-63 specify a constant */
+# define R300_ALU_ALPHA_ADDR0(x) ((x) << 0)
+# define R300_ALU_ALPHA_ADDR1(x) ((x) << 6)
+# define R300_ALU_ALPHA_ADDR2(x) ((x) << 12)
+# define R300_ALU_ALPHA_CONST(x) ((x) | (1 << 5))
+/* ADDRD - where on the pixel stack the result of this instruction
+ will be written */
+# define R300_ALU_ALPHA_ADDRD(x) ((x) << 18)
+# define R300_ALU_ALPHA_WMASK(x) ((x) << 23)
+# define R300_ALU_ALPHA_OMASK(x) ((x) << 24)
+# define R300_ALU_ALPHA_OMASK_W(x) ((x) << 27)
+# define R300_ALU_ALPHA_MASK_NONE 0
+# define R300_ALU_ALPHA_MASK_A 1
+# define R300_ALU_ALPHA_TARGET_A (0 << 25)
+# define R300_ALU_ALPHA_TARGET_B (1 << 25)
+# define R300_ALU_ALPHA_TARGET_C (2 << 25)
+# define R300_ALU_ALPHA_TARGET_D (3 << 25)
#define R300_US_ALU_ALPHA_INST_0 0x49c0
#define R300_US_ALU_ALPHA_INST_1 0x49c4
#define R300_US_ALU_ALPHA_INST_2 0x49c8
-# define R300_ALU_ALPHA_SEL_A(x) (x << 0)
+#define R300_US_ALU_ALPHA_INST(x) (R300_US_ALU_ALPHA_INST_0 + (x)*4)
+# define R300_ALU_ALPHA_SEL_A(x) ((x) << 0)
# define R300_ALU_ALPHA_SRC0_R 0
# define R300_ALU_ALPHA_SRC0_G 1
# define R300_ALU_ALPHA_SRC0_B 2
@@ -883,21 +883,21 @@
# define R300_ALU_ALPHA_0_0 16
# define R300_ALU_ALPHA_1_0 17
# define R300_ALU_ALPHA_0_5 18
-# define R300_ALU_ALPHA_MOD_A(x) (x << 5)
+# define R300_ALU_ALPHA_MOD_A(x) ((x) << 5)
# define R300_ALU_ALPHA_MOD_NOP 0
# define R300_ALU_ALPHA_MOD_NEG 1
# define R300_ALU_ALPHA_MOD_ABS 2
# define R300_ALU_ALPHA_MOD_NAB 3
-# define R300_ALU_ALPHA_SEL_B(x) (x << 7)
-# define R300_ALU_ALPHA_MOD_B(x) (x << 12)
-# define R300_ALU_ALPHA_SEL_C(x) (x << 14)
-# define R300_ALU_ALPHA_MOD_C(x) (x << 19)
-# define R300_ALU_ALPHA_SRCP_OP(x) (x << 21)
+# define R300_ALU_ALPHA_SEL_B(x) ((x) << 7)
+# define R300_ALU_ALPHA_MOD_B(x) ((x) << 12)
+# define R300_ALU_ALPHA_SEL_C(x) ((x) << 14)
+# define R300_ALU_ALPHA_MOD_C(x) ((x) << 19)
+# define R300_ALU_ALPHA_SRCP_OP(x) ((x) << 21)
# define R300_ALU_ALPHA_SRCP_OP_1_MINUS_2RGB0 0
# define R300_ALU_ALPHA_SRCP_OP_RGB1_MINUS_RGB0 1
# define R300_ALU_ALPHA_SRCP_OP_RGB1_PLUS_RGB0 2
# define R300_ALU_ALPHA_SRCP_OP_1_MINUS_RGB0 3
-# define R300_ALU_ALPHA_OP(x) (x << 23)
+# define R300_ALU_ALPHA_OP(x) ((x) << 23)
# define R300_ALU_ALPHA_OP_MAD 0
# define R300_ALU_ALPHA_OP_DP 1
# define R300_ALU_ALPHA_OP_MIN 2
@@ -909,7 +909,7 @@
# define R300_ALU_ALPHA_OP_LN2 9
# define R300_ALU_ALPHA_OP_RCP 10
# define R300_ALU_ALPHA_OP_RSQ 11
-# define R300_ALU_ALPHA_OMOD(x) (x << 27)
+# define R300_ALU_ALPHA_OMOD(x) ((x) << 27)
# define R300_ALU_ALPHA_OMOD_NONE 0
# define R300_ALU_ALPHA_OMOD_MUL_2 1
# define R300_ALU_ALPHA_OMOD_MUL_4 2
@@ -919,9 +919,66 @@
# define R300_ALU_ALPHA_OMOD_DIV_8 6
# define R300_ALU_ALPHA_CLAMP (1 << 30)
+#define R300_US_ALU_CONST_R_0 0x4c00
+#define R300_US_ALU_CONST_R(x) (R300_US_ALU_CONST_R_0 + (x)*16)
+#define R300_US_ALU_CONST_G_0 0x4c04
+#define R300_US_ALU_CONST_G(x) (R300_US_ALU_CONST_G_0 + (x)*16)
+#define R300_US_ALU_CONST_B_0 0x4c08
+#define R300_US_ALU_CONST_B(x) (R300_US_ALU_CONST_B_0 + (x)*16)
+#define R300_US_ALU_CONST_A_0 0x4c0c
+#define R300_US_ALU_CONST_A(x) (R300_US_ALU_CONST_A_0 + (x)*16)
+#define R300_FG_DEPTH_SRC 0x4bd8
#define R300_FG_FOG_BLEND 0x4bc0
#define R300_FG_ALPHA_FUNC 0x4bd4
-#define R300_FG_DEPTH_SRC 0x4bd8
+
+#define R300_DST_PIPE_CONFIG 0x170c
+# define R300_PIPE_AUTO_CONFIG (1 << 31)
+#define R300_RB2D_DSTCACHE_MODE 0x3428
+#define R300_RB2D_DSTCACHE_MODE 0x3428
+# define R300_DC_AUTOFLUSH_ENABLE (1 << 8)
+# define R300_DC_DC_DISABLE_IGNORE_PE (1 << 17)
+#define R300_RB2D_DSTCACHE_CTLSTAT 0x342c /* use DSTCACHE_CTLSTAT instead */
+#define R300_DSTCACHE_CTLSTAT 0x1714
+# define R300_DC_FLUSH_2D (1 << 0)
+# define R300_DC_FREE_2D (1 << 2)
+# define R300_RB2D_DC_FLUSH_ALL (R300_DC_FLUSH_2D | R300_DC_FREE_2D)
+# define R300_RB2D_DC_BUSY (1 << 31)
+#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18
+# define R300_ZC_FLUSH (1 << 0)
+# define R300_ZC_FREE (1 << 1)
+# define R300_ZC_FLUSH_ALL 0x3
+#define R300_RB3D_ZSTENCILCNTL 0x4f04
+#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18
+#define R300_RB3D_BW_CNTL 0x4f1c
+#define R300_RB3D_ZCNTL 0x4f00
+#define R300_RB3D_ZTOP 0x4f14
+#define R300_RB3D_ROPCNTL 0x4e18
+#define R300_RB3D_BLENDCNTL 0x4e04
+# define R300_ALPHA_BLEND_ENABLE (1 << 0)
+# define R300_SEPARATE_ALPHA_ENABLE (1 << 1)
+# define R300_READ_ENABLE (1 << 2)
+#define R300_RB3D_ABLENDCNTL 0x4e08
+#define R300_RB3D_COLOROFFSET0 0x4e28
+#define R300_RB3D_COLORPITCH0 0x4e38
+# define R300_COLORTILE (1 << 16)
+# define R300_COLORENDIAN_WORD (1 << 19)
+# define R300_COLORENDIAN_DWORD (2 << 19)
+# define R300_COLORENDIAN_HALF_DWORD (3 << 19)
+# define R300_COLORFORMAT_ARGB1555 (3 << 21)
+# define R300_COLORFORMAT_RGB565 (4 << 21)
+# define R300_COLORFORMAT_ARGB8888 (6 << 21)
+# define R300_COLORFORMAT_ARGB32323232 (7 << 21)
+# define R300_COLORFORMAT_I8 (9 << 21)
+# define R300_COLORFORMAT_ARGB16161616 (10 << 21)
+# define R300_COLORFORMAT_VYUY (11 << 21)
+# define R300_COLORFORMAT_YVYU (12 << 21)
+# define R300_COLORFORMAT_UV88 (13 << 21)
+# define R300_COLORFORMAT_ARGB4444 (15 << 21)
+
+
+
+
+
#define R300_RB3D_CCTL 0x4e00
#define R300_RB3D_BLENDCNTL 0x4e04
@@ -975,87 +1032,161 @@
# define R300_ZC_FLUSH_ALL 0x3
#define R300_RB3D_BW_CNTL 0x4f1c
-#define R500_US_ALU_RGB_ADDR_0 0x9000
-# define R500_RGB_ADDR0(x) (x << 0)
-# define R500_RGB_ADDR0_CONST (1 << 8)
-# define R500_RGB_ADDR0_REL (1 << 9)
-# define R500_RGB_ADDR1(x) (x << 10)
-# define R500_RGB_ADDR1_CONST (1 << 18)
-# define R500_RGB_ADDR1_REL (1 << 19)
-# define R500_RGB_ADDR2(x) (x << 20)
-# define R500_RGB_ADDR2_CONST (1 << 28)
-# define R500_RGB_ADDR2_REL (1 << 29)
-# define R500_RGB_SRCP_OP_1_MINUS_2RGB0 (0 << 30)
-# define R500_RGB_SRCP_OP_RGB1_MINUS_RGB0 (1 << 30)
-# define R500_RGB_SRCP_OP_RGB1_PLUS_RGB0 (2 << 30)
-# define R500_RGB_SRCP_OP_1_MINUS_RGB0 (3 << 30)
-
-#define R500_US_TEX_INST_0 0x9000
-# define R500_TEX_ID(x) (x << 16)
-# define R500_TEX_INST_NOP (0 << 22)
-# define R500_TEX_INST_LD (1 << 22)
-# define R500_TEX_INST_TEXKILL (2 << 22)
-# define R500_TEX_INST_PROJ (3 << 22)
-# define R500_TEX_INST_LODBIAS (4 << 22)
-# define R500_TEX_INST_LOD (5 << 22)
-# define R500_TEX_INST_DXDY (6 << 22)
-# define R500_TEX_SEM_ACQUIRE (1 << 25)
-# define R500_TEX_IGNORE_UNCOVERED (1 << 26)
-# define R500_TEX_UNSCALED (1 << 27)
+/* R500 US has to be loaded through an index/data pair */
+#define R500_GA_US_VECTOR_INDEX 0x4250
+# define R500_US_VECTOR_TYPE_INST (0 << 16)
+# define R500_US_VECTOR_TYPE_CONST (1 << 16)
+# define R500_US_VECTOR_CLAMP (1 << 17)
+# define R500_US_VECTOR_INST_INDEX(x) ((x) | R500_US_VECTOR_TYPE_INST)
+# define R500_US_VECTOR_CONST_INDEX(x) ((x) | R500_US_VECTOR_TYPE_CONST)
+#define R500_GA_US_VECTOR_DATA 0x4254
+/*
+ * The R500 unified shader (US) registers come in banks of 512 each, one
+ * for each instruction slot in the shader. You can't touch them directly.
+ * R500_US_VECTOR_INDEX() sets the base instruction to modify; successive
+ * writes to R500_GA_US_VECTOR_DATA autoincrement the index after the
+ * instruction is fully specified.
+ */
+#define R500_US_ALU_ALPHA_INST_0 0xa800
+# define R500_ALPHA_OP_MAD 0
+# define R500_ALPHA_OP_DP 1
+# define R500_ALPHA_OP_MIN 2
+# define R500_ALPHA_OP_MAX 3
+/* #define R500_ALPHA_OP_RESERVED 4 */
+# define R500_ALPHA_OP_CND 5
+# define R500_ALPHA_OP_CMP 6
+# define R500_ALPHA_OP_FRC 7
+# define R500_ALPHA_OP_EX2 8
+# define R500_ALPHA_OP_LN2 9
+# define R500_ALPHA_OP_RCP 10
+# define R500_ALPHA_OP_RSQ 11
+# define R500_ALPHA_OP_SIN 12
+# define R500_ALPHA_OP_COS 13
+# define R500_ALPHA_OP_MDH 14
+# define R500_ALPHA_OP_MDV 15
+# define R500_ALPHA_ADDRD(x) ((x) << 4)
+# define R500_ALPHA_ADDRD_REL (1 << 11)
+# define R500_ALPHA_SEL_A_SRC0 (0 << 12)
+# define R500_ALPHA_SEL_A_SRC1 (1 << 12)
+# define R500_ALPHA_SEL_A_SRC2 (2 << 12)
+# define R500_ALPHA_SEL_A_SRCP (3 << 12)
+# define R500_ALPHA_SWIZ_A_R (0 << 14)
+# define R500_ALPHA_SWIZ_A_G (1 << 14)
+# define R500_ALPHA_SWIZ_A_B (2 << 14)
+# define R500_ALPHA_SWIZ_A_A (3 << 14)
+# define R500_ALPHA_SWIZ_A_0 (4 << 14)
+# define R500_ALPHA_SWIZ_A_HALF (5 << 14)
+# define R500_ALPHA_SWIZ_A_1 (6 << 14)
+/* #define R500_ALPHA_SWIZ_A_UNUSED (7 << 14) */
+# define R500_ALPHA_MOD_A_NOP (0 << 17)
+# define R500_ALPHA_MOD_A_NEG (1 << 17)
+# define R500_ALPHA_MOD_A_ABS (2 << 17)
+# define R500_ALPHA_MOD_A_NAB (3 << 17)
+# define R500_ALPHA_SEL_B_SRC0 (0 << 19)
+# define R500_ALPHA_SEL_B_SRC1 (1 << 19)
+# define R500_ALPHA_SEL_B_SRC2 (2 << 19)
+# define R500_ALPHA_SEL_B_SRCP (3 << 19)
+# define R500_ALPHA_SWIZ_B_R (0 << 21)
+# define R500_ALPHA_SWIZ_B_G (1 << 21)
+# define R500_ALPHA_SWIZ_B_B (2 << 21)
+# define R500_ALPHA_SWIZ_B_A (3 << 21)
+# define R500_ALPHA_SWIZ_B_0 (4 << 21)
+# define R500_ALPHA_SWIZ_B_HALF (5 << 21)
+# define R500_ALPHA_SWIZ_B_1 (6 << 21)
+/* #define R500_ALPHA_SWIZ_B_UNUSED (7 << 21) */
+# define R500_ALPHA_MOD_B_NOP (0 << 24)
+# define R500_ALPHA_MOD_B_NEG (1 << 24)
+# define R500_ALPHA_MOD_B_ABS (2 << 24)
+# define R500_ALPHA_MOD_B_NAB (3 << 24)
+# define R500_ALPHA_OMOD_IDENTITY (0 << 26)
+# define R500_ALPHA_OMOD_MUL_2 (1 << 26)
+# define R500_ALPHA_OMOD_MUL_4 (2 << 26)
+# define R500_ALPHA_OMOD_MUL_8 (3 << 26)
+# define R500_ALPHA_OMOD_DIV_2 (4 << 26)
+# define R500_ALPHA_OMOD_DIV_4 (5 << 26)
+# define R500_ALPHA_OMOD_DIV_8 (6 << 26)
+# define R500_ALPHA_OMOD_DISABLE (7 << 26)
+# define R500_ALPHA_TARGET(x) ((x) << 29)
+# define R500_ALPHA_W_OMASK (1 << 31)
#define R500_US_ALU_ALPHA_ADDR_0 0x9800
-# define R500_ALPHA_ADDR0(x) (x << 0)
+# define R500_ALPHA_ADDR0(x) ((x) << 0)
# define R500_ALPHA_ADDR0_CONST (1 << 8)
# define R500_ALPHA_ADDR0_REL (1 << 9)
-# define R500_ALPHA_ADDR1(x) (x << 10)
+# define R500_ALPHA_ADDR1(x) ((x) << 10)
# define R500_ALPHA_ADDR1_CONST (1 << 18)
# define R500_ALPHA_ADDR1_REL (1 << 19)
-# define R500_ALPHA_ADDR2(x) (x << 20)
+# define R500_ALPHA_ADDR2(x) ((x) << 20)
# define R500_ALPHA_ADDR2_CONST (1 << 28)
# define R500_ALPHA_ADDR2_REL (1 << 29)
# define R500_ALPHA_SRCP_OP_1_MINUS_2A0 (0 << 30)
# define R500_ALPHA_SRCP_OP_A1_MINUS_A0 (1 << 30)
# define R500_ALPHA_SRCP_OP_A1_PLUS_A0 (2 << 30)
# define R500_ALPHA_SRCP_OP_1_MINUS_A0 (3 << 30)
-
-#define R500_US_TEX_ADDR_0 0x9800
-# define R500_TEX_SRC_ADDR(x) (x << 0)
-# define R500_TEX_SRC_ADDR_REL (1 << 7)
-# define R500_TEX_SRC_S_SWIZ_R (0 << 8)
-# define R500_TEX_SRC_S_SWIZ_G (1 << 8)
-# define R500_TEX_SRC_S_SWIZ_B (2 << 8)
-# define R500_TEX_SRC_S_SWIZ_A (3 << 8)
-# define R500_TEX_SRC_T_SWIZ_R (0 << 10)
-# define R500_TEX_SRC_T_SWIZ_G (1 << 10)
-# define R500_TEX_SRC_T_SWIZ_B (2 << 10)
-# define R500_TEX_SRC_T_SWIZ_A (3 << 10)
-# define R500_TEX_SRC_R_SWIZ_R (0 << 12)
-# define R500_TEX_SRC_R_SWIZ_G (1 << 12)
-# define R500_TEX_SRC_R_SWIZ_B (2 << 12)
-# define R500_TEX_SRC_R_SWIZ_A (3 << 12)
-# define R500_TEX_SRC_Q_SWIZ_R (0 << 14)
-# define R500_TEX_SRC_Q_SWIZ_G (1 << 14)
-# define R500_TEX_SRC_Q_SWIZ_B (2 << 14)
-# define R500_TEX_SRC_Q_SWIZ_A (3 << 14)
-# define R500_TEX_DST_ADDR(x) (x << 16)
-# define R500_TEX_DST_ADDR_REL (1 << 23)
-# define R500_TEX_DST_R_SWIZ_R (0 << 24)
-# define R500_TEX_DST_R_SWIZ_G (1 << 24)
-# define R500_TEX_DST_R_SWIZ_B (2 << 24)
-# define R500_TEX_DST_R_SWIZ_A (3 << 24)
-# define R500_TEX_DST_G_SWIZ_R (0 << 26)
-# define R500_TEX_DST_G_SWIZ_G (1 << 26)
-# define R500_TEX_DST_G_SWIZ_B (2 << 26)
-# define R500_TEX_DST_G_SWIZ_A (3 << 26)
-# define R500_TEX_DST_B_SWIZ_R (0 << 28)
-# define R500_TEX_DST_B_SWIZ_G (1 << 28)
-# define R500_TEX_DST_B_SWIZ_B (2 << 28)
-# define R500_TEX_DST_B_SWIZ_A (3 << 28)
-# define R500_TEX_DST_A_SWIZ_R (0 << 30)
-# define R500_TEX_DST_A_SWIZ_G (1 << 30)
-# define R500_TEX_DST_A_SWIZ_B (2 << 30)
-# define R500_TEX_DST_A_SWIZ_A (3 << 30)
-
+#define R500_US_ALU_RGBA_INST_0 0xb000
+# define R500_ALU_RGBA_OP_MAD (0 << 0)
+# define R500_ALU_RGBA_OP_DP3 (1 << 0)
+# define R500_ALU_RGBA_OP_DP4 (2 << 0)
+# define R500_ALU_RGBA_OP_D2A (3 << 0)
+# define R500_ALU_RGBA_OP_MIN (4 << 0)
+# define R500_ALU_RGBA_OP_MAX (5 << 0)
+/* #define R500_ALU_RGBA_OP_RESERVED (6 << 0) */
+# define R500_ALU_RGBA_OP_CND (7 << 0)
+# define R500_ALU_RGBA_OP_CMP (8 << 0)
+# define R500_ALU_RGBA_OP_FRC (9 << 0)
+# define R500_ALU_RGBA_OP_SOP (10 << 0)
+# define R500_ALU_RGBA_OP_MDH (11 << 0)
+# define R500_ALU_RGBA_OP_MDV (12 << 0)
+# define R500_ALU_RGBA_ADDRD(x) ((x) << 4)
+# define R500_ALU_RGBA_ADDRD_REL (1 << 11)
+# define R500_ALU_RGBA_SEL_C_SRC0 (0 << 12)
+# define R500_ALU_RGBA_SEL_C_SRC1 (1 << 12)
+# define R500_ALU_RGBA_SEL_C_SRC2 (2 << 12)
+# define R500_ALU_RGBA_SEL_C_SRCP (3 << 12)
+# define R500_ALU_RGBA_R_SWIZ_R (0 << 14)
+# define R500_ALU_RGBA_R_SWIZ_G (1 << 14)
+# define R500_ALU_RGBA_R_SWIZ_B (2 << 14)
+# define R500_ALU_RGBA_R_SWIZ_A (3 << 14)
+# define R500_ALU_RGBA_R_SWIZ_0 (4 << 14)
+# define R500_ALU_RGBA_R_SWIZ_HALF (5 << 14)
+# define R500_ALU_RGBA_R_SWIZ_1 (6 << 14)
+/* #define R500_ALU_RGBA_R_SWIZ_UNUSED (7 << 14) */
+# define R500_ALU_RGBA_G_SWIZ_R (0 << 17)
+# define R500_ALU_RGBA_G_SWIZ_G (1 << 17)
+# define R500_ALU_RGBA_G_SWIZ_B (2 << 17)
+# define R500_ALU_RGBA_G_SWIZ_A (3 << 17)
+# define R500_ALU_RGBA_G_SWIZ_0 (4 << 17)
+# define R500_ALU_RGBA_G_SWIZ_HALF (5 << 17)
+# define R500_ALU_RGBA_G_SWIZ_1 (6 << 17)
+/* #define R500_ALU_RGBA_G_SWIZ_UNUSED (7 << 17) */
+# define R500_ALU_RGBA_B_SWIZ_R (0 << 20)
+# define R500_ALU_RGBA_B_SWIZ_G (1 << 20)
+# define R500_ALU_RGBA_B_SWIZ_B (2 << 20)
+# define R500_ALU_RGBA_B_SWIZ_A (3 << 20)
+# define R500_ALU_RGBA_B_SWIZ_0 (4 << 20)
+# define R500_ALU_RGBA_B_SWIZ_HALF (5 << 20)
+# define R500_ALU_RGBA_B_SWIZ_1 (6 << 20)
+/* #define R500_ALU_RGBA_B_SWIZ_UNUSED (7 << 20) */
+# define R500_ALU_RGBA_MOD_C_NOP (0 << 23)
+# define R500_ALU_RGBA_MOD_C_NEG (1 << 23)
+# define R500_ALU_RGBA_MOD_C_ABS (2 << 23)
+# define R500_ALU_RGBA_MOD_C_NAB (3 << 23)
+# define R500_ALU_RGBA_ALPHA_SEL_C_SRC0 (0 << 25)
+# define R500_ALU_RGBA_ALPHA_SEL_C_SRC1 (1 << 25)
+# define R500_ALU_RGBA_ALPHA_SEL_C_SRC2 (2 << 25)
+# define R500_ALU_RGBA_ALPHA_SEL_C_SRCP (3 << 25)
+# define R500_ALU_RGBA_A_SWIZ_R (0 << 27)
+# define R500_ALU_RGBA_A_SWIZ_G (1 << 27)
+# define R500_ALU_RGBA_A_SWIZ_B (2 << 27)
+# define R500_ALU_RGBA_A_SWIZ_A (3 << 27)
+# define R500_ALU_RGBA_A_SWIZ_0 (4 << 27)
+# define R500_ALU_RGBA_A_SWIZ_HALF (5 << 27)
+# define R500_ALU_RGBA_A_SWIZ_1 (6 << 27)
+/* #define R500_ALU_RGBA_A_SWIZ_UNUSED (7 << 27) */
+# define R500_ALU_RGBA_ALPHA_MOD_C_NOP (0 << 30)
+# define R500_ALU_RGBA_ALPHA_MOD_C_NEG (1 << 30)
+# define R500_ALU_RGBA_ALPHA_MOD_C_ABS (2 << 30)
+# define R500_ALU_RGBA_ALPHA_MOD_C_NAB (3 << 30)
#define R500_US_ALU_RGB_INST_0 0xa000
# define R500_ALU_RGB_SEL_A_SRC0 (0 << 0)
# define R500_ALU_RGB_SEL_A_SRC1 (1 << 0)
@@ -1129,181 +1260,22 @@
# define R500_ALU_RGB_OMOD_DIV_4 (5 << 26)
# define R500_ALU_RGB_OMOD_DIV_8 (6 << 26)
# define R500_ALU_RGB_OMOD_DISABLE (7 << 26)
-# define R500_ALU_RGB_TARGET(x) (x << 29)
+# define R500_ALU_RGB_TARGET(x) ((x) << 29)
# define R500_ALU_RGB_WMASK (1 << 31)
-
-#define R500_US_TEX_ADDR_DXDY_0 0xa000
-# define R500_DX_ADDR(x) (x << 0)
-# define R500_DX_ADDR_REL (1 << 7)
-# define R500_DX_S_SWIZ_R (0 << 8)
-# define R500_DX_S_SWIZ_G (1 << 8)
-# define R500_DX_S_SWIZ_B (2 << 8)
-# define R500_DX_S_SWIZ_A (3 << 8)
-# define R500_DX_T_SWIZ_R (0 << 10)
-# define R500_DX_T_SWIZ_G (1 << 10)
-# define R500_DX_T_SWIZ_B (2 << 10)
-# define R500_DX_T_SWIZ_A (3 << 10)
-# define R500_DX_R_SWIZ_R (0 << 12)
-# define R500_DX_R_SWIZ_G (1 << 12)
-# define R500_DX_R_SWIZ_B (2 << 12)
-# define R500_DX_R_SWIZ_A (3 << 12)
-# define R500_DX_Q_SWIZ_R (0 << 14)
-# define R500_DX_Q_SWIZ_G (1 << 14)
-# define R500_DX_Q_SWIZ_B (2 << 14)
-# define R500_DX_Q_SWIZ_A (3 << 14)
-# define R500_DY_ADDR(x) (x << 16)
-# define R500_DY_ADDR_REL (1 << 17)
-# define R500_DY_S_SWIZ_R (0 << 24)
-# define R500_DY_S_SWIZ_G (1 << 24)
-# define R500_DY_S_SWIZ_B (2 << 24)
-# define R500_DY_S_SWIZ_A (3 << 24)
-# define R500_DY_T_SWIZ_R (0 << 26)
-# define R500_DY_T_SWIZ_G (1 << 26)
-# define R500_DY_T_SWIZ_B (2 << 26)
-# define R500_DY_T_SWIZ_A (3 << 26)
-# define R500_DY_R_SWIZ_R (0 << 28)
-# define R500_DY_R_SWIZ_G (1 << 28)
-# define R500_DY_R_SWIZ_B (2 << 28)
-# define R500_DY_R_SWIZ_A (3 << 28)
-# define R500_DY_Q_SWIZ_R (0 << 30)
-# define R500_DY_Q_SWIZ_G (1 << 30)
-# define R500_DY_Q_SWIZ_B (2 << 30)
-# define R500_DY_Q_SWIZ_A (3 << 30)
-
-/*
- * The R500 unified shader (US) registers come in banks of 512 each, one
- * for each instruction slot in the shader. You can't touch them directly.
- * R500_US_VECTOR_INDEX() sets the base instruction to modify; successive
- * writes to R500_GA_US_VECTOR_DATA autoincrement the index after the
- * instruction is fully specified.
- */
-#define R500_US_ALU_ALPHA_INST_0 0xa800
-# define R500_ALPHA_OP_MAD 0
-# define R500_ALPHA_OP_DP 1
-# define R500_ALPHA_OP_MIN 2
-# define R500_ALPHA_OP_MAX 3
-/* #define R500_ALPHA_OP_RESERVED 4 */
-# define R500_ALPHA_OP_CND 5
-# define R500_ALPHA_OP_CMP 6
-# define R500_ALPHA_OP_FRC 7
-# define R500_ALPHA_OP_EX2 8
-# define R500_ALPHA_OP_LN2 9
-# define R500_ALPHA_OP_RCP 10
-# define R500_ALPHA_OP_RSQ 11
-# define R500_ALPHA_OP_SIN 12
-# define R500_ALPHA_OP_COS 13
-# define R500_ALPHA_OP_MDH 14
-# define R500_ALPHA_OP_MDV 15
-# define R500_ALPHA_ADDRD(x) (x << 4)
-# define R500_ALPHA_ADDRD_REL (1 << 11)
-# define R500_ALPHA_SEL_A_SRC0 (0 << 12)
-# define R500_ALPHA_SEL_A_SRC1 (1 << 12)
-# define R500_ALPHA_SEL_A_SRC2 (2 << 12)
-# define R500_ALPHA_SEL_A_SRCP (3 << 12)
-# define R500_ALPHA_SWIZ_A_R (0 << 14)
-# define R500_ALPHA_SWIZ_A_G (1 << 14)
-# define R500_ALPHA_SWIZ_A_B (2 << 14)
-# define R500_ALPHA_SWIZ_A_A (3 << 14)
-# define R500_ALPHA_SWIZ_A_0 (4 << 14)
-# define R500_ALPHA_SWIZ_A_HALF (5 << 14)
-# define R500_ALPHA_SWIZ_A_1 (6 << 14)
-/* #define R500_ALPHA_SWIZ_A_UNUSED (7 << 14) */
-# define R500_ALPHA_MOD_A_NOP (0 << 17)
-# define R500_ALPHA_MOD_A_NEG (1 << 17)
-# define R500_ALPHA_MOD_A_ABS (2 << 17)
-# define R500_ALPHA_MOD_A_NAB (3 << 17)
-# define R500_ALPHA_SEL_B_SRC0 (0 << 19)
-# define R500_ALPHA_SEL_B_SRC1 (1 << 19)
-# define R500_ALPHA_SEL_B_SRC2 (2 << 19)
-# define R500_ALPHA_SEL_B_SRCP (3 << 19)
-# define R500_ALPHA_SWIZ_B_R (0 << 21)
-# define R500_ALPHA_SWIZ_B_G (1 << 21)
-# define R500_ALPHA_SWIZ_B_B (2 << 21)
-# define R500_ALPHA_SWIZ_B_A (3 << 21)
-# define R500_ALPHA_SWIZ_B_0 (4 << 21)
-# define R500_ALPHA_SWIZ_B_HALF (5 << 21)
-# define R500_ALPHA_SWIZ_B_1 (6 << 21)
-/* #define R500_ALPHA_SWIZ_B_UNUSED (7 << 21) */
-# define R500_ALPHA_MOD_B_NOP (0 << 24)
-# define R500_ALPHA_MOD_B_NEG (1 << 24)
-# define R500_ALPHA_MOD_B_ABS (2 << 24)
-# define R500_ALPHA_MOD_B_NAB (3 << 24)
-# define R500_ALPHA_OMOD_IDENTITY (0 << 26)
-# define R500_ALPHA_OMOD_MUL_2 (1 << 26)
-# define R500_ALPHA_OMOD_MUL_4 (2 << 26)
-# define R500_ALPHA_OMOD_MUL_8 (3 << 26)
-# define R500_ALPHA_OMOD_DIV_2 (4 << 26)
-# define R500_ALPHA_OMOD_DIV_4 (5 << 26)
-# define R500_ALPHA_OMOD_DIV_8 (6 << 26)
-# define R500_ALPHA_OMOD_DISABLE (7 << 26)
-# define R500_ALPHA_TARGET(x) (x << 29)
-# define R500_ALPHA_W_OMASK (1 << 31)
-
-#define R500_US_ALU_RGBA_INST_0 0xb000
-# define R500_ALU_RGBA_OP_MAD (0 << 0)
-# define R500_ALU_RGBA_OP_DP3 (1 << 0)
-# define R500_ALU_RGBA_OP_DP4 (2 << 0)
-# define R500_ALU_RGBA_OP_D2A (3 << 0)
-# define R500_ALU_RGBA_OP_MIN (4 << 0)
-# define R500_ALU_RGBA_OP_MAX (5 << 0)
-/* #define R500_ALU_RGBA_OP_RESERVED (6 << 0) */
-# define R500_ALU_RGBA_OP_CND (7 << 0)
-# define R500_ALU_RGBA_OP_CMP (8 << 0)
-# define R500_ALU_RGBA_OP_FRC (9 << 0)
-# define R500_ALU_RGBA_OP_SOP (10 << 0)
-# define R500_ALU_RGBA_OP_MDH (11 << 0)
-# define R500_ALU_RGBA_OP_MDV (12 << 0)
-# define R500_ALU_RGBA_ADDRD(x) (x << 4)
-# define R500_ALU_RGBA_ADDRD_REL (1 << 11)
-# define R500_ALU_RGBA_SEL_C_SRC0 (0 << 12)
-# define R500_ALU_RGBA_SEL_C_SRC1 (1 << 12)
-# define R500_ALU_RGBA_SEL_C_SRC2 (2 << 12)
-# define R500_ALU_RGBA_SEL_C_SRCP (3 << 12)
-# define R500_ALU_RGBA_R_SWIZ_R (0 << 14)
-# define R500_ALU_RGBA_R_SWIZ_G (1 << 14)
-# define R500_ALU_RGBA_R_SWIZ_B (2 << 14)
-# define R500_ALU_RGBA_R_SWIZ_A (3 << 14)
-# define R500_ALU_RGBA_R_SWIZ_0 (4 << 14)
-# define R500_ALU_RGBA_R_SWIZ_HALF (5 << 14)
-# define R500_ALU_RGBA_R_SWIZ_1 (6 << 14)
-/* #define R500_ALU_RGBA_R_SWIZ_UNUSED (7 << 14) */
-# define R500_ALU_RGBA_G_SWIZ_R (0 << 17)
-# define R500_ALU_RGBA_G_SWIZ_G (1 << 17)
-# define R500_ALU_RGBA_G_SWIZ_B (2 << 17)
-# define R500_ALU_RGBA_G_SWIZ_A (3 << 17)
-# define R500_ALU_RGBA_G_SWIZ_0 (4 << 17)
-# define R500_ALU_RGBA_G_SWIZ_HALF (5 << 17)
-# define R500_ALU_RGBA_G_SWIZ_1 (6 << 17)
-/* #define R500_ALU_RGBA_G_SWIZ_UNUSED (7 << 17) */
-# define R500_ALU_RGBA_B_SWIZ_R (0 << 20)
-# define R500_ALU_RGBA_B_SWIZ_G (1 << 20)
-# define R500_ALU_RGBA_B_SWIZ_B (2 << 20)
-# define R500_ALU_RGBA_B_SWIZ_A (3 << 20)
-# define R500_ALU_RGBA_B_SWIZ_0 (4 << 20)
-# define R500_ALU_RGBA_B_SWIZ_HALF (5 << 20)
-# define R500_ALU_RGBA_B_SWIZ_1 (6 << 20)
-/* #define R500_ALU_RGBA_B_SWIZ_UNUSED (7 << 20) */
-# define R500_ALU_RGBA_MOD_C_NOP (0 << 23)
-# define R500_ALU_RGBA_MOD_C_NEG (1 << 23)
-# define R500_ALU_RGBA_MOD_C_ABS (2 << 23)
-# define R500_ALU_RGBA_MOD_C_NAB (3 << 23)
-# define R500_ALU_RGBA_ALPHA_SEL_C_SRC0 (0 << 25)
-# define R500_ALU_RGBA_ALPHA_SEL_C_SRC1 (1 << 25)
-# define R500_ALU_RGBA_ALPHA_SEL_C_SRC2 (2 << 25)
-# define R500_ALU_RGBA_ALPHA_SEL_C_SRCP (3 << 25)
-# define R500_ALU_RGBA_A_SWIZ_R (0 << 27)
-# define R500_ALU_RGBA_A_SWIZ_G (1 << 27)
-# define R500_ALU_RGBA_A_SWIZ_B (2 << 27)
-# define R500_ALU_RGBA_A_SWIZ_A (3 << 27)
-# define R500_ALU_RGBA_A_SWIZ_0 (4 << 27)
-# define R500_ALU_RGBA_A_SWIZ_HALF (5 << 27)
-# define R500_ALU_RGBA_A_SWIZ_1 (6 << 27)
-/* #define R500_ALU_RGBA_A_SWIZ_UNUSED (7 << 27) */
-# define R500_ALU_RGBA_ALPHA_MOD_C_NOP (0 << 30)
-# define R500_ALU_RGBA_ALPHA_MOD_C_NEG (1 << 30)
-# define R500_ALU_RGBA_ALPHA_MOD_C_ABS (2 << 30)
-# define R500_ALU_RGBA_ALPHA_MOD_C_NAB (3 << 30)
-
+#define R500_US_ALU_RGB_ADDR_0 0x9000
+# define R500_RGB_ADDR0(x) ((x) << 0)
+# define R500_RGB_ADDR0_CONST (1 << 8)
+# define R500_RGB_ADDR0_REL (1 << 9)
+# define R500_RGB_ADDR1(x) ((x) << 10)
+# define R500_RGB_ADDR1_CONST (1 << 18)
+# define R500_RGB_ADDR1_REL (1 << 19)
+# define R500_RGB_ADDR2(x) ((x) << 20)
+# define R500_RGB_ADDR2_CONST (1 << 28)
+# define R500_RGB_ADDR2_REL (1 << 29)
+# define R500_RGB_SRCP_OP_1_MINUS_2RGB0 (0 << 30)
+# define R500_RGB_SRCP_OP_RGB1_MINUS_RGB0 (1 << 30)
+# define R500_RGB_SRCP_OP_RGB1_PLUS_RGB0 (2 << 30)
+# define R500_RGB_SRCP_OP_1_MINUS_RGB0 (3 << 30)
#define R500_US_CMN_INST_0 0xb800
# define R500_INST_TYPE_ALU (0 << 0)
# define R500_INST_TYPE_OUT (1 << 0)
@@ -1348,5 +1320,263 @@
# define R500_INST_STAT_WE_G (1 << 29)
# define R500_INST_STAT_WE_B (1 << 30)
# define R500_INST_STAT_WE_A (1 << 31)
+/* note that these are 8 bit lengths, despite the offsets, at least for R500 */
+#define R500_US_CODE_ADDR 0x4630
+# define R500_US_CODE_START_ADDR(x) ((x) << 0)
+# define R500_US_CODE_END_ADDR(x) ((x) << 16)
+#define R500_US_CODE_OFFSET 0x4638
+# define R500_US_CODE_OFFSET_ADDR(x) ((x) << 0)
+#define R500_US_CODE_RANGE 0x4634
+# define R500_US_CODE_RANGE_ADDR(x) ((x) << 0)
+# define R500_US_CODE_RANGE_SIZE(x) ((x) << 16)
+#define R500_US_CONFIG 0x4600
+# define R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO (1 << 1)
+#define R500_US_FC_ADDR_0 0xa000
+# define R500_FC_BOOL_ADDR(x) ((x) << 0)
+# define R500_FC_INT_ADDR(x) ((x) << 8)
+# define R500_FC_JUMP_ADDR(x) ((x) << 16)
+# define R500_FC_JUMP_GLOBAL (1 << 31)
+#define R500_US_FC_BOOL_CONST 0x4620
+# define R500_FC_KBOOL(x) (x)
+#define R500_US_FC_CTRL 0x4624
+# define R500_FC_TEST_EN (1 << 30)
+# define R500_FC_FULL_FC_EN (1 << 31)
+#define R500_US_FC_INST_0 0x9800
+# define R500_FC_OP_JUMP (0 << 0)
+# define R500_FC_OP_LOOP (1 << 0)
+# define R500_FC_OP_ENDLOOP (2 << 0)
+# define R500_FC_OP_REP (3 << 0)
+# define R500_FC_OP_ENDREP (4 << 0)
+# define R500_FC_OP_BREAKLOOP (5 << 0)
+# define R500_FC_OP_BREAKREP (6 << 0)
+# define R500_FC_OP_CONTINUE (7 << 0)
+# define R500_FC_B_ELSE (1 << 4)
+# define R500_FC_JUMP_ANY (1 << 5)
+# define R500_FC_A_OP_NONE (0 << 6)
+# define R500_FC_A_OP_POP (1 << 6)
+# define R500_FC_A_OP_PUSH (2 << 6)
+# define R500_FC_JUMP_FUNC(x) ((x) << 8)
+# define R500_FC_B_POP_CNT(x) ((x) << 16)
+# define R500_FC_B_OP0_NONE (0 << 24)
+# define R500_FC_B_OP0_DECR (1 << 24)
+# define R500_FC_B_OP0_INCR (2 << 24)
+# define R500_FC_B_OP1_DECR (0 << 26)
+# define R500_FC_B_OP1_NONE (1 << 26)
+# define R500_FC_B_OP1_INCR (2 << 26)
+# define R500_FC_IGNORE_UNCOVERED (1 << 28)
+#define R500_US_FC_INT_CONST_0 0x4c00
+# define R500_FC_INT_CONST_KR(x) ((x) << 0)
+# define R500_FC_INT_CONST_KG(x) ((x) << 8)
+# define R500_FC_INT_CONST_KB(x) ((x) << 16)
+/* _0 through _15 */
+#define R500_US_FORMAT0_0 0x4640
+# define R500_FORMAT_TXWIDTH(x) ((x) << 0)
+# define R500_FORMAT_TXHEIGHT(x) ((x) << 11)
+# define R500_FORMAT_TXDEPTH(x) ((x) << 22)
+/* _0 through _3 */
+#define R500_US_OUT_FMT_0 0x46a4
+# define R500_OUT_FMT_C4_8 (0 << 0)
+# define R500_OUT_FMT_C4_10 (1 << 0)
+# define R500_OUT_FMT_C4_10_GAMMA (2 << 0)
+# define R500_OUT_FMT_C_16 (3 << 0)
+# define R500_OUT_FMT_C2_16 (4 << 0)
+# define R500_OUT_FMT_C4_16 (5 << 0)
+# define R500_OUT_FMT_C_16_MPEG (6 << 0)
+# define R500_OUT_FMT_C2_16_MPEG (7 << 0)
+# define R500_OUT_FMT_C2_4 (8 << 0)
+# define R500_OUT_FMT_C_3_3_2 (9 << 0)
+# define R500_OUT_FMT_C_6_5_6 (10 << 0)
+# define R500_OUT_FMT_C_11_11_10 (11 << 0)
+# define R500_OUT_FMT_C_10_11_11 (12 << 0)
+# define R500_OUT_FMT_C_2_10_10_10 (13 << 0)
+/* #define R500_OUT_FMT_RESERVED (14 << 0) */
+# define R500_OUT_FMT_UNUSED (15 << 0)
+# define R500_OUT_FMT_C_16_FP (16 << 0)
+# define R500_OUT_FMT_C2_16_FP (17 << 0)
+# define R500_OUT_FMT_C4_16_FP (18 << 0)
+# define R500_OUT_FMT_C_32_FP (19 << 0)
+# define R500_OUT_FMT_C2_32_FP (20 << 0)
+# define R500_OUT_FMT_C4_32_FP (21 << 0)
+# define R500_C0_SEL_A (0 << 8)
+# define R500_C0_SEL_R (1 << 8)
+# define R500_C0_SEL_G (2 << 8)
+# define R500_C0_SEL_B (3 << 8)
+# define R500_C1_SEL_A (0 << 10)
+# define R500_C1_SEL_R (1 << 10)
+# define R500_C1_SEL_G (2 << 10)
+# define R500_C1_SEL_B (3 << 10)
+# define R500_C2_SEL_A (0 << 12)
+# define R500_C2_SEL_R (1 << 12)
+# define R500_C2_SEL_G (2 << 12)
+# define R500_C2_SEL_B (3 << 12)
+# define R500_C3_SEL_A (0 << 14)
+# define R500_C3_SEL_R (1 << 14)
+# define R500_C3_SEL_G (2 << 14)
+# define R500_C3_SEL_B (3 << 14)
+# define R500_OUT_SIGN(x) ((x) << 16)
+# define R500_ROUND_ADJ (1 << 20)
+#define R500_US_PIXSIZE 0x4604
+# define R500_PIX_SIZE(x) (x)
+#define R500_US_TEX_ADDR_0 0x9800
+# define R500_TEX_SRC_ADDR(x) ((x) << 0)
+# define R500_TEX_SRC_ADDR_REL (1 << 7)
+# define R500_TEX_SRC_S_SWIZ_R (0 << 8)
+# define R500_TEX_SRC_S_SWIZ_G (1 << 8)
+# define R500_TEX_SRC_S_SWIZ_B (2 << 8)
+# define R500_TEX_SRC_S_SWIZ_A (3 << 8)
+# define R500_TEX_SRC_T_SWIZ_R (0 << 10)
+# define R500_TEX_SRC_T_SWIZ_G (1 << 10)
+# define R500_TEX_SRC_T_SWIZ_B (2 << 10)
+# define R500_TEX_SRC_T_SWIZ_A (3 << 10)
+# define R500_TEX_SRC_R_SWIZ_R (0 << 12)
+# define R500_TEX_SRC_R_SWIZ_G (1 << 12)
+# define R500_TEX_SRC_R_SWIZ_B (2 << 12)
+# define R500_TEX_SRC_R_SWIZ_A (3 << 12)
+# define R500_TEX_SRC_Q_SWIZ_R (0 << 14)
+# define R500_TEX_SRC_Q_SWIZ_G (1 << 14)
+# define R500_TEX_SRC_Q_SWIZ_B (2 << 14)
+# define R500_TEX_SRC_Q_SWIZ_A (3 << 14)
+# define R500_TEX_DST_ADDR(x) ((x) << 16)
+# define R500_TEX_DST_ADDR_REL (1 << 23)
+# define R500_TEX_DST_R_SWIZ_R (0 << 24)
+# define R500_TEX_DST_R_SWIZ_G (1 << 24)
+# define R500_TEX_DST_R_SWIZ_B (2 << 24)
+# define R500_TEX_DST_R_SWIZ_A (3 << 24)
+# define R500_TEX_DST_G_SWIZ_R (0 << 26)
+# define R500_TEX_DST_G_SWIZ_G (1 << 26)
+# define R500_TEX_DST_G_SWIZ_B (2 << 26)
+# define R500_TEX_DST_G_SWIZ_A (3 << 26)
+# define R500_TEX_DST_B_SWIZ_R (0 << 28)
+# define R500_TEX_DST_B_SWIZ_G (1 << 28)
+# define R500_TEX_DST_B_SWIZ_B (2 << 28)
+# define R500_TEX_DST_B_SWIZ_A (3 << 28)
+# define R500_TEX_DST_A_SWIZ_R (0 << 30)
+# define R500_TEX_DST_A_SWIZ_G (1 << 30)
+# define R500_TEX_DST_A_SWIZ_B (2 << 30)
+# define R500_TEX_DST_A_SWIZ_A (3 << 30)
+#define R500_US_TEX_ADDR_DXDY_0 0xa000
+# define R500_DX_ADDR(x) ((x) << 0)
+# define R500_DX_ADDR_REL (1 << 7)
+# define R500_DX_S_SWIZ_R (0 << 8)
+# define R500_DX_S_SWIZ_G (1 << 8)
+# define R500_DX_S_SWIZ_B (2 << 8)
+# define R500_DX_S_SWIZ_A (3 << 8)
+# define R500_DX_T_SWIZ_R (0 << 10)
+# define R500_DX_T_SWIZ_G (1 << 10)
+# define R500_DX_T_SWIZ_B (2 << 10)
+# define R500_DX_T_SWIZ_A (3 << 10)
+# define R500_DX_R_SWIZ_R (0 << 12)
+# define R500_DX_R_SWIZ_G (1 << 12)
+# define R500_DX_R_SWIZ_B (2 << 12)
+# define R500_DX_R_SWIZ_A (3 << 12)
+# define R500_DX_Q_SWIZ_R (0 << 14)
+# define R500_DX_Q_SWIZ_G (1 << 14)
+# define R500_DX_Q_SWIZ_B (2 << 14)
+# define R500_DX_Q_SWIZ_A (3 << 14)
+# define R500_DY_ADDR(x) ((x) << 16)
+# define R500_DY_ADDR_REL (1 << 17)
+# define R500_DY_S_SWIZ_R (0 << 24)
+# define R500_DY_S_SWIZ_G (1 << 24)
+# define R500_DY_S_SWIZ_B (2 << 24)
+# define R500_DY_S_SWIZ_A (3 << 24)
+# define R500_DY_T_SWIZ_R (0 << 26)
+# define R500_DY_T_SWIZ_G (1 << 26)
+# define R500_DY_T_SWIZ_B (2 << 26)
+# define R500_DY_T_SWIZ_A (3 << 26)
+# define R500_DY_R_SWIZ_R (0 << 28)
+# define R500_DY_R_SWIZ_G (1 << 28)
+# define R500_DY_R_SWIZ_B (2 << 28)
+# define R500_DY_R_SWIZ_A (3 << 28)
+# define R500_DY_Q_SWIZ_R (0 << 30)
+# define R500_DY_Q_SWIZ_G (1 << 30)
+# define R500_DY_Q_SWIZ_B (2 << 30)
+# define R500_DY_Q_SWIZ_A (3 << 30)
+#define R500_US_TEX_INST_0 0x9000
+# define R500_TEX_ID(x) ((x) << 16)
+# define R500_TEX_INST_NOP (0 << 22)
+# define R500_TEX_INST_LD (1 << 22)
+# define R500_TEX_INST_TEXKILL (2 << 22)
+# define R500_TEX_INST_PROJ (3 << 22)
+# define R500_TEX_INST_LODBIAS (4 << 22)
+# define R500_TEX_INST_LOD (5 << 22)
+# define R500_TEX_INST_DXDY (6 << 22)
+# define R500_TEX_SEM_ACQUIRE (1 << 25)
+# define R500_TEX_IGNORE_UNCOVERED (1 << 26)
+# define R500_TEX_UNSCALED (1 << 27)
+#define R500_US_W_FMT 0x46b4
+# define R500_W_FMT_W0 (0 << 0)
+# define R500_W_FMT_W24 (1 << 0)
+# define R500_W_FMT_W24FP (2 << 0)
+# define R500_W_SRC_US (0 << 2)
+# define R500_W_SRC_RAS (1 << 2)
+
+#define R500_GA_US_VECTOR_INDEX 0x4250
+#define R500_GA_US_VECTOR_DATA 0x4254
+
+#define R500_RS_INST_0 0x4320
+#define R500_RS_INST_1 0x4324
+# define R500_RS_INST_TEX_ID_SHIFT 0
+# define R500_RS_INST_TEX_CN_WRITE (1 << 4)
+# define R500_RS_INST_TEX_ADDR_SHIFT 5
+# define R500_RS_INST_COL_ID_SHIFT 12
+# define R500_RS_INST_COL_CN_NO_WRITE (0 << 16)
+# define R500_RS_INST_COL_CN_WRITE (1 << 16)
+# define R500_RS_INST_COL_CN_WRITE_FBUFFER (2 << 16)
+# define R500_RS_INST_COL_CN_WRITE_BACKFACE (3 << 16)
+# define R500_RS_INST_COL_COL_ADDR_SHIFT 18
+# define R500_RS_INST_TEX_ADJ (1 << 25)
+# define R500_RS_INST_W_CN (1 << 26)
+
+#define R500_US_FC_CTRL 0x4624
+#define R500_US_CODE_ADDR 0x4630
+#define R500_US_CODE_RANGE 0x4634
+#define R500_US_CODE_OFFSET 0x4638
+
+#define R500_RS_IP_0 0x4074
+#define R500_RS_IP_1 0x4078
+# define R500_RS_IP_PTR_K0 62
+# define R500_RS_IP_PTR_K1 63
+# define R500_RS_IP_TEX_PTR_S_SHIFT 0
+# define R500_RS_IP_TEX_PTR_T_SHIFT 6
+# define R500_RS_IP_TEX_PTR_R_SHIFT 12
+# define R500_RS_IP_TEX_PTR_Q_SHIFT 18
+# define R500_RS_IP_COL_PTR_SHIFT 24
+# define R500_RS_IP_COL_FMT_SHIFT 27
+# define R500_RS_IP_COL_FMT_RGBA (0 << 27)
+# define R500_RS_IP_OFFSET_EN (1 << 31)
+
+#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
+
+
+/* Overlay control registers */
+#define AVIVO_D1OVL_COLOR_MATRIX_TRANS_CNTL 0x6140
+#define AVIVO_D1OVL_ENABLE 0x6180
+#define AVIVO_D1OVL_CONTROL1 0x6184
+#define AVIVO_D1OVL_CONTROL2 0x6188
+#define AVIVO_D1OVL_SWAPCNTL 0x618c
+#define AVIVO_D1OVL_SURFACE_ADDRESS 0x6190
+#define AVIVO_D1OVL_PITCH 0x6198
+#define AVIVO_D1OVL_SURFACE_OFFSET_X 0x619c
+#define AVIVO_D1OVL_SURFACE_OFFSET_Y 0x61a0
+#define AVIVO_D1OVL_START 0x61a4
+#define AVIVO_D1OVL_END 0x61a8
+#define AVIVO_D1OVL_UPDATE 0x61ac
+#define AVIVO_D1OVL_ADDRESS_INUSE 0x61b0
+#define AVIVO_D1OVL_DFQ_STATUS 0x61b8
+#define AVIVO_D1OVL_MATRIX_TRANSFORM_EN 0x6200
+
+#define AVIVO_D1OVL_RT_SKEWCOMMAND 0x6500
+#define AVIVO_D1OVL_RT_BAND_POSITION 0x6508
+#define AVIVO_D1OVL_RT_PROCEED_COND 0x650c
+#define AVIVO_D1OVL_RT_STAT 0x6510
+
+#define AVIVO_D1OVL_COLOR_MATRIX_TRANSFORMATION_CNTL 0x6140
+#define AVIVO_D1OVL_MATRIX_TRANSFORM_EN 0x6200
+#define AVIVO_D1OVL_PWL_TRANSFORM_EN 0x6280
+#define AVIVO_D1OVL_KEY_CONTROL 0x6300
+#define AVIVO_D1OVL_ALPHA_CONTROL 0x630c
+
+#define AVIVO_D1CRTC_SNAPSHOT_STATUS 0x60c8
+
#endif /* HAVE_R5XX_3DREGS_H */
diff -u -r xf86-video-radeonhd/src/r600_textured_videofuncs.c xf86-video-radeonhd-work/src/r600_textured_videofuncs.c
--- xf86-video-radeonhd/src/r600_textured_videofuncs.c 2009-04-24 19:32:07.000000000 +0200
+++ xf86-video-radeonhd-work/src/r600_textured_videofuncs.c 2009-04-24 19:34:03.000000000 +0200
@@ -146,7 +146,7 @@
CLEAR (ps_conf);
accel_state->dst_pitch = exaGetPixmapPitch(pPixmap) / (pPixmap->drawable.bitsPerPixel / 8);
- accel_state->src_pitch[0] = pPriv->BufferPitch;
+ accel_state->src_pitch[0] = pPriv->SrcBufferPitch;
// bad pitch
if (accel_state->src_pitch[0] & 7)
@@ -226,7 +226,7 @@
switch(pPriv->id) {
case FOURCC_YV12:
case FOURCC_I420:
- accel_state->src_mc_addr[0] = pPriv->BufferOffset + rhdPtr->FbIntAddress + rhdPtr->FbScanoutStart;
+ accel_state->src_mc_addr[0] = pPriv->SrcBufferOffset + rhdPtr->FbIntAddress + rhdPtr->FbScanoutStart;
accel_state->src_size[0] = accel_state->src_pitch[0] * pPriv->h;
/* flush texture cache */
@@ -336,7 +336,7 @@
case FOURCC_UYVY:
case FOURCC_YUY2:
default:
- accel_state->src_mc_addr[0] = pPriv->BufferOffset + rhdPtr->FbIntAddress + rhdPtr->FbScanoutStart;
+ accel_state->src_mc_addr[0] = pPriv->SrcBufferOffset + rhdPtr->FbIntAddress + rhdPtr->FbScanoutStart;
accel_state->src_size[0] = accel_state->src_pitch[0] * pPriv->h;
/* flush texture cache */
diff -u -r xf86-video-radeonhd/src/radeon_textured_videofuncs.c xf86-video-radeonhd-work/src/radeon_textured_videofuncs.c
--- xf86-video-radeonhd/src/radeon_textured_videofuncs.c 2009-04-24 19:32:07.000000000 +0200
+++ xf86-video-radeonhd-work/src/radeon_textured_videofuncs.c 2009-05-03 20:15:39.000000000 +0200
@@ -24,64 +24,10 @@
* Based on radeon_exa_render.c and kdrive ati_video.c by Eric Anholt, et al.
*
*/
+
#if defined(IS_RADEON_DRIVER) || defined(IS_QUICK_AND_DIRTY)
-#if defined(ACCEL_MMIO) && defined(ACCEL_CP)
-#error Cannot define both MMIO and CP acceleration!
-#endif
-
-#if !defined(UNIXCPP) || defined(ANSICPP)
-#define FUNC_NAME_CAT(prefix,suffix) prefix##suffix
-#else
-#define FUNC_NAME_CAT(prefix,suffix) prefix/**/suffix
-#endif
-
-#ifdef ACCEL_MMIO
-#define FUNC_NAME(prefix) FUNC_NAME_CAT(prefix,MMIO)
-#else
-#ifdef ACCEL_CP
-#define FUNC_NAME(prefix) FUNC_NAME_CAT(prefix,CP)
-#else
-#error No accel type defined!
-#endif
-#endif
-
-#define VTX_DWORD_COUNT 4
-
-#ifdef ACCEL_CP
-
-#define VTX_OUT(_dstX, _dstY, _srcX, _srcY) \
-do { \
- OUT_VIDEO_RING_F(_dstX); \
- OUT_VIDEO_RING_F(_dstY); \
- OUT_VIDEO_RING_F(_srcX); \
- OUT_VIDEO_RING_F(_srcY); \
-} while (0)
-
-#else /* ACCEL_CP */
-
-#define VTX_OUT(_dstX, _dstY, _srcX, _srcY) \
-do { \
- OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _dstX); \
- OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _dstY); \
- OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _srcX); \
- OUT_VIDEO_REG_F(RADEON_SE_PORT_DATA0, _srcY); \
-} while (0)
-# define VAR_PSCRN_PREAMBLE(pScrn) RHDPtr info = RHDPTR(pScrn)
-# define THREEDSTATE_PREAMBLE() struct rhdAccel *accel_state = info->accel_state
-
-# define BUFFER_PITCH pPriv->src_pitch
-# define FB_BUFFER_OFFSET pPriv->src_offset
-# define FB_PIXMAP_OFFSET(x) (((char *)(x) - (char *)rhdPtr->FbBase) + rhdPtr->FbIntAddress)
-
-# ifdef USE_EXA
-# define EXA_ENABLED (info->AccelMethod == RHD_ACCEL_EXA)
-# define EXA_FB_OFFSET (info->FbIntAddress + info->FbScanoutStart)
-# endif
-
-# define HAS_TCL IS_R500_3D
-
-#endif /* !ACCEL_CP */
+#error "Bad define in textured_videofuncs"
#else /* IS_RADEON_DRIVER */
@@ -101,6 +47,8 @@
# include "r5xx_3dregs.h"
# include "rhd_video.h"
+#include
Hi everybody, attached is the last status of the RS690 HDMI Audio patch. Its based on a patch from Christiaan van Dijk, just stripped down the bare minimum necessary. Sorry for the delay, but i'm very busy atm, and will properly be till the end of this summer. Bye, Christian.
On May 13, 09 22:46:13 +0200, Christian König wrote:
attached is the last status of the RS690 HDMI Audio patch. Its based on a patch from Christiaan van Dijk, just stripped down the bare minimum necessary. Sorry for the delay, but i'm very busy atm, and will properly be till the end of this summer.
Thanks, Christian.
Pushed it.
Matthias
--
Matthias Hopf
2009/5/18 Matthias Hopf
On May 13, 09 22:46:13 +0200, Christian König wrote:
attached is the last status of the RS690 HDMI Audio patch. Its based on a patch from Christiaan van Dijk, just stripped down the bare minimum necessary. Sorry for the delay, but i'm very busy atm, and will properly be till the end of this summer.
Thanks, Christian. Pushed it.
Matthias
Finished testing this with my RV635 right now :) Works great with 720p and 1080p on both: DVI-I_1/digital DVI-I_2/digital So no regressions :) -- Rafał Miłecki -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
2009/5/18 Rafał Miłecki
2009/5/18 Matthias Hopf
: On May 13, 09 22:46:13 +0200, Christian König wrote:
attached is the last status of the RS690 HDMI Audio patch. Its based on a patch from Christiaan van Dijk, just stripped down the bare minimum necessary. Sorry for the delay, but i'm very busy atm, and will properly be till the end of this summer.
Thanks, Christian. Pushed it.
Matthias
Finished testing this with my RV635 right now :)
Works great with 720p and 1080p on both: DVI-I_1/digital DVI-I_2/digital
So no regressions :)
Also no regressions on RV620 (M82). -- Rafał Miłecki -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
alexdeucher@gmail.com said:
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders.
I recall reading something on this somehwere (phoronix?). it was something along the lines of mc for mpeg2 (ie DVD content) could (is?) easily done in CPUs these days so there's no need to spend the manhours on using HW acceleration for it. Is that so?
I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever.
Aha. But, if I understand it currectly, there _is_ tanglible stuff for hd playback (h.264) which the rs690 could help with, which has not yet been implemented? If so, are there plans to implement those parts? -Anders -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On Wed, May 13, 2009 at 3:50 AM, Anders Eriksson
alexdeucher@gmail.com said:
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders.
I recall reading something on this somehwere (phoronix?). it was something along the lines of mc for mpeg2 (ie DVD content) could (is?) easily done in CPUs these days so there's no need to spend the manhours on using HW acceleration for it. Is that so?
Shaders could be used for just about any video format. mpeg 1 and 2 would be easiest to implement since there is already an API to accelerate them (XvMC).
I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever.
Aha. But, if I understand it currectly, there _is_ tanglible stuff for hd playback (h.264) which the rs690 could help with, which has not yet been implemented? If so, are there plans to implement those parts?
Hopefully eventually. The information is available in the meantime for anyone who's interested. Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
))Aha. But, if I understand it currectly, there _is_ tanglible stuff for hd playback (h.264) which the rs690 could help with, which has not yet been implemented? If so, are there plans to implement those parts? I don't think there is any other decode acceleration hardware in RS690 other than the MPEG-2 IDCT engine. As Alex and others have mentioned, shaders can definitely be used for MC and post-filtering; it's less clear how much of a benefit you get from using them further up the pipe eg IQ and IDCT. -----Original Message----- From: Anders Eriksson [mailto:aeriksson@fastmail.fm] Sent: Wednesday, May 13, 2009 3:50 AM To: Alex Deucher Cc: Rafał Miłecki; Anders Eriksson; Matthias Hopf; Christiaan van Dijk; Christian König; radeonhd@opensuse.org Subject: Re: [radeonhd] RS690 full-HD performance alexdeucher@gmail.com said:
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders.
I recall reading something on this somehwere (phoronix?). it was something along the lines of mc for mpeg2 (ie DVD content) could (is?) easily done in CPUs these days so there's no need to spend the manhours on using HW acceleration for it. Is that so?
I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever.
Aha. But, if I understand it currectly, there _is_ tanglible stuff for hd playback (h.264) which the rs690 could help with, which has not yet been implemented? If so, are there plans to implement those parts? -Anders -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On May 12, 09 17:25:57 +0200, Rafał Miłecki wrote:
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined. Can you be more specific about this, please? I'm really intereseted
Do you mean "is mostly done" or rather "can be mostly done"? Is that implemented anywhere? Does that hardware mean RS690 or R5xx-R7xx,
IDCT and motion compensation can be done with regular shaders. But what
will bite you in h264 is the Cabac (sp?) encoding. It's said to need 45%
of decompression time on CPUs, and that won't go away. I assume the UVD
block in the hardware has the capability for this entropy decoding
algorithm.
AFAIR there have been papers on how to implement IDCT and motion
compensation with shaders. I'm sorry, I don't remember where I read
them, but it could even be white papers from NVIDIA (which doesn't mean
that it can only be used on NVIDIA hardware).
CU
Matthias
--
Matthias Hopf
On Tue, May 12, 2009 at 12:17 PM, Matthias Hopf
On May 12, 09 17:25:57 +0200, Rafał Miłecki wrote:
Video decode is mostly done on shaders (at least motion compensation) on that hardware. We've released the 3D engine information on these chips so this could be implemented now if anyone was so inclined. Can you be more specific about this, please? I'm really intereseted
Do you mean "is mostly done" or rather "can be mostly done"? Is that implemented anywhere? Does that hardware mean RS690 or R5xx-R7xx,
IDCT and motion compensation can be done with regular shaders. But what will bite you in h264 is the Cabac (sp?) encoding. It's said to need 45% of decompression time on CPUs, and that won't go away. I assume the UVD block in the hardware has the capability for this entropy decoding algorithm.
AFAIR there have been papers on how to implement IDCT and motion compensation with shaders. I'm sorry, I don't remember where I read them, but it could even be white papers from NVIDIA (which doesn't mean that it can only be used on NVIDIA hardware).
Also, there is a gallium frontend for video decode: http://www.bitblit.org/gsoc/g3dvl/index.shtml Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On 13/05/2009, at 3:08 AM, Rafał Miłecki wrote:
I consider myself far from being audiophile, but there IS difference between analog single-jack signal and digital signal with nice audio receiver.
I concur. Most analogue audio out of computer is crap. If you playing into the speaker of your computer monitor or into a little desktop speaker system, then it doesn't matter, since such speaker systems are crappier. I have a semi-professional quality sound card in my computer, rated to better than 100dB signal-to-noise ratio on the analogue, playing into a decent stereo system. That's reasonable - but a CD ripped on the computer (into FLAC lossless codec) and played back through that sound card is still not as good quality sound as playing the original CD directly in the audio CD player of the stereo sound system. Also some of the opensource audio codec decoders are of dubious quality. I am not overly impressed with the AC3 decoding in mplayer (i think it now uses a libavcodec decoder) and AAC decoding (using FAAD2; the libavcodec AAC decoder doesn't work on any of my files) often produces quite erroneous sound. I'm looking forward to being able to export the digital content out via HDMI into a decent audio processor.
If I have to _choose_ between high-end audio with broken video, or traditional audio and _working_ video playback, I sure know where my vote is.
And my vote is with the audio! Indeed, I have already exercised that vote: I watch my video/DVDs on a lowly computer monitor, but have spent money on a decent sound card and separates hi-fi quality sound system. I am now spending even more money on the sound system but still don't see a reason to upgrade the computer monitor. I admit I am a little unusual in this respect!
I don't think using audio in HDMI actually affects video playback. Didn't notice that ever.
IIRC, the audio is encoded in the video blanking period of the video signal. It should not affect the video whatsoever.
So it's really hard to play full HD material on ATI :(
Yeah, it's a bummer. I have a DVB-T card in my computer to receive the NZ Freeview TV broadcast. It's MPEG4 (i.e. h264 and AAC) which is very computationally intensive to decode. My computer cannot manage it - not even at standard definition TV (though I may one day optimise some of the ffmpeg libavcodec code for my computer architecture which might just get me SDTV playback but definitely not HDTV). So at the moment I listen to the radio programmes recorded from the DVB-T card, and can't watch the TV broadcasts. Yeah, I know I could upgrade the computer but why do that when I can spend the money on upgrading my sound system? Michael. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On Tuesday 12 May 2009 3:30:42 pm Michael Cree wrote:
If I have to choose between high-end audio with broken video, or traditional audio and working video playback, I sure know where my vote is.
And my vote is with the audio! Indeed, I have already exercised that vote: I watch my video/DVDs on a lowly computer monitor, but have spent money on a decent sound card and separates hi-fi quality sound system. I am now spending even more money on the sound system but still don't see a reason to upgrade the computer monitor.
I admit I am a little unusual in this respect!
I have to admit ... I want to buy a small computer with a decent video card with HDMI-out and gigabit-ethernet, dvdrom (maybe blu-ray), etc., to plug into my "big" screen TV (via A/V amp - HDMI in, component out), simply to play videos. It'd even be able to replace the DVD player I have, as well as being able to replace the CD player - just put all my CDs on the disk (or on the network somewhere) and be able to play anything I want any time I want. Or even to play an internet radio station. I don't know what video card is best for this, but the video card and driver will be the most critical parts to this, so I'm waiting to see what is best - oh and it has to be linux. I'm not going to use Windows for this. -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
zajec5@gmail.com said:
I don't think using audio in HDMI actually affects video playback. Didn't notice that ever.
It obiously shouldn't. Lurking on the list, I've gotten the impression that there is a shortage of manpower to implement/expose all capabilities of the hw. If that's not the case, great! No need to choose what to implement and what to skip. /Anders -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
participants (11)
-
A.Yerenkow
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Alex Deucher
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Anders Eriksson
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Bridgman, John
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Christiaan van Dijk
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Christian König
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Darin McBride
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Matthias Hopf
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Michael Cree
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Rafał Miłecki
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yerenkow@uct.ua