On Fri, Jan 9, 2009 at 4:30 AM, Rob OpenSuSE <rob.opensuse.linux@googlemail.com> wrote:
Years ago memory access on first micro I used, was 1 or 2 CPU cycles. Now we have new chips with L3 caches taking 45 cycles, and system memory a lot more (100+?); so the old "memory is cheap and fast" meme doesn't hold so well now, even though memory is cheap, and faster thand it used to be, compared to processing speed increase it has lagged.
I'm not sure I agree with you here. Memory is cheap and fast, but CPU cycles have gotten shorter. 11 cycles on a QDR 800MHz bus goes much faster than 2 cycles on a 33Mhz bus, if it was even that. Even 140 cycles to main memory is faster. And once you get over the latency, the data is burst in and cached for longer. Access *times* are ~10 to ~100 times better than they were when you remember. Don't think of them in cycles, because bus speeds change. Think of them as a proportion of your total CPU speed and against your total memory bus speed (be it an internal controller or a FSB). My problem with MY systems is, I have a 128MB box I want to run a desktop on, and the system is NOT upgradable. However it's nice, fast DDR2 (but no L2 to back it up, poor little embedded processors..) and is still a hell of a lot faster doing random memory accesses with badly formatted data than old micros that did memory accesses in 2 cycles. -- Matt Sealey <matt@genesi-usa.com> Genesi, Manager, Developer Relations -- To unsubscribe, e-mail: opensuse-factory+unsubscribe@opensuse.org For additional commands, e-mail: opensuse-factory+help@opensuse.org