Hello community,
here is the log from the commit of package gcc43
checked in at Tue Sep 16 01:26:42 CEST 2008.
--------
--- gcc43/cross-avr-gcc43.changes 2008-09-12 18:41:44.000000000 +0200
+++ /mounts/work_src_done/STABLE/gcc43/cross-avr-gcc43.changes 2008-09-15 16:38:49.000000000 +0200
@@ -1,0 +2,13 @@
+Mon Sep 15 13:26:42 CEST 2008 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
+
+-------------------------------------------------------------------
cross-hppa-gcc-icecream-backend.changes: same change
cross-i386-gcc-icecream-backend.changes: same change
cross-ia64-gcc-icecream-backend.changes: same change
cross-ppc64-gcc-icecream-backend.changes: same change
cross-ppc-gcc-icecream-backend.changes: same change
cross-s390-gcc-icecream-backend.changes: same change
cross-s390x-gcc-icecream-backend.changes: same change
cross-spu-gcc.changes: same change
cross-spu-gcc-static.changes: same change
cross-x86_64-gcc-icecream-backend.changes: same change
gcc43.changes: same change
libgcj43.changes: same change
Old:
----
gcc-4.3.3-20080910.tar.bz2
New:
----
gcc-4.3.3-20080915.tar.bz2
nvl423594.patch
nvl425783.patch
nvl425784.patch
nvl425788.patch
nvl425789.patch
nvl425790.patch
nvl425791.patch
nvl425794.patch
nvl425798-1.patch
nvl425798-2.patch
nvl425799.patch
nvl425800.patch
nvl425803.patch
nvl425806.patch
nvl426087.patch
pr35620.diff
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ cross-avr-gcc43.spec ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:43.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:43.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-avr-gcc43 (Version 4.3.3_20080910)
+# spec file for package cross-avr-gcc43 (Version 4.3.3_20080915)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -62,7 +62,7 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: BSD 3-Clause; GPL v2 or later; LGPL v2.1 or later; X11/MIT
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -101,6 +101,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -139,6 +141,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
# LIBJAVA-DELETE-BEGIN
%description
@@ -210,6 +226,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -243,6 +261,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -447,6 +479,16 @@
%defattr(-,root,root)
%{_prefix}
%changelog
+* Mon Sep 15 2008 rguenther@suse.de
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
* Fri Sep 12 2008 dmueller@suse.de
- track compile flags in ELF objects (fate #300498)
* Wed Sep 10 2008 rguenther@suse.de
++++++ cross-hppa-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:43.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:43.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-hppa-gcc-icecream-backend (Version 4.3.3_20080910)
+# spec file for package cross-hppa-gcc-icecream-backend (Version 4.3.3_20080915)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -42,7 +42,7 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: BSD 3-Clause; GPL v2 or later; LGPL v2.1 or later; X11/MIT
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -81,6 +81,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -119,6 +121,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
# LIBJAVA-DELETE-BEGIN
%description
@@ -193,6 +209,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -226,6 +244,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -468,6 +500,16 @@
/usr/share/icecream-envs
%changelog
+* Mon Sep 15 2008 rguenther@suse.de
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
* Fri Sep 12 2008 dmueller@suse.de
- track compile flags in ELF objects (fate #300498)
* Wed Sep 10 2008 rguenther@suse.de
cross-i386-gcc-icecream-backend.spec: same change
cross-ia64-gcc-icecream-backend.spec: same change
cross-ppc64-gcc-icecream-backend.spec: same change
cross-ppc-gcc-icecream-backend.spec: same change
cross-s390-gcc-icecream-backend.spec: same change
cross-s390x-gcc-icecream-backend.spec: same change
++++++ cross-spu-gcc.spec ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:43.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:43.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-spu-gcc (Version 4.3.3_20080910)
+# spec file for package cross-spu-gcc (Version 4.3.3_20080915)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -53,7 +53,7 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: GPL v2 or later
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -92,6 +92,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -130,6 +132,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
# LIBJAVA-DELETE-BEGIN
%description
@@ -196,6 +212,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -229,6 +247,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -433,6 +465,16 @@
%defattr(-,root,root)
%{_prefix}
%changelog
+* Mon Sep 15 2008 rguenther@suse.de
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
* Fri Sep 12 2008 dmueller@suse.de
- track compile flags in ELF objects (fate #300498)
* Wed Sep 10 2008 rguenther@suse.de
cross-spu-gcc-static.spec: same change
++++++ cross-x86_64-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:43.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:43.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-x86_64-gcc-icecream-backend (Version 4.3.3_20080910)
+# spec file for package cross-x86_64-gcc-icecream-backend (Version 4.3.3_20080915)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -42,7 +42,7 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: BSD 3-Clause; GPL v2 or later; LGPL v2.1 or later; X11/MIT
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -81,6 +81,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -119,6 +121,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
# LIBJAVA-DELETE-BEGIN
%description
@@ -193,6 +209,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -226,6 +244,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -468,6 +500,16 @@
/usr/share/icecream-envs
%changelog
+* Mon Sep 15 2008 rguenther@suse.de
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
* Fri Sep 12 2008 dmueller@suse.de
- track compile flags in ELF objects (fate #300498)
* Wed Sep 10 2008 rguenther@suse.de
++++++ gcc43.spec ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:43.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:43.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package gcc43 (Version 4.3.3_20080910)
+# spec file for package gcc43 (Version 4.3.3_20080915)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -115,7 +115,7 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: GPL v3 or later
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -167,6 +167,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -205,6 +207,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
# LIBJAVA-DELETE-BEGIN
%description
@@ -1376,6 +1392,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -1409,6 +1427,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -1601,7 +1633,7 @@
# Only run profiled bootstrap on archs where it works
#%ifarch %ix86 x86_64 ppc ppc64 ia64
%ifarch %ix86 x86_64 ppc ppc64 ia64 s390 s390x
-make profiledbootstrap BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
+make profiledbootstrap-lean BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
%else
make bootstrap-lean BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
%endif
@@ -1842,6 +1874,7 @@
rm -f $RPM_BUILD_ROOT%{libsubdir}/include/cpuid.h
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
rm -f $RPM_BUILD_ROOT%{_prefix}/bin/gccbug%{binsuffix}
+%if !0%{?building_libjava:1}
# delete compile flag tracking from crt files
crt_list=$RPM_BUILD_ROOT%{versmainlibdir}/crt*.o
%if %{biarch}
@@ -1854,6 +1887,7 @@
for o in $crt_list $crt32_list $crt64_list; do
objcopy -R ".comment.SuSE.OPTs" $o
done
+%endif
%if %{build_libjava}
# gcj -static doesn't work properly anyway, unless using --whole-archive
# let's save the space instead.
@@ -2450,6 +2484,16 @@
%endif
%changelog
+* Mon Sep 15 2008 rguenther@suse.de
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
* Fri Sep 12 2008 dmueller@suse.de
- track compile flags in ELF objects (fate #300498)
* Wed Sep 10 2008 rguenther@suse.de
++++++ libgcj43.spec ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:44.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:44.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package libgcj43 (Version 4.3.3_20080910)
+# spec file for package libgcj43 (Version 4.3.3_20080915)
#
# Copyright (c) 2008 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -126,7 +126,7 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: GPL v2 or later; LGPL v2.1 or later
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -178,6 +178,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -216,6 +218,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
Summary: Java Runtime Library for gcc
Group: System/Libraries
%define gcj_sover 9
@@ -610,6 +626,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -643,6 +661,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -835,7 +867,7 @@
# Only run profiled bootstrap on archs where it works
#%ifarch %ix86 x86_64 ppc ppc64 ia64
%ifarch %ix86 x86_64 ppc ppc64 ia64 s390 s390x
-make profiledbootstrap BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
+make profiledbootstrap-lean BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
%else
make bootstrap-lean BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
%endif
@@ -1010,6 +1042,7 @@
rm -f $RPM_BUILD_ROOT%{libsubdir}/include/cpuid.h
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
rm -f $RPM_BUILD_ROOT%{_prefix}/bin/gccbug%{binsuffix}
+%if !0%{?building_libjava:1}
# delete compile flag tracking from crt files
crt_list=$RPM_BUILD_ROOT%{versmainlibdir}/crt*.o
%if %{biarch}
@@ -1022,6 +1055,7 @@
for o in $crt_list $crt32_list $crt64_list; do
objcopy -R ".comment.SuSE.OPTs" $o
done
+%endif
%if %{build_libjava}
# gcj -static doesn't work properly anyway, unless using --whole-archive
# let's save the space instead.
@@ -1250,6 +1284,16 @@
%endif
%changelog
+* Mon Sep 15 2008 rguenther@suse.de
+- Update to gcc-4_3-branch head (r140371).
+- Add patch for PR35620. [bnc#425697]
+- Add backport patches for powerpc bugfixes from GCC trunk.
+ [bnc#425806, bnc#425803, bnc#425800, bnc#425783, bnc#425784, bnc#425788,
+ bnc#425789, bnc#425790, bnc#425791, bnc#425794, bnc#425798, bnc#425799,
+ bnc#426087]
+- Add patch to fix invalid GIMPLE from SRA. [bnc#423594]
+- Fix libgcj43 build.
+- Make compile flags comment section non-allocated.
* Fri Sep 12 2008 dmueller@suse.de
- track compile flags in ELF objects (fate #300498)
* Wed Sep 10 2008 rguenther@suse.de
++++++ build-id.diff ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:44.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:44.000000000 +0200
@@ -12,14 +12,14 @@
===================================================================
--- gcc/gcc.c (revision 140203)
+++ gcc/gcc.c (working copy)
-@@ -1840,6 +1840,15 @@ init_spec (void)
+@@ -1826,6 +1826,15 @@ init_spec (void)
obstack_grow0 (&obstack, link_spec, strlen (link_spec));
link_spec = XOBFINISH (&obstack, const char *);
#endif
+#ifdef USE_BUILD_ID
+ /* Prepend "--build-id" to whatever link_spec we had before. */
+ {
-+ static const char tf[] = "--build-id ";
++ static const char tf[] = "%{!r:--build-id} ";
+ obstack_grow (&obstack, tf, sizeof(tf) - 1);
+ obstack_grow0 (&obstack, link_spec, strlen (link_spec));
+ link_spec = XOBFINISH (&obstack, const char *);
++++++ gcc-4.3.3-20080910.tar.bz2 -> gcc-4.3.3-20080915.tar.bz2 ++++++
gcc43/gcc-4.3.3-20080910.tar.bz2 /mounts/work_src_done/STABLE/gcc43/gcc-4.3.3-20080915.tar.bz2 differ: byte 11, line 1
++++++ gcc.spec.in ++++++
--- gcc43/gcc.spec.in 2008-09-12 18:49:54.000000000 +0200
+++ /mounts/work_src_done/STABLE/gcc43/gcc.spec.in 2008-09-15 17:34:29.000000000 +0200
@@ -123,7 +123,7 @@
URL: http://gcc.gnu.org/
License: GPL
-Version: 4.3.3_20080910
+Version: 4.3.3_20080915
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2)
@@ -160,7 +160,7 @@
Patch2: gcc-sles-version.patch
Patch3: gcc-noalias-warn.diff
Patch5: boehm-gc-strict-aliasing.patch
-Patch6: suse-record-gcc-opts.diff
+Patch6: suse-record-gcc-opts.diff
Patch7: acats-timeout.patch
Patch10: program-transform-name.diff
Patch11: program-transform-name-tools.diff
@@ -177,6 +177,8 @@
Patch41: fpreserve-function-arguments43.patch
Patch42: pr27975.diff
Patch43: build-id.diff
+Patch44: pr35620.diff
+Patch45: nvl423594.patch
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch55: gcc41-java-slow_pthread_self.patch
@@ -215,6 +217,20 @@
Patch103: ibm304134-power7-1
Patch104: ibm-cell-split
Patch105: ibm-cell-split-fixes
+Patch106: nvl425806.patch
+Patch107: nvl425803.patch
+Patch108: nvl425800.patch
+Patch109: nvl425783.patch
+Patch110: nvl425784.patch
+Patch111: nvl425788.patch
+Patch112: nvl425789.patch
+Patch113: nvl425790.patch
+Patch114: nvl425791.patch
+Patch115: nvl425794.patch
+Patch116: nvl425798-1.patch
+Patch117: nvl425798-2.patch
+Patch118: nvl425799.patch
+Patch119: nvl426087.patch
# LIBJAVA-DELETE-BEGIN
%description
@@ -871,6 +887,8 @@
%patch41
%patch42
%patch43
+%patch44
+%patch45
%patch51
%patch55
%patch57
@@ -904,6 +922,20 @@
%patch103
%patch104 -p1
%patch105 -p1
+%patch106
+%patch107
+%patch108
+%patch109
+%patch110
+%patch111
+%patch112
+%patch113
+%patch114
+%patch115
+%patch116
+%patch117
+%patch118
+%patch119
%build
# Avoid rebuilding of generated files
@@ -1108,7 +1140,7 @@
# Only run profiled bootstrap on archs where it works
#%ifarch %ix86 x86_64 ppc ppc64 ia64
%ifarch %ix86 x86_64 ppc ppc64 ia64 s390 s390x
-make profiledbootstrap BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
+make profiledbootstrap-lean BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
%else
make bootstrap-lean BOOT_CFLAGS="$RPM_OPT_FLAGS" $PARALLEL
%endif
@@ -1360,6 +1392,7 @@
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
rm -f $RPM_BUILD_ROOT%{_prefix}/bin/gccbug%{binsuffix}
+%if !0%{?building_libjava:1}
# delete compile flag tracking from crt files
crt_list=$RPM_BUILD_ROOT%{versmainlibdir}/crt*.o
%if %{biarch}
@@ -1372,6 +1405,7 @@
for o in $crt_list $crt32_list $crt64_list; do
objcopy -R ".comment.SuSE.OPTs" $o
done
+%endif
%if %{build_libjava}
# gcj -static doesn't work properly anyway, unless using --whole-archive
@@ -1396,7 +1430,6 @@
rm -f $RPM_BUILD_ROOT%{mainlibdirbi}/libffi.la
%endif
-
# security files have broken install locations, also they cause conflicts
# between libgcj versions. Simply delete them here, libgcj will use its
# defaults in this case (which is what these files contain anyway).
++++++ nvl423594.patch ++++++
--- /space/rguenther/src/svn/gcc-4_3-branch/gcc/tree-gimple.h 2008-02-19 10:55:59.000000000 +0100
+++ gcc/tree-gimple.h 2008-09-15 12:10:46.000000000 +0200
@@ -119,6 +119,7 @@
extern void push_gimplify_context (void);
extern void pop_gimplify_context (tree);
extern void gimplify_and_add (tree, tree *);
+extern void force_gimplify_and_add (tree, tree *);
/* Miscellaneous helpers. */
extern void gimple_add_tmp_var (tree);
--- /space/rguenther/src/svn/gcc-4_3-branch/gcc/gimplify.c 2008-09-04 16:09:13.000000000 +0200
+++ gcc/gimplify.c 2008-09-15 12:58:13.000000000 +0200
@@ -6695,4 +6749,20 @@
return expr;
}
+void
+force_gimplify_and_add (tree stmt, tree *list)
+{
+ tree t;
+ push_gimplify_context ();
+ gimplify_ctxp->into_ssa = gimple_in_ssa_p (cfun);
+ gimplify_ctxp->allow_rhs_cond_expr = true;
+ gimplify_and_add (stmt, list);
+ if (gimple_referenced_vars (cfun))
+ {
+ for (t = gimplify_ctxp->temps; t ; t = TREE_CHAIN (t))
+ add_referenced_var (t);
+ }
+ pop_gimplify_context (NULL);
+}
+
#include "gt-gimplify.h"
--- /space/rguenther/src/svn/gcc-4_3-branch/gcc/tree-sra.c 2008-02-19 10:56:00.000000000 +0100
+++ gcc/tree-sra.c 2008-09-15 12:10:55.000000000 +0200
@@ -2186,7 +2186,7 @@
stmt = build_gimple_modify_stmt (stmp,
fold_build1 (VIEW_CONVERT_EXPR,
stype, var));
- append_to_statement_list (stmt, &list);
+ force_gimplify_and_add (stmt, &list);
var = stmp;
}
--- /dev/null 2008-06-06 22:36:48.000000000 +0200
+++ gcc/testsuite/gcc.c-torture/compile/nvl423594.c 2008-09-15 13:05:25.000000000 +0200
@@ -0,0 +1,16 @@
+void Deactivate(void);
+typedef struct {
+ char ctype;
+ char action;
+ short options;
+} pwdStatus_t;
+void getCredentials(char *buffer)
+{
+ pwdStatus_t SessionSt;
+ int pst = 0;
+ __builtin_memset(&SessionSt,0,sizeof(SessionSt));
+ __builtin_memcpy(&pst,buffer,sizeof(pwdStatus_t));
+ __builtin_memcpy(&SessionSt, &pst, sizeof(pwdStatus_t));
+ Deactivate();
+}
+
++++++ nvl425783.patch ++++++
2008-02-22 Nathan Froyd
* config/rs6000/rs6000.c (rs6000_legitimize_address): Check to
ensure that we can address an entire entity > 8 bytes. Don't
generate reg+reg addressing for such data.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 140242)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -3630,19 +3630,29 @@ rs6000_legitimize_address (rtx x, rtx ol
/* We accept [reg + reg] and [reg + OFFSET]. */
if (GET_CODE (x) == PLUS)
- {
- rtx op1 = XEXP (x, 0);
- rtx op2 = XEXP (x, 1);
-
- op1 = force_reg (Pmode, op1);
-
- if (GET_CODE (op2) != REG
- && (GET_CODE (op2) != CONST_INT
- || !SPE_CONST_OFFSET_OK (INTVAL (op2))))
- op2 = force_reg (Pmode, op2);
-
- return gen_rtx_PLUS (Pmode, op1, op2);
- }
+ {
+ rtx op1 = XEXP (x, 0);
+ rtx op2 = XEXP (x, 1);
+ rtx y;
+
+ op1 = force_reg (Pmode, op1);
+
+ if (GET_CODE (op2) != REG
+ && (GET_CODE (op2) != CONST_INT
+ || !SPE_CONST_OFFSET_OK (INTVAL (op2))
+ || (GET_MODE_SIZE (mode) > 8
+ && !SPE_CONST_OFFSET_OK (INTVAL (op2) + 8))))
+ op2 = force_reg (Pmode, op2);
+
+ /* We can't always do [reg + reg] for these, because [reg +
+ reg + offset] is not a legitimate addressing mode. */
+ y = gen_rtx_PLUS (Pmode, op1, op2);
+
+ if (GET_MODE_SIZE (mode) > 8 && REG_P (op2))
+ return force_reg (Pmode, y);
+ else
+ return y;
+ }
return force_reg (Pmode, x);
}
++++++ nvl425784.patch ++++++
2008-02-23 David Edelsohn
* config/rs6000/rs6000.h (CONSTANT_ALIGNMENT): Use STRICT_ALIGNMENT
instead of TARGET_STRICT_ALIGN.
2008-02-22 Nathan Froyd
* config/rs6000/rs6000.h (CONSTANT_ALIGNMENT): Don't overalign
strings when optimizing for size, unless the target cares about
alignment.
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h (revision 140242)
+++ gcc/config/rs6000/rs6000.h (working copy)
@@ -596,6 +596,7 @@ extern enum rs6000_nop_insertion rs6000_
Make vector constants quadword aligned. */
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
(TREE_CODE (EXP) == STRING_CST \
+ && (STRICT_ALIGNMENT || !optimize_size) \
&& (ALIGN) < BITS_PER_WORD \
? BITS_PER_WORD \
: (ALIGN))
++++++ nvl425788.patch ++++++
2008-07-30 Nathan Froyd
PR target/35866
* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Add clause for
vector modes.
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc.orig/config/rs6000/rs6000.h 2008-09-10 16:22:31.000000000 -0300
+++ gcc/config/rs6000/rs6000.h 2008-09-10 16:55:58.000000000 -0300
@@ -619,12 +619,15 @@
/* Define this macro to be the value 1 if unaligned accesses have a cost
many times greater than aligned accesses, for example if they are
emulated in a trap handler. */
+/* Altivec vector memory instructions simply ignore the low bits; SPE
+ vector memory instructions trap on unaligned accesses. */
#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \
(STRICT_ALIGNMENT \
|| (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \
|| (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode \
|| (MODE) == DImode) \
- && (ALIGN) < 32))
+ && (ALIGN) < 32) \
+ || (VECTOR_MODE_P ((MODE)) && (ALIGN) < GET_MODE_BITSIZE ((MODE))))
/* Standard register usage. */
++++++ nvl425789.patch ++++++
2008-04-12 Andrew Pinski
* config/rs6000/rs6000.c (compute_save_world_info): Set lr_save_p if
we are going to "save the world".
Index: gcc/testsuite/gcc.target/powerpc/darwin-save-world-1.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc/testsuite/gcc.target/powerpc/darwin-save-world-1.c 2008-09-10 17:37:44.000000000 -0300
@@ -0,0 +1,18 @@
+/* { dg-do run { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec" } */
+
+/* With altivec turned on, Darwin wants to save the world but we did not mark lr as being saved any more
+ as saving the lr is not needed for saving altivec registers. */
+
+int main (void)
+{
+ __label__ l1;
+ void __attribute__((used)) q(void)
+ {
+ goto l1;
+ }
+
+ l1:;
+ return 0;
+}
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:37:37.000000000 -0300
+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:37:44.000000000 -0300
@@ -14212,6 +14212,9 @@
will attempt to save it. */
info_ptr->vrsave_size = 4;
+ /* If we are going to save the world, we need to save the link register too. */
+ info_ptr->lr_save_p = 1;
+
/* "Save" the VRsave register too if we're saving the world. */
if (info_ptr->vrsave_mask == 0)
info_ptr->vrsave_mask = compute_vrsave_mask ();
++++++ nvl425790.patch ++++++
backported from FSF trunk:
2008-04-03 Janis Johnson
gcc/
PR c/35712
* dfp.c (decimal_from_decnumber): Retain trailing zeroes for
decimal-float literal constant zero.
testsuite/
PR c/35712
* gcc.dg/dfp/constants-zero.c: New test.
Index: gcc/dfp.c
===================================================================
--- gcc/dfp.c (revision 140235)
+++ gcc/dfp.c (working copy)
@@ -50,8 +50,6 @@ decimal_from_decnumber (REAL_VALUE_TYPE
memset (r, 0, sizeof (REAL_VALUE_TYPE));
r->cl = rvc_normal;
- if (decNumberIsZero (dn))
- r->cl = rvc_zero;
if (decNumberIsNaN (dn))
r->cl = rvc_nan;
if (decNumberIsInfinite (dn))
Index: gcc/testsuite/gcc.dg/dfp/constants-zero.c
===================================================================
--- gcc/testsuite/gcc.dg/dfp/constants-zero.c (revision 0)
+++ gcc/testsuite/gcc.dg/dfp/constants-zero.c (revision 0)
@@ -0,0 +1,159 @@
+/* { dg-options "-std=gnu99 -O0" } */
+
+/* Decimal float values can have significant trailing zeroes. This is
+ true for zero values as well. Check that various representations of
+ zero are handled correctly when specified as literal constants. */
+
+extern void abort (void);
+
+int big_endian;
+
+typedef union U32 {
+ unsigned int i;
+ _Decimal32 d;
+ unsigned char b[4];
+} u32_t;
+
+typedef union U64 {
+ unsigned long long i;
+ _Decimal64 d;
+} u64_t;
+
+typedef union U128 {
+ unsigned long long i[2];
+ _Decimal128 d;
+} u128_t;
+
+int
+compare32 (_Decimal32 d, unsigned int i)
+{
+ u32_t u;
+
+ u.d = d;
+ return (u.i == i);
+}
+
+int
+compare64 (_Decimal64 d, unsigned long long i)
+{
+ u64_t u;
+
+ u.d = d;
+ return (u.i == i);
+}
+
+int
+compare128 (_Decimal64 d, unsigned long long i, unsigned long long j)
+{
+ u128_t u;
+
+ u.d = d;
+ if (big_endian)
+ return (u.i[0] == i && u.i[1] == j);
+ else
+ return (u.i[1] == i && u.i[0] == j);
+}
+
+void
+dpd_tests (void)
+{
+ if (! compare32 (0.DF, 0x22500000U))
+ abort ();
+ if (! compare32 (-0.DF, 0xa2500000U))
+ abort ();
+ if (! compare32 (0.E-4DF, 0x22100000U))
+ abort ();
+ if (! compare32 (0.E-7DF, 0x21e00000U))
+ abort ();
+ if (! compare32 (0.E+3DF, 0x22800000U))
+ abort ();
+
+ if (! compare64 (0.DD, 0x2238000000000000ULL))
+ abort ();
+ if (! compare64 (-0.DD, 0xa238000000000000ULL))
+ abort ();
+ if (! compare64 (0.E-6DD, 0x2220000000000000ULL))
+ abort ();
+ if (! compare64 (0.E-7DD, 0x221c000000000000ULL))
+ abort ();
+ if (! compare64 (0.E+2DD, 0x2240000000000000ULL))
+ abort ();
+
+ if (! compare128 (0.DL, 0x2208000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (-0.DL, 0xa208000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (0.E-3DL, 0x2207400000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (0.E-8DL, 0x2206000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (0.E+2DL, 0x2208800000000000ULL, 0x0000000000000000ULL))
+ abort ();
+}
+
+void
+bid_tests (void)
+{
+ if (! compare32 (0.DF, 0x32800000U))
+ abort ();
+ if (! compare32 (-0.DF, 0xb2800000U))
+ abort ();
+ if (! compare32 (0.E-4DF, 0x30800000U))
+ abort ();
+ if (! compare32 (0.E-7DF, 0x2f000000U))
+ abort ();
+ if (! compare32 (0.E+3DF, 0x34000000U))
+ abort ();
+
+ if (! compare64 (0.DD, 0x31c0000000000000ULL))
+ abort ();
+ if (! compare64 (-0.DD, 0xb1c0000000000000ULL))
+ abort ();
+ if (! compare64 (0.E-6DD, 0x3100000000000000ULL))
+ abort ();
+ if (! compare64 (0.E-7DD, 0x30e0000000000000ULL))
+ abort ();
+ if (! compare64 (0.E+2DD, 0x3200000000000000ULL))
+ abort ();
+
+ if (! compare128 (0.DL, 0x3040000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (-0.DL, 0xb040000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (0.E-3DL, 0x303a000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (0.E-8DL, 0x3030000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+ if (! compare128 (0.E+2DL, 0x3044000000000000ULL, 0x0000000000000000ULL))
+ abort ();
+}
+
+int
+main ()
+{
+ u32_t u32;
+
+ /* These sizes are probably always true for targets that support decimal
+ float types, but check anyway. Abort so we can fix the test. */
+ if ((sizeof (_Decimal64) != sizeof (long long))
+ || (sizeof (_Decimal128) != 2 * sizeof (long long))
+ || (sizeof (_Decimal32) != sizeof (_Decimal32)))
+ abort ();
+
+ u32.d = 1.DF;
+
+ if (u32.i == 0x22500001)
+ {
+ big_endian = (u32.b[0] == 0x22);
+ dpd_tests ();
+ }
+ else if (u32.i == 0x32800001)
+ {
+ big_endian = (u32.b[0] == 0x32);
+ bid_tests ();
+ }
+ else
+ abort (); /* unknown format; test problem */
+
+ return 0;
+}
++++++ nvl425791.patch ++++++
2008-03-07 Peter Bergner
PR target/35373
* config/rs6000/rs6000.c (rs6000_legitimize_address): Don't generate
reg+const addressing for Altivec modes. Don't generate reg+reg
addressing for TFmode or TDmode quantities.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 140242)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -3582,6 +3582,7 @@ rs6000_legitimize_address (rtx x, rtx ol
&& GET_CODE (XEXP (x, 1)) == CONST_INT
&& (unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1)) + 0x8000) >= 0x10000
&& !(SPE_VECTOR_MODE (mode)
+ || ALTIVEC_VECTOR_MODE (mode)
|| (TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode
|| mode == DImode))))
{
@@ -3599,11 +3600,12 @@ rs6000_legitimize_address (rtx x, rtx ol
&& GET_MODE_NUNITS (mode) == 1
&& ((TARGET_HARD_FLOAT && TARGET_FPRS)
|| TARGET_POWERPC64
- || (((mode != DImode && mode != DFmode && mode != DDmode)
- || TARGET_E500_DOUBLE)
- && mode != TFmode && mode != TDmode))
+ || ((mode != DImode && mode != DFmode && mode != DDmode)
+ || TARGET_E500_DOUBLE))
&& (TARGET_POWERPC64 || mode != DImode)
- && mode != TImode)
+ && mode != TImode
+ && mode != TFmode
+ && mode != TDmode)
{
return gen_rtx_PLUS (Pmode, XEXP (x, 0),
force_reg (Pmode, force_operand (XEXP (x, 1), 0)));
++++++ nvl425794.patch ++++++
2008-06-24 Andrew Pinski
* config/rs6000/rs6000.md: Change all string instruction's clobber to
be early clobbers.
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc.orig/config/rs6000/rs6000.md 2008-09-10 16:22:31.000000000 -0300
+++ gcc/config/rs6000/rs6000.md 2008-09-10 16:57:37.000000000 -0300
@@ -9668,7 +9668,7 @@
(mem:BLK (match_operand:SI 1 "gpc_reg_operand" "b")))
(use (match_operand:SI 2 "immediate_operand" "i"))
(use (match_operand:SI 3 "immediate_operand" "i"))
- (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
+ (clobber (match_operand:SI 4 "gpc_reg_operand" "=&r"))
(clobber (reg:SI 6))
(clobber (reg:SI 7))
(clobber (reg:SI 8))
@@ -9692,7 +9692,7 @@
(mem:BLK (match_operand:P 1 "gpc_reg_operand" "b")))
(use (match_operand:SI 2 "immediate_operand" "i"))
(use (match_operand:SI 3 "immediate_operand" "i"))
- (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
+ (clobber (match_operand:SI 4 "gpc_reg_operand" "=&r"))
(clobber (reg:SI 6))
(clobber (reg:SI 7))
(clobber (reg:SI 8))
@@ -9734,7 +9734,7 @@
(mem:BLK (match_operand:SI 1 "gpc_reg_operand" "b")))
(use (match_operand:SI 2 "immediate_operand" "i"))
(use (match_operand:SI 3 "immediate_operand" "i"))
- (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
+ (clobber (match_operand:SI 4 "gpc_reg_operand" "=&r"))
(clobber (reg:SI 6))
(clobber (reg:SI 7))
(clobber (reg:SI 8))
@@ -9755,7 +9755,7 @@
(mem:BLK (match_operand:P 1 "gpc_reg_operand" "b")))
(use (match_operand:SI 2 "immediate_operand" "i"))
(use (match_operand:SI 3 "immediate_operand" "i"))
- (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
+ (clobber (match_operand:SI 4 "gpc_reg_operand" "=&r"))
(clobber (reg:SI 6))
(clobber (reg:SI 7))
(clobber (reg:SI 8))
@@ -9792,7 +9792,7 @@
(mem:BLK (match_operand:SI 1 "gpc_reg_operand" "b")))
(use (match_operand:SI 2 "immediate_operand" "i"))
(use (match_operand:SI 3 "immediate_operand" "i"))
- (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
+ (clobber (match_operand:SI 4 "gpc_reg_operand" "=&r"))
(clobber (reg:SI 6))
(clobber (reg:SI 7))
(clobber (reg:SI 8))
@@ -9811,7 +9811,7 @@
(mem:BLK (match_operand:P 1 "gpc_reg_operand" "b")))
(use (match_operand:SI 2 "immediate_operand" "i"))
(use (match_operand:SI 3 "immediate_operand" "i"))
- (clobber (match_operand:SI 4 "gpc_reg_operand" "=r"))
+ (clobber (match_operand:SI 4 "gpc_reg_operand" "=&r"))
(clobber (reg:SI 6))
(clobber (reg:SI 7))
(clobber (reg:SI 8))
++++++ nvl425798-1.patch ++++++
2008-04-30 Alan Modra
* config/rs6000/rs6000.c (ALWAYS_RESTORE_ALTIVEC_BEFORE_POP): Define.
(rs6000_emit_epilogue): Use backchain to restore only when we
have a large frame. Make use of frame pointer to restore if we
have one. Handle ALWAYS_RESTORE_ALTIVEC_BEFORE_POP.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:29:26.000000000 -0300
+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:35:02.000000000 -0300
@@ -1,6 +1,6 @@
/* Subroutines used for code generation on IBM RS/6000.
Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
@@ -16246,6 +16246,10 @@
rs6000_pic_labelno++;
}
+/* Non-zero if vmx regs are restored before the frame pop, zero if
+ we restore after the pop when possible. */
+#define ALWAYS_RESTORE_ALTIVEC_BEFORE_POP 0
+
/* Emit function epilogue as insns.
At present, dwarf2out_frame_debug_expr doesn't understand
@@ -16285,9 +16289,14 @@
|| current_function_calls_eh_return
|| info->first_fp_reg_save == 64
|| FP_SAVE_INLINE (info->first_fp_reg_save));
- use_backchain_to_restore_sp = (frame_pointer_needed
- || current_function_calls_alloca
- || info->total_size > 32767);
+ /* Restore via the backchain when we have a large frame, since this
+ is more efficient than an addis, addi pair. The second condition
+ here will not trigger at the moment; We don't actually need a
+ frame pointer for alloca, but the generic parts of the compiler
+ give us one anyway. */
+ use_backchain_to_restore_sp = (info->total_size > 32767
+ || (cfun->calls_alloca
+ && !frame_pointer_needed));
using_mtcr_multiple = (rs6000_cpu == PROCESSOR_PPC601
|| rs6000_cpu == PROCESSOR_PPC603
|| rs6000_cpu == PROCESSOR_PPC750
@@ -16392,8 +16401,9 @@
stack. */
if (TARGET_ALTIVEC_ABI
&& info->altivec_size != 0
- && DEFAULT_ABI != ABI_V4
- && info->altivec_save_offset < (TARGET_32BIT ? -220 : -288))
+ && (ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ || (DEFAULT_ABI != ABI_V4
+ && info->altivec_save_offset < (TARGET_32BIT ? -220 : -288))))
{
int i;
@@ -16404,6 +16414,8 @@
gen_rtx_MEM (Pmode, sp_reg_rtx));
sp_offset = 0;
}
+ else if (frame_pointer_needed)
+ frame_reg_rtx = hard_frame_pointer_rtx;
for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i)
if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
@@ -16428,18 +16440,23 @@
if (TARGET_ALTIVEC
&& TARGET_ALTIVEC_VRSAVE
&& info->vrsave_mask != 0
- && DEFAULT_ABI != ABI_V4
- && info->vrsave_save_offset < (TARGET_32BIT ? -220 : -288))
+ && (ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ || (DEFAULT_ABI != ABI_V4
+ && info->vrsave_save_offset < (TARGET_32BIT ? -220 : -288))))
{
rtx addr, mem, reg;
- if (use_backchain_to_restore_sp
- && frame_reg_rtx == sp_reg_rtx)
+ if (frame_reg_rtx == sp_reg_rtx)
{
- frame_reg_rtx = gen_rtx_REG (Pmode, 11);
- emit_move_insn (frame_reg_rtx,
- gen_rtx_MEM (Pmode, sp_reg_rtx));
- sp_offset = 0;
+ if (use_backchain_to_restore_sp)
+ {
+ frame_reg_rtx = gen_rtx_REG (Pmode, 11);
+ emit_move_insn (frame_reg_rtx,
+ gen_rtx_MEM (Pmode, sp_reg_rtx));
+ sp_offset = 0;
+ }
+ else if (frame_pointer_needed)
+ frame_reg_rtx = hard_frame_pointer_rtx;
}
addr = gen_rtx_PLUS (Pmode, frame_reg_rtx,
@@ -16451,17 +16468,11 @@
emit_insn (generate_set_vrsave (reg, info, 1));
}
- /* If we have a frame pointer, a call to alloca, or a large stack
- frame, restore the old stack pointer using the backchain. Otherwise,
- we know what size to update it with. */
+ /* If we have a large stack frame, restore the old stack pointer
+ using the backchain. */
if (use_backchain_to_restore_sp)
{
- if (frame_reg_rtx != sp_reg_rtx)
- {
- emit_move_insn (sp_reg_rtx, frame_reg_rtx);
- frame_reg_rtx = sp_reg_rtx;
- }
- else
+ if (frame_reg_rtx == sp_reg_rtx)
{
/* Under V.4, don't reset the stack pointer until after we're done
loading the saved registers. */
@@ -16472,6 +16483,30 @@
gen_rtx_MEM (Pmode, sp_reg_rtx));
sp_offset = 0;
}
+ else if (ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ && DEFAULT_ABI == ABI_V4)
+ /* frame_reg_rtx has been set up by the altivec restore. */
+ ;
+ else
+ {
+ emit_move_insn (sp_reg_rtx, frame_reg_rtx);
+ frame_reg_rtx = sp_reg_rtx;
+ }
+ }
+ /* If we have a frame pointer, we can restore the old stack pointer
+ from it. */
+ else if (frame_pointer_needed)
+ {
+ frame_reg_rtx = sp_reg_rtx;
+ if (DEFAULT_ABI == ABI_V4)
+ frame_reg_rtx = gen_rtx_REG (Pmode, 11);
+
+ emit_insn (TARGET_32BIT
+ ? gen_addsi3 (frame_reg_rtx, hard_frame_pointer_rtx,
+ GEN_INT (info->total_size))
+ : gen_adddi3 (frame_reg_rtx, hard_frame_pointer_rtx,
+ GEN_INT (info->total_size)));
+ sp_offset = 0;
}
else if (info->push_p
&& DEFAULT_ABI != ABI_V4
@@ -16486,7 +16521,8 @@
}
/* Restore AltiVec registers if we have not done so already. */
- if (TARGET_ALTIVEC_ABI
+ if (!ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ && TARGET_ALTIVEC_ABI
&& info->altivec_size != 0
&& (DEFAULT_ABI == ABI_V4
|| info->altivec_save_offset >= (TARGET_32BIT ? -220 : -288)))
@@ -16513,7 +16549,8 @@
}
/* Restore VRSAVE if we have not done so already. */
- if (TARGET_ALTIVEC
+ if (!ALWAYS_RESTORE_ALTIVEC_BEFORE_POP
+ && TARGET_ALTIVEC
&& TARGET_ALTIVEC_VRSAVE
&& info->vrsave_mask != 0
&& (DEFAULT_ABI == ABI_V4
++++++ nvl425798-2.patch ++++++
2008-06-24 Andrew Pinski
* config/rs6000/rs6000.c (rs6000_emit_epilogue): Set
use_backchain_to_restore_sp to true
if the offset of the link register save area would go over the 32k - 1
offset limit of the load
instructions.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:35:02.000000000 -0300
+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:35:43.000000000 -0300
@@ -16295,6 +16295,9 @@
frame pointer for alloca, but the generic parts of the compiler
give us one anyway. */
use_backchain_to_restore_sp = (info->total_size > 32767
+ || info->total_size
+ + (info->lr_save_p ? info->lr_save_offset : 0)
+ > 32767
|| (cfun->calls_alloca
&& !frame_pointer_needed));
using_mtcr_multiple = (rs6000_cpu == PROCESSOR_PPC601
++++++ nvl425799.patch ++++++
2008-06-06 Nathan Froyd
* config/rs6000/rs6000.c (rs6000_mode_dependent_address): Remove
PRE_INC and PRE_DEC cases.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:07:35.000000000 -0300
+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:07:50.000000000 -0300
@@ -4245,8 +4245,7 @@
case LO_SUM:
return true;
- case PRE_INC:
- case PRE_DEC:
+ /* Auto-increment cases are now treated generically in recog.c. */
case PRE_MODIFY:
return TARGET_UPDATE;
++++++ nvl425800.patch ++++++
Backport from FSF mainline:
2008-07-30 Alan Modra
PR target/36955
* config/rs6000/rs6000.c (rs6000_legitimize_tls_address): Add
a use of pic_offset_table_rtx for -msecure-plt __tls_get_addr calls.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 140235)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -3842,6 +3842,8 @@ rs6000_legitimize_tls_address (rtx addr,
insn = emit_call_insn (insn);
CONST_OR_PURE_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r3);
+ if (DEFAULT_ABI == ABI_V4 && TARGET_SECURE_PLT && flag_pic)
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
insn = get_insns ();
end_sequence ();
emit_libcall_block (insn, dest, r3, addr);
@@ -3860,6 +3862,8 @@ rs6000_legitimize_tls_address (rtx addr,
insn = emit_call_insn (insn);
CONST_OR_PURE_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r3);
+ if (DEFAULT_ABI == ABI_V4 && TARGET_SECURE_PLT && flag_pic)
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), pic_offset_table_rtx);
insn = get_insns ();
end_sequence ();
tmp1 = gen_reg_rtx (Pmode);
++++++ nvl425803.patch ++++++
Backport from FSF trunk:
2008-04-03 Janis Johnson
PR target/35713
* config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Use integer
constants of the appropriate size for runtime calculations.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 140235)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -6786,7 +6786,8 @@ rs6000_gimplify_va_arg (tree valist, tre
else if (reg == fpr && TYPE_MODE (type) == TDmode)
{
regalign = 1;
- t = build2 (BIT_IOR_EXPR, TREE_TYPE (reg), reg, size_int (1));
+ t = build2 (BIT_IOR_EXPR, TREE_TYPE (reg), reg,
+ build_int_cst (TREE_TYPE (reg), 1));
u = build2 (MODIFY_EXPR, void_type_node, reg, t);
}
@@ -6826,7 +6827,8 @@ rs6000_gimplify_va_arg (tree valist, tre
{
/* Ensure that we don't find any more args in regs.
Alignment has taken care of for special cases. */
- t = build2 (GIMPLE_MODIFY_STMT, TREE_TYPE (reg), reg, size_int (8));
+ t = build_gimple_modify_stmt (reg,
+ build_int_cst (TREE_TYPE (reg), 8));
gimplify_and_add (t, pre_p);
}
}
++++++ nvl425806.patch ++++++
2008-04-22 Pat Haugen
* config/rs6000/rs6000.c (rs6000_register_move_cost): Increase cost
of LR/CTR moves for Power6.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:37:30.000000000 -0300
+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:37:37.000000000 -0300
@@ -21387,6 +21387,12 @@
else if (from == CR_REGS)
return 4;
+ /* Power6 has slower LR/CTR moves so make them more expensive than
+ memory in order to bias spills to memory .*/
+ else if (rs6000_cpu == PROCESSOR_POWER6
+ && reg_classes_intersect_p (from, LINK_OR_CTR_REGS))
+ return 6 * hard_regno_nregs[0][mode];
+
else
/* A move will cost one instruction per GPR moved. */
return 2 * hard_regno_nregs[0][mode];
++++++ nvl426087.patch ++++++
2008-09-11 Janis Johnson
* ginclude/float.h (DEC_EVAL_METHOD): Correct the macro name.
2008-09-11 Janis Johnson
* gcc.dg/dfp/dec-eval-method-2.c: New test.
Index: gcc/ginclude/float.h
===================================================================
--- gcc/ginclude/float.h (revision 140300)
+++ gcc/ginclude/float.h (revision 140301)
@@ -233,8 +233,8 @@
2 evaluate all operations and constants to the range and
precision of the _Decimal128 type. */
-#undef DECFLT_EVAL_METHOD
-#define DECFLT_EVAL_METHOD __DECFLT_EVAL_METHOD__
+#undef DEC_EVAL_METHOD
+#define DEC_EVAL_METHOD __DEC_EVAL_METHOD__
#endif /* __STDC_WANT_DEC_FP__ */
Index: gcc/testsuite/gcc.dg/dfp/dec-eval-method-2.c
===================================================================
--- gcc/testsuite/gcc.dg/dfp/dec-eval-method-2.c (revision 0)
+++ gcc/testsuite/gcc.dg/dfp/dec-eval-method-2.c (revision 140301)
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-std=gnu99 -D__STDC_WANT_DEC_FP__" } */
+
+/* N1107 4: Characteristics of decimal floating types .
+ C99 5.2.4.2.2a[2] (New).
+
+ Verify that DEC_EVAL_METHOD is defined by float.h.
+ DEC_EVAL_METHOD in . */
+
+#ifdef DEC_EVAL_METHOD
+#error DEC_EVAL_METHOD is defined before float.h is included
+#endif
+
+#include
+
+#ifndef DEC_EVAL_METHOD
+#error DEC_EVAL_METHOD is not defined after float.h is included
+#endif
+
+int i;
++++++ pr35620.diff ++++++
Backport from FSF mainline:
2008-04-08 Janis Johnson
gcc/
PR target/35620
* config/rs6000/rs6000.c (rs6000_check_sdmode): Handle additional
kinds of indirect references.
gcc/testsuite/
PR target/35620
* gcc.dg/dfp/pr35620.c: New test.
* gcc.dg/dfp/func-pointer.c: New test.
* gcc.dg/dfp/func-deref.c: New test.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 140235)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -11188,6 +11188,10 @@ rs6000_check_sdmode (tree *tp, int *walk
case FIELD_DECL:
case RESULT_DECL:
case REAL_CST:
+ case INDIRECT_REF:
+ case ALIGN_INDIRECT_REF:
+ case MISALIGNED_INDIRECT_REF:
+ case VIEW_CONVERT_EXPR:
if (TYPE_MODE (TREE_TYPE (*tp)) == SDmode)
return *tp;
break;
Index: gcc/testsuite/gcc.dg/dfp/pr35620.c
===================================================================
--- gcc/testsuite/gcc.dg/dfp/pr35620.c (revision 0)
+++ gcc/testsuite/gcc.dg/dfp/pr35620.c (revision 0)
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-std=gnu99 -O2" } */
+
+extern void foo (_Decimal32);
+_Decimal32 *p;
+
+extern int i;
+union { _Decimal32 a; int b; } u;
+
+void
+blatz (void)
+{
+ _Decimal32 d;
+ u.b = i;
+ d = u.a;
+ foo (d);
+}
+
+void
+bar (void)
+{
+ foo (*p);
+}
Index: gcc/testsuite/gcc.dg/dfp/func-pointer.c
===================================================================
--- gcc/testsuite/gcc.dg/dfp/func-pointer.c (revision 0)
+++ gcc/testsuite/gcc.dg/dfp/func-pointer.c (revision 0)
@@ -0,0 +1,220 @@
+/* { dg-options "-std=gnu99" } */
+
+/* C99 6.5.2.2 Function calls.
+ Test pointer argument passing and return values involving decimal floating
+ point types. */
+
+extern void abort (void);
+static int failcnt;
+
+/* Support compiling the test to report individual failures; default is
+ to abort as soon as a check fails. */
+#ifdef DBG
+#include
+#define FAILURE { printf ("failed at line %d\n", __LINE__); failcnt++; }
+#else
+#define FAILURE abort ();
+#endif
+
+/* A handful of functions that return their Nth pointer to Decimal32
+ argument. */
+
+_Decimal32 *
+arg0_32 (_Decimal32 *arg0, _Decimal32 *arg1, _Decimal32 *arg2,
+ _Decimal32 *arg3, _Decimal32 *arg4, _Decimal32 *arg5)
+{
+ return arg0;
+}
+
+_Decimal32 *
+arg1_32 (_Decimal32 *arg0, _Decimal32 *arg1, _Decimal32 *arg2,
+ _Decimal32 *arg3, _Decimal32 *arg4, _Decimal32 *arg5)
+{
+ return arg1;
+}
+
+_Decimal32 *
+arg2_32 (_Decimal32 *arg0, _Decimal32 *arg1, _Decimal32 *arg2,
+ _Decimal32 *arg3, _Decimal32 *arg4, _Decimal32 *arg5)
+{
+ return arg2;
+}
+
+_Decimal32 *
+arg3_32 (_Decimal32 *arg0, _Decimal32 *arg1, _Decimal32 *arg2,
+ _Decimal32 *arg3, _Decimal32 *arg4, _Decimal32 *arg5)
+{
+ return arg3;
+}
+
+_Decimal32 *
+arg4_32 (_Decimal32 *arg0, _Decimal32 *arg1, _Decimal32 *arg2,
+ _Decimal32 *arg3, _Decimal32 *arg4, _Decimal32 *arg5)
+{
+ return arg4;
+}
+
+_Decimal32 *
+arg5_32 (_Decimal32 *arg0, _Decimal32 *arg1, _Decimal32 *arg2,
+ _Decimal32 *arg3, _Decimal32 *arg4, _Decimal32 *arg5)
+{
+ return arg5;
+}
+
+
+/* A handful of functions that return their Nth pointer to _Decimal64
+ argument. */
+
+_Decimal64 *
+arg0_64 (_Decimal64 *arg0, _Decimal64 *arg1, _Decimal64 *arg2,
+ _Decimal64 *arg3, _Decimal64 *arg4, _Decimal64 *arg5)
+{
+ return arg0;
+}
+
+_Decimal64 *
+arg1_64 (_Decimal64 *arg0, _Decimal64 *arg1, _Decimal64 *arg2,
+ _Decimal64 *arg3, _Decimal64 *arg4, _Decimal64 *arg5)
+{
+ return arg1;
+}
+
+_Decimal64 *
+arg2_64 (_Decimal64 *arg0, _Decimal64 *arg1, _Decimal64 *arg2,
+ _Decimal64 *arg3, _Decimal64 *arg4, _Decimal64 *arg5)
+{
+ return arg2;
+}
+
+_Decimal64 *
+arg3_64 (_Decimal64 *arg0, _Decimal64 *arg1, _Decimal64 *arg2,
+ _Decimal64 *arg3, _Decimal64 *arg4, _Decimal64 *arg5)
+{
+ return arg3;
+}
+
+_Decimal64 *
+arg4_64 (_Decimal64 *arg0, _Decimal64 *arg1, _Decimal64 *arg2,
+ _Decimal64 *arg3, _Decimal64 *arg4, _Decimal64 *arg5)
+{
+ return arg4;
+}
+
+_Decimal64 *
+arg5_64 (_Decimal64 *arg0, _Decimal64 *arg1, _Decimal64 *arg2,
+ _Decimal64 *arg3, _Decimal64 *arg4, _Decimal64 *arg5)
+{
+ return arg5;
+}
+
+
+/* A handful of functions that return their Nth _Decimal128
+ argument. */
+
+_Decimal128 *
+arg0_128 (_Decimal128 *arg0, _Decimal128 *arg1, _Decimal128 *arg2,
+ _Decimal128 *arg3, _Decimal128 *arg4, _Decimal128 *arg5)
+{
+ return arg0;
+}
+
+_Decimal128 *
+arg1_128 (_Decimal128 *arg0, _Decimal128 *arg1, _Decimal128 *arg2,
+ _Decimal128 *arg3, _Decimal128 *arg4, _Decimal128 *arg5)
+{
+ return arg1;
+}
+
+_Decimal128 *
+arg2_128 (_Decimal128 *arg0, _Decimal128 *arg1, _Decimal128 *arg2,
+ _Decimal128 *arg3, _Decimal128 *arg4, _Decimal128 *arg5)
+{
+ return arg2;
+}
+
+_Decimal128 *
+arg3_128 (_Decimal128 *arg0, _Decimal128 *arg1, _Decimal128 *arg2,
+ _Decimal128 *arg3, _Decimal128 *arg4, _Decimal128 *arg5)
+{
+ return arg3;
+}
+
+_Decimal128 *
+arg4_128 (_Decimal128 *arg0, _Decimal128 *arg1, _Decimal128 *arg2,
+ _Decimal128 *arg3, _Decimal128 *arg4, _Decimal128 *arg5)
+{
+ return arg4;
+}
+
+_Decimal128 *
+arg5_128 (_Decimal128 *arg0, _Decimal128 *arg1, _Decimal128 *arg2,
+ _Decimal128 *arg3, _Decimal128 *arg4, _Decimal128 *arg5)
+{
+ return arg5;
+}
+
+
+
+_Decimal32 df0 = 0.0df, df1 = 1.0df, df2 = 2.0df,
+ df3 = 3.0df, df4 = 4.0df, df5 = 5.0df;
+_Decimal32 *pdf0 = &df0, *pdf1 = &df1, *pdf2 = &df2,
+ *pdf3 = &df3, *pdf4 = &df4, *pdf5 = &df5;
+_Decimal64 dd0 = 0.0dd, dd1 = 1.0dd, dd2 = 2.0dd,
+ dd3 = 3.0dd, dd4 = 4.0dd, dd5 = 5.0dd;
+_Decimal64 *pdd0 = &dd0, *pdd1 = &dd1, *pdd2 = &dd2,
+ *pdd3 = &dd3, *pdd4 = &dd4, *pdd5 = &dd5;
+_Decimal128 dl0 = 0.0dl, dl1 = 1.0dl, dl2 = 2.0dl,
+ dl3 = 3.0dl, dl4 = 4.0dl, dl5 = 5.0dl;
+_Decimal128 *pdl0 = &dl0, *pdl1 = &dl1, *pdl2 = &dl2,
+ *pdl3 = &dl3, *pdl4 = &dl4, *pdl5 = &dl5;
+
+int
+main ()
+{
+ /* _Decimal32 variants. */
+ if (*arg0_32 (pdf0, pdf1, pdf2, pdf3, pdf4, pdf5) != 0.0df)
+ FAILURE
+ if (*arg1_32 (pdf0, pdf1, pdf2, pdf3, pdf4, pdf5) != 1.0df)
+ FAILURE
+ if (*arg2_32 (pdf0, pdf1, pdf2, pdf3, pdf4, pdf5) != 2.0df)
+ FAILURE
+ if (*arg3_32 (pdf0, pdf1, pdf2, pdf3, pdf4, pdf5) != 3.0df)
+ FAILURE
+ if (*arg4_32 (pdf0, pdf1, pdf2, pdf3, pdf4, pdf5) != 4.0df)
+ FAILURE
+ if (*arg5_32 (pdf0, pdf1, pdf2, pdf3, pdf4, pdf5) != 5.0df)
+ FAILURE
+
+ /* _Decimal64 variants. */
+ if (*arg0_64 (pdd0, pdd1, pdd2, pdd3, pdd4, pdd5) != 0.0dd)
+ FAILURE
+ if (*arg1_64 (pdd0, pdd1, pdd2, pdd3, pdd4, pdd5) != 1.0dd)
+ FAILURE
+ if (*arg2_64 (pdd0, pdd1, pdd2, pdd3, pdd4, pdd5) != 2.0dd)
+ FAILURE
+ if (*arg3_64 (pdd0, pdd1, pdd2, pdd3, pdd4, pdd5) != 3.0dd)
+ FAILURE
+ if (*arg4_64 (pdd0, pdd1, pdd2, pdd3, pdd4, pdd5) != 4.0dd)
+ FAILURE
+ if (*arg5_64 (pdd0, pdd1, pdd2, pdd3, pdd4, pdd5) != 5.0dd)
+ FAILURE
+
+ /* _Decimal128 variants. */
+ if (*arg0_128 (pdl0, pdl1, pdl2, pdl3, pdl4, pdl5) != 0.0dl)
+ FAILURE
+ if (*arg1_128 (pdl0, pdl1, pdl2, pdl3, pdl4, pdl5) != 1.0dl)
+ FAILURE
+ if (*arg2_128 (pdl0, pdl1, pdl2, pdl3, pdl4, pdl5) != 2.0dl)
+ FAILURE
+ if (*arg3_128 (pdl0, pdl1, pdl2, pdl3, pdl4, pdl5) != 3.0dl)
+ FAILURE
+ if (*arg4_128 (pdl0, pdl1, pdl2, pdl3, pdl4, pdl5) != 4.0dl)
+ FAILURE
+ if (*arg5_128 (pdl0, pdl1, pdl2, pdl3, pdl4, pdl5) != 5.0dl)
+ FAILURE
+
+ if (failcnt != 0)
+ abort ();
+
+ return 0;
+}
Index: gcc/testsuite/gcc.dg/dfp/func-deref.c
===================================================================
--- gcc/testsuite/gcc.dg/dfp/func-deref.c (revision 0)
+++ gcc/testsuite/gcc.dg/dfp/func-deref.c (revision 0)
@@ -0,0 +1,220 @@
+/* { dg-options "-std=gnu99" } */
+
+/* C99 6.5.2.2 Function calls.
+ Test scalar passing and return values involving decimal floating
+ point types and dereferenced pointers. */
+
+extern void abort (void);
+static int failcnt;
+
+/* Support compiling the test to report individual failures; default is
+ to abort as soon as a check fails. */
+#ifdef DBG
+#include
+#define FAILURE { printf ("failed at line %d\n", __LINE__); failcnt++; }
+#else
+#define FAILURE abort ();
+#endif
+
+/* A handful of functions that return their Nth _Decimal32
+ argument. */
+
+_Decimal32 __attribute__((noinline))
+arg0_32 (_Decimal32 arg0, _Decimal32 arg1, _Decimal32 arg2,
+ _Decimal32 arg3, _Decimal32 arg4, _Decimal32 arg5)
+{
+ return arg0;
+}
+
+_Decimal32 __attribute__((noinline))
+arg1_32 (_Decimal32 arg0, _Decimal32 arg1, _Decimal32 arg2,
+ _Decimal32 arg3, _Decimal32 arg4, _Decimal32 arg5)
+{
+ return arg1;
+}
+
+_Decimal32 __attribute__((noinline))
+arg2_32 (_Decimal32 arg0, _Decimal32 arg1, _Decimal32 arg2,
+ _Decimal32 arg3, _Decimal32 arg4, _Decimal32 arg5)
+{
+ return arg2;
+}
+
+_Decimal32 __attribute__((noinline))
+arg3_32 (_Decimal32 arg0, _Decimal32 arg1, _Decimal32 arg2,
+ _Decimal32 arg3, _Decimal32 arg4, _Decimal32 arg5)
+{
+ return arg3;
+}
+
+_Decimal32 __attribute__((noinline))
+arg4_32 (_Decimal32 arg0, _Decimal32 arg1, _Decimal32 arg2,
+ _Decimal32 arg3, _Decimal32 arg4, _Decimal32 arg5)
+{
+ return arg4;
+}
+
+_Decimal32 __attribute__((noinline))
+arg5_32 (_Decimal32 arg0, _Decimal32 arg1, _Decimal32 arg2,
+ _Decimal32 arg3, _Decimal32 arg4, _Decimal32 arg5)
+{
+ return arg5;
+}
+
+
+/* A handful of functions that return their Nth _Decimal64
+ argument. */
+
+_Decimal64 __attribute__((noinline))
+arg0_64 (_Decimal64 arg0, _Decimal64 arg1, _Decimal64 arg2,
+ _Decimal64 arg3, _Decimal64 arg4, _Decimal64 arg5)
+{
+ return arg0;
+}
+
+_Decimal64 __attribute__((noinline))
+arg1_64 (_Decimal64 arg0, _Decimal64 arg1, _Decimal64 arg2,
+ _Decimal64 arg3, _Decimal64 arg4, _Decimal64 arg5)
+{
+ return arg1;
+}
+
+_Decimal64 __attribute__((noinline))
+arg2_64 (_Decimal64 arg0, _Decimal64 arg1, _Decimal64 arg2,
+ _Decimal64 arg3, _Decimal64 arg4, _Decimal64 arg5)
+{
+ return arg2;
+}
+
+_Decimal64 __attribute__((noinline))
+arg3_64 (_Decimal64 arg0, _Decimal64 arg1, _Decimal64 arg2,
+ _Decimal64 arg3, _Decimal64 arg4, _Decimal64 arg5)
+{
+ return arg3;
+}
+
+_Decimal64 __attribute__((noinline))
+arg4_64 (_Decimal64 arg0, _Decimal64 arg1, _Decimal64 arg2,
+ _Decimal64 arg3, _Decimal64 arg4, _Decimal64 arg5)
+{
+ return arg4;
+}
+
+_Decimal64 __attribute__((noinline))
+arg5_64 (_Decimal64 arg0, _Decimal64 arg1, _Decimal64 arg2,
+ _Decimal64 arg3, _Decimal64 arg4, _Decimal64 arg5)
+{
+ return arg5;
+}
+
+
+/* A handful of functions that return their Nth _Decimal128
+ argument. */
+
+_Decimal128 __attribute__((noinline))
+arg0_128 (_Decimal128 arg0, _Decimal128 arg1, _Decimal128 arg2,
+ _Decimal128 arg3, _Decimal128 arg4, _Decimal128 arg5)
+{
+ return arg0;
+}
+
+_Decimal128 __attribute__((noinline))
+arg1_128 (_Decimal128 arg0, _Decimal128 arg1, _Decimal128 arg2,
+ _Decimal128 arg3, _Decimal128 arg4, _Decimal128 arg5)
+{
+ return arg1;
+}
+
+_Decimal128 __attribute__((noinline))
+arg2_128 (_Decimal128 arg0, _Decimal128 arg1, _Decimal128 arg2,
+ _Decimal128 arg3, _Decimal128 arg4, _Decimal128 arg5)
+{
+ return arg2;
+}
+
+_Decimal128 __attribute__((noinline))
+arg3_128 (_Decimal128 arg0, _Decimal128 arg1, _Decimal128 arg2,
+ _Decimal128 arg3, _Decimal128 arg4, _Decimal128 arg5)
+{
+ return arg3;
+}
+
+_Decimal128 __attribute__((noinline))
+arg4_128 (_Decimal128 arg0, _Decimal128 arg1, _Decimal128 arg2,
+ _Decimal128 arg3, _Decimal128 arg4, _Decimal128 arg5)
+{
+ return arg4;
+}
+
+_Decimal128 __attribute__((noinline))
+arg5_128 (_Decimal128 arg0, _Decimal128 arg1, _Decimal128 arg2,
+ _Decimal128 arg3, _Decimal128 arg4, _Decimal128 arg5)
+{
+ return arg5;
+}
+
+
+
+_Decimal32 df0 = 0.0df, df1 = 1.0df, df2 = 2.0df,
+ df3 = 3.0df, df4 = 4.0df, df5 = 5.0df;
+_Decimal32 *pdf0 = &df0, *pdf1 = &df1, *pdf2 = &df2,
+ *pdf3 = &df3, *pdf4 = &df4, *pdf5 = &df5;
+_Decimal64 dd0 = 0.0dd, dd1 = 1.0dd, dd2 = 2.0dd,
+ dd3 = 3.0dd, dd4 = 4.0dd, dd5 = 5.0dd;
+_Decimal64 *pdd0 = &dd0, *pdd1 = &dd1, *pdd2 = &dd2,
+ *pdd3 = &dd3, *pdd4 = &dd4, *pdd5 = &dd5;
+_Decimal128 dl0 = 0.0dl, dl1 = 1.0dl, dl2 = 2.0dl,
+ dl3 = 3.0dl, dl4 = 4.0dl, dl5 = 5.0dl;
+_Decimal128 *pdl0 = &dl0, *pdl1 = &dl1, *pdl2 = &dl2,
+ *pdl3 = &dl3, *pdl4 = &dl4, *pdl5 = &dl5;
+
+int
+main ()
+{
+ /* _Decimal32 variants. */
+ if (arg0_32 (*pdf0, *pdf1, *pdf2, *pdf3, *pdf4, *pdf5) != 0.0df)
+ FAILURE
+ if (arg1_32 (*pdf0, *pdf1, *pdf2, *pdf3, *pdf4, *pdf5) != 1.0df)
+ FAILURE
+ if (arg2_32 (*pdf0, *pdf1, *pdf2, *pdf3, *pdf4, *pdf5) != 2.0df)
+ FAILURE
+ if (arg3_32 (*pdf0, *pdf1, *pdf2, *pdf3, *pdf4, *pdf5) != 3.0df)
+ FAILURE
+ if (arg4_32 (*pdf0, *pdf1, *pdf2, *pdf3, *pdf4, *pdf5) != 4.0df)
+ FAILURE
+ if (arg5_32 (*pdf0, *pdf1, *pdf2, *pdf3, *pdf4, *pdf5) != 5.0df)
+ FAILURE
+
+ /* _Decimal64 variants. */
+ if (arg0_64 (*pdd0, *pdd1, *pdd2, *pdd3, *pdd4, *pdd5) != 0.0dd)
+ FAILURE
+ if (arg1_64 (*pdd0, *pdd1, *pdd2, *pdd3, *pdd4, *pdd5) != 1.0dd)
+ FAILURE
+ if (arg2_64 (*pdd0, *pdd1, *pdd2, *pdd3, *pdd4, *pdd5) != 2.0dd)
+ FAILURE
+ if (arg3_64 (*pdd0, *pdd1, *pdd2, *pdd3, *pdd4, *pdd5) != 3.0dd)
+ FAILURE
+ if (arg4_64 (*pdd0, *pdd1, *pdd2, *pdd3, *pdd4, *pdd5) != 4.0dd)
+ FAILURE
+ if (arg5_64 (*pdd0, *pdd1, *pdd2, *pdd3, *pdd4, *pdd5) != 5.0dd)
+ FAILURE
+
+ /* _Decimal128 variants. */
+ if (arg0_128 (*pdl0, *pdl1, *pdl2, *pdl3, *pdl4, *pdl5) != 0.0dl)
+ FAILURE
+ if (arg1_128 (*pdl0, *pdl1, *pdl2, *pdl3, *pdl4, *pdl5) != 1.0dl)
+ FAILURE
+ if (arg2_128 (*pdl0, *pdl1, *pdl2, *pdl3, *pdl4, *pdl5) != 2.0dl)
+ FAILURE
+ if (arg3_128 (*pdl0, *pdl1, *pdl2, *pdl3, *pdl4, *pdl5) != 3.0dl)
+ FAILURE
+ if (arg4_128 (*pdl0, *pdl1, *pdl2, *pdl3, *pdl4, *pdl5) != 4.0dl)
+ FAILURE
+ if (arg5_128 (*pdl0, *pdl1, *pdl2, *pdl3, *pdl4, *pdl5) != 5.0dl)
+ FAILURE
+
+ if (failcnt != 0)
+ abort ();
+
+ return 0;
+}
++++++ suse-record-gcc-opts.diff ++++++
--- /var/tmp/diff_new_pack.j29502/_old 2008-09-16 01:20:47.000000000 +0200
+++ /var/tmp/diff_new_pack.j29502/_new 2008-09-16 01:20:47.000000000 +0200
@@ -21,7 +21,7 @@
+void
+suse_file_end_indicate_optflags (void)
+{
-+ unsigned int flags = SECTION_STRINGS | SECTION_MERGE | (SECTION_ENTSIZE & 1);
++ unsigned int flags = SECTION_DEBUG | SECTION_STRINGS | SECTION_MERGE | (SECTION_ENTSIZE & 1);
+
+ /*
+ o/O: optimize was off/on
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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