Hello community, here is the log from the commit of package gcc43 for openSUSE:Factory checked in at Mon Nov 23 14:38:57 CET 2009. -------- --- gcc43/gcc43.changes 2009-08-06 10:30:22.000000000 +0200 +++ /mounts/work_src_done/STABLE/gcc43/gcc43.changes 2009-11-20 13:53:51.000000000 +0100 @@ -1,0 +2,31 @@ +Fri Nov 20 13:53:12 CET 2009 - rguenther@suse.de + +- Re-diff patches to apply without fuzz. + +------------------------------------------------------------------- +Thu Nov 19 18:47:05 CET 2009 - rguenther@suse.de + +- Enable decimal floating point for s390(x). + +------------------------------------------------------------------- +Mon Oct 19 13:35:39 CEST 2009 - rguenther@suse.de + +- Update to gcc-4_3-branch head (r152973). [bnc#548080] + +------------------------------------------------------------------- +Fri Oct 16 12:37:12 CEST 2009 - rguenther@suse.de + +- Drop in Power7 patches for SLE11 SP1 from IBM. [bnc#547299] + [fate#307034] [fate#201762] + +------------------------------------------------------------------- +Tue Oct 13 16:38:28 CEST 2009 - rguenther@suse.de + +- Drop in S/390 patches for SLE11 SP1 from IBM. + +------------------------------------------------------------------- +Mon Sep 21 11:32:05 CEST 2009 - rguenther@suse.de + +- Backport patch for avoiding SPU micrococded instructions. [bnc#434505] + +------------------------------------------------------------------- @@ -4 +35 @@ -- Update to GCC 4.3.4 release. +- Update to GCC 4.3.4 release. [bnc#504421] @@ -87 +118 @@ -- Drop local patches for PRs 36438, 37868, 38051, 38171 and 38752. +- Drop local patches for PRs 36438, 37868, 38051, 38171, 38752 and 38000. @@ -93,0 +125,2 @@ +- Add patch for PR38000, C++ headers malefunction with the use + of -isystem. [bnc#465348] libgcj43.changes: same change calling whatdependson for head-i586 Old: ---- gcc-4.3.4-20090804.tar.bz2 ibm304071-z10-7 New: ---- diff-symref-align-constpool diff-vortex-1 diff-z6-scheduling gcc-4.3.4-20091019.tar.bz2 gcc-power7-sles-11sp1.patch02a gcc-power7-sles-11sp1.patch02c gcc-power7-sles-11sp1.patch02d gcc-power7-sles-11sp1.patch02e gcc-power7-sles-11sp1.patch02f ibm434505-spu s390-address-constraints s390-long-loop-prediction-1 s390-max-unroll-insn-default s390-mvc-mov stcmh-fix true-comp-z10 z10-cost z10-IJ-constraints z10-sched-fixes1 z10-sched-fixes3 z10-sched-fixes4 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ gcc43.spec ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:48.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:48.000000000 +0100 @@ -1,5 +1,5 @@ # -# spec file for package gcc43 (Version 4.3.4_20090804) +# spec file for package gcc43 (Version 4.3.4_20091019) # # Copyright (c) 2009 SUSE LINUX Products GmbH, Nuernberg, Germany. # @@ -114,7 +114,7 @@ # COMMON-BEGIN %define biarch_targets x86_64 s390x powerpc64 powerpc Url: http://gcc.gnu.org/ -Version: 4.3.4_20090804 +Version: 4.3.4_20091019 Release: 1 %define gcc_version %(echo %version | sed 's/_.*//') %define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2) @@ -213,7 +213,7 @@ Patch99: ibm-vector-keyword-1 Patch100: ibm-vector-keyword-2 Patch101: ibm-vector-keyword-3 -Patch102: ibm304071-z10-7 +Patch102: diff-z6-scheduling Patch103: ibm304134-power7-1 Patch104: ibm-cell-split Patch105: ibm-cell-split-fixes @@ -235,12 +235,32 @@ Patch124: nvl441016.patch Patch126: nvl447669.diff Patch127: nvl464739.patch +Patch128: ibm434505-spu # Patches for SAP features Patch130: sap303956-utf16-1.diff Patch131: sap303956-utf16-2.diff Patch132: sap303956-utf16-3.diff Patch133: sap303956-utf16-4.diff Patch134: sap303956-utf16-mangling.diff +# Patches for SP1 IBM features +Patch140: z10-IJ-constraints +Patch141: s390-mvc-mov +Patch142: z10-sched-fixes1 +Patch143: z10-sched-fixes3 +Patch144: z10-sched-fixes4 +Patch145: diff-vortex-1 +Patch146: s390-address-constraints +Patch147: true-comp-z10 +Patch148: s390-max-unroll-insn-default +Patch149: s390-long-loop-prediction-1 +Patch150: z10-cost +Patch151: stcmh-fix +Patch152: diff-symref-align-constpool +Patch160: gcc-power7-sles-11sp1.patch02a +Patch162: gcc-power7-sles-11sp1.patch02c +Patch163: gcc-power7-sles-11sp1.patch02d +Patch164: gcc-power7-sles-11sp1.patch02e +Patch165: gcc-power7-sles-11sp1.patch02f # LIBJAVA-DELETE-BEGIN Group: Development/Languages/C and C++ Summary: The GNU C Compiler and Support Files @@ -1533,11 +1553,30 @@ %patch124 -p1 %patch126 %patch127 +%patch128 %patch130 %patch131 %patch132 %patch133 %patch134 +%patch140 -p1 +%patch141 +%patch142 +%patch143 +%patch144 +%patch145 +%patch146 +%patch147 +%patch148 +%patch149 +%patch150 +%patch151 +%patch152 +%patch160 -p1 +%patch162 -p1 +%patch163 -p1 +%patch164 -p1 +%patch165 -p1 %build # Avoid rebuilding of generated files @@ -1728,10 +1767,12 @@ %if "%{TARGET_ARCH}" == "s390" --with-tune=z9-109 --with-arch=z900 \ --with-long-double-128 \ + --enable-decimal-float \ %endif %if "%{TARGET_ARCH}" == "s390x" --with-tune=z9-109 --with-arch=z900 \ --with-long-double-128 \ + --enable-decimal-float \ %endif --build=%{GCCDIST} # COMMON-END ++++++ libgcj43.spec ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:48.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:48.000000000 +0100 @@ -1,5 +1,5 @@ # -# spec file for package libgcj43 (Version 4.3.4_20090804) +# spec file for package libgcj43 (Version 4.3.4_20091019) # # Copyright (c) 2009 SUSE LINUX Products GmbH, Nuernberg, Germany. # @@ -130,7 +130,7 @@ # COMMON-BEGIN %define biarch_targets x86_64 s390x powerpc64 powerpc Url: http://gcc.gnu.org/ -Version: 4.3.4_20090804 +Version: 4.3.4_20091019 Release: 1 %define gcc_version %(echo %version | sed 's/_.*//') %define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2) @@ -229,7 +229,7 @@ Patch99: ibm-vector-keyword-1 Patch100: ibm-vector-keyword-2 Patch101: ibm-vector-keyword-3 -Patch102: ibm304071-z10-7 +Patch102: diff-z6-scheduling Patch103: ibm304134-power7-1 Patch104: ibm-cell-split Patch105: ibm-cell-split-fixes @@ -251,12 +251,32 @@ Patch124: nvl441016.patch Patch126: nvl447669.diff Patch127: nvl464739.patch +Patch128: ibm434505-spu # Patches for SAP features Patch130: sap303956-utf16-1.diff Patch131: sap303956-utf16-2.diff Patch132: sap303956-utf16-3.diff Patch133: sap303956-utf16-4.diff Patch134: sap303956-utf16-mangling.diff +# Patches for SP1 IBM features +Patch140: z10-IJ-constraints +Patch141: s390-mvc-mov +Patch142: z10-sched-fixes1 +Patch143: z10-sched-fixes3 +Patch144: z10-sched-fixes4 +Patch145: diff-vortex-1 +Patch146: s390-address-constraints +Patch147: true-comp-z10 +Patch148: s390-max-unroll-insn-default +Patch149: s390-long-loop-prediction-1 +Patch150: z10-cost +Patch151: stcmh-fix +Patch152: diff-symref-align-constpool +Patch160: gcc-power7-sles-11sp1.patch02a +Patch162: gcc-power7-sles-11sp1.patch02c +Patch163: gcc-power7-sles-11sp1.patch02d +Patch164: gcc-power7-sles-11sp1.patch02e +Patch165: gcc-power7-sles-11sp1.patch02f License: GPL v2 or later ; LGPL v2.1 or later Summary: Java Runtime Library for gcc Group: System/Libraries @@ -716,11 +736,30 @@ %patch124 -p1 %patch126 %patch127 +%patch128 %patch130 %patch131 %patch132 %patch133 %patch134 +%patch140 -p1 +%patch141 +%patch142 +%patch143 +%patch144 +%patch145 +%patch146 +%patch147 +%patch148 +%patch149 +%patch150 +%patch151 +%patch152 +%patch160 -p1 +%patch162 -p1 +%patch163 -p1 +%patch164 -p1 +%patch165 -p1 %build # Avoid rebuilding of generated files @@ -911,10 +950,12 @@ %if "%{TARGET_ARCH}" == "s390" --with-tune=z9-109 --with-arch=z900 \ --with-long-double-128 \ + --enable-decimal-float \ %endif %if "%{TARGET_ARCH}" == "s390x" --with-tune=z9-109 --with-arch=z900 \ --with-long-double-128 \ + --enable-decimal-float \ %endif --build=%{GCCDIST} # COMMON-END ++++++ amd-cvect-1.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -11,8 +11,8 @@ Index: gcc/testsuite/gcc.dg/vect/vect-complex-1.c =================================================================== ---- gcc/testsuite/gcc.dg/vect/vect-complex-1.c (revision 0) -+++ gcc/testsuite/gcc.dg/vect/vect-complex-1.c (revision 138198) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.dg/vect/vect-complex-1.c 2009-11-20 13:51:16.000000000 +0100 @@ -0,0 +1,56 @@ +/* { dg-require-effective-target vect_float } */ + @@ -72,8 +72,8 @@ +/* { dg-final { cleanup-tree-dump "vect" } } */ Index: gcc/testsuite/gcc.dg/vect/vect-complex-2.c =================================================================== ---- gcc/testsuite/gcc.dg/vect/vect-complex-2.c (revision 0) -+++ gcc/testsuite/gcc.dg/vect/vect-complex-2.c (revision 138198) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.dg/vect/vect-complex-2.c 2009-11-20 13:51:16.000000000 +0100 @@ -0,0 +1,56 @@ +/* { dg-require-effective-target vect_double } */ + @@ -133,8 +133,8 @@ +/* { dg-final { cleanup-tree-dump "vect" } } */ Index: gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c =================================================================== ---- gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c (revision 0) -+++ gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c (revision 138198) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.dg/vect/fast-math-vect-complex-3.c 2009-11-20 13:51:16.000000000 +0100 @@ -0,0 +1,61 @@ +/* { dg-require-effective-target vect_float } */ + @@ -199,8 +199,8 @@ +/* { dg-final { cleanup-tree-dump "vect" } } */ Index: gcc/testsuite/gcc.dg/vect/vect-complex-4.c =================================================================== ---- gcc/testsuite/gcc.dg/vect/vect-complex-4.c (revision 0) -+++ gcc/testsuite/gcc.dg/vect/vect-complex-4.c (revision 138198) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.dg/vect/vect-complex-4.c 2009-11-20 13:51:16.000000000 +0100 @@ -0,0 +1,109 @@ +/* { dg-require-effective-target vect_int } */ + @@ -313,9 +313,9 @@ +/* { dg-final { cleanup-tree-dump "vect" } } */ Index: gcc/tree-vect-analyze.c =================================================================== ---- gcc/tree-vect-analyze.c (revision 138197) -+++ gcc/tree-vect-analyze.c (revision 138198) -@@ -2751,7 +2751,9 @@ vect_build_slp_tree (loop_vec_info loop_ +--- gcc/tree-vect-analyze.c.orig 2009-11-20 13:51:10.000000000 +0100 ++++ gcc/tree-vect-analyze.c 2009-11-20 13:51:16.000000000 +0100 +@@ -2780,7 +2780,9 @@ vect_build_slp_tree (loop_vec_info loop_ } else { ++++++ amd-cvect-2.diff ++++++ ++++ 1078 lines (skipped) ++++ between gcc43/amd-cvect-2.diff ++++ and /mounts/work_src_done/STABLE/gcc43/amd-cvect-2.diff ++++++ amd-SSE5-shift.diff ++++++ ++++ 608 lines (skipped) ++++ between gcc43/amd-SSE5-shift.diff ++++ and /mounts/work_src_done/STABLE/gcc43/amd-SSE5-shift.diff ++++++ amd-SSE5-shift-ppc-1.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -11,9 +11,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc/config/rs6000/rs6000.c (revision 133050) -+++ gcc/config/rs6000/rs6000.c (revision 133051) -@@ -7090,9 +7090,9 @@ static struct builtin_description bdesc_ +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:50:52.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:07.000000000 +0100 +@@ -7049,9 +7049,9 @@ static struct builtin_description bdesc_ { MASK_ALTIVEC, CODE_FOR_altivec_vrlb, "__builtin_altivec_vrlb", ALTIVEC_BUILTIN_VRLB }, { MASK_ALTIVEC, CODE_FOR_altivec_vrlh, "__builtin_altivec_vrlh", ALTIVEC_BUILTIN_VRLH }, { MASK_ALTIVEC, CODE_FOR_altivec_vrlw, "__builtin_altivec_vrlw", ALTIVEC_BUILTIN_VRLW }, @@ -28,9 +28,9 @@ { MASK_ALTIVEC, CODE_FOR_altivec_vspltb, "__builtin_altivec_vspltb", ALTIVEC_BUILTIN_VSPLTB }, Index: gcc/config/rs6000/altivec.md =================================================================== ---- gcc/config/rs6000/altivec.md (revision 133050) -+++ gcc/config/rs6000/altivec.md (revision 133051) -@@ -64,7 +64,6 @@ (define_constants +--- gcc/config/rs6000/altivec.md.orig 2008-11-05 22:19:47.000000000 +0100 ++++ gcc/config/rs6000/altivec.md 2009-11-20 13:51:07.000000000 +0100 +@@ -64,7 +64,6 @@ (UNSPEC_VPKUWUS 102) (UNSPEC_VPKSWUS 103) (UNSPEC_VRL 104) @@ -38,7 +38,7 @@ (UNSPEC_VSLV4SI 110) (UNSPEC_VSLO 111) (UNSPEC_VSR 118) -@@ -576,7 +575,7 @@ (define_expand "mulv4sf3" +@@ -582,7 +581,7 @@ /* Generate [-0.0, -0.0, -0.0, -0.0]. */ neg0 = gen_reg_rtx (V4SImode); emit_insn (gen_altivec_vspltisw (neg0, constm1_rtx)); @@ -47,7 +47,7 @@ /* Use the multiply-add. */ emit_insn (gen_altivec_vmaddfp (operands[0], operands[1], operands[2], -@@ -635,7 +634,7 @@ (define_expand "mulv4si3" +@@ -641,7 +640,7 @@ high_product = gen_reg_rtx (V4SImode); emit_insn (gen_altivec_vmsumuhm (high_product, one, small_swap, zero)); @@ -56,7 +56,7 @@ emit_insn (gen_addv4si3 (operands[0], high_product, low_product)); -@@ -1221,15 +1220,6 @@ (define_insn "altivec_vrl<VI_char>" +@@ -1227,15 +1226,6 @@ "vrl<VI_char> %0,%1,%2" [(set_attr "type" "vecsimple")]) @@ -72,7 +72,7 @@ (define_insn "altivec_vsl" [(set (match_operand:V4SI 0 "register_operand" "=v") (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v") -@@ -1248,6 +1238,14 @@ (define_insn "altivec_vslo" +@@ -1254,6 +1244,14 @@ "vslo %0,%1,%2" [(set_attr "type" "vecperm")]) @@ -87,7 +87,7 @@ (define_insn "lshr<mode>3" [(set (match_operand:VI 0 "register_operand" "=v") (lshiftrt:VI (match_operand:VI 1 "register_operand" "v") -@@ -2039,7 +2037,7 @@ (define_expand "absv4sf2" +@@ -2045,7 +2043,7 @@ [(set (match_dup 2) (vec_duplicate:V4SI (const_int -1))) (set (match_dup 3) @@ -96,7 +96,7 @@ (set (match_operand:V4SF 0 "register_operand" "=v") (and:V4SF (not:V4SF (subreg:V4SF (match_dup 3) 0)) (match_operand:V4SF 1 "register_operand" "v")))] -@@ -2642,7 +2640,7 @@ (define_expand "negv4sf2" +@@ -2648,7 +2646,7 @@ /* Generate [-0.0, -0.0, -0.0, -0.0]. */ neg0 = gen_reg_rtx (V4SImode); emit_insn (gen_altivec_vspltisw (neg0, constm1_rtx)); ++++++ amd-SSE5-shift-ppc-2.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -57,9 +57,9 @@ Index: gcc/config/spu/spu.c =================================================================== ---- gcc/config/spu/spu.c (revision 135303) -+++ gcc/config/spu/spu.c (revision 135304) -@@ -4799,7 +4799,7 @@ spu_initialize_trampoline (rtx tramp, rt +--- gcc/config/spu/spu.c.orig 2009-09-21 11:42:16.000000000 +0200 ++++ gcc/config/spu/spu.c 2009-09-21 11:44:57.000000000 +0200 +@@ -5479,7 +5479,7 @@ spu_initialize_trampoline (rtx tramp, rt insnc = force_reg (V4SImode, array_to_constant (V4SImode, insna)); emit_insn (gen_shufb (shuf, fnaddr, cxt, shufc)); @@ -70,8 +70,8 @@ Index: gcc/config/spu/spu-builtins.def =================================================================== ---- gcc/config/spu/spu-builtins.def (revision 135303) -+++ gcc/config/spu/spu-builtins.def (revision 135304) +--- gcc/config/spu/spu-builtins.def.orig 2009-09-21 11:42:16.000000000 +0200 ++++ gcc/config/spu/spu-builtins.def 2009-09-21 11:44:57.000000000 +0200 @@ -107,19 +107,19 @@ DEF_BUILTIN (SI_NOR, CODE_FOR_no DEF_BUILTIN (SI_EQV, CODE_FOR_eqv_v16qi, "si_eqv", B_INSN, _A3(SPU_BTI_QUADWORD, SPU_BTI_QUADWORD, SPU_BTI_QUADWORD)) DEF_BUILTIN (SI_SELB, CODE_FOR_selb, "si_selb", B_INSN, _A4(SPU_BTI_QUADWORD, SPU_BTI_QUADWORD, SPU_BTI_QUADWORD, SPU_BTI_QUADWORD)) @@ -148,9 +148,9 @@ DEF_BUILTIN (SPU_SLQW_1, CODE_FOR_shlqbi_ti, "spu_slqw_1", B_INTERNAL, _A3(SPU_BTI_UV2DI, SPU_BTI_UV2DI, SPU_BTI_UINTSI)) Index: gcc/config/spu/spu.md =================================================================== ---- gcc/config/spu/spu.md (revision 135303) -+++ gcc/config/spu/spu.md (revision 135304) -@@ -211,6 +211,9 @@ (define_mode_iterator VCMPU [V16QI +--- gcc/config/spu/spu.md.orig 2009-09-21 11:42:16.000000000 +0200 ++++ gcc/config/spu/spu.md 2009-09-21 11:44:57.000000000 +0200 +@@ -213,6 +213,9 @@ V8HI V4SI]) @@ -160,7 +160,7 @@ (define_mode_attr bh [(QI "b") (V16QI "b") (HI "h") (V8HI "h") (SI "") (V4SI "")]) -@@ -727,7 +730,7 @@ (define_insn_and_split "floatunssidf2_in +@@ -790,7 +793,7 @@ rtx op6_ti = gen_rtx_REG (TImode, REGNO (ops[6])); emit_insn (gen_clzv4si2 (ops[3],op1_v4si)); emit_move_insn (ops[6], spu_const (V4SImode, 1023+31)); @@ -169,7 +169,7 @@ emit_insn (gen_ceq_v4si (ops[5],ops[3],spu_const (V4SImode, 32))); emit_insn (gen_subv4si3 (ops[6],ops[6],ops[3])); emit_insn (gen_addv4si3 (ops[4],ops[4],ops[4])); -@@ -822,7 +825,7 @@ (define_insn_and_split "floatunsdidf2_in +@@ -885,7 +888,7 @@ rtx op4_df = gen_rtx_REG (DFmode, REGNO(ops[4])); rtx op5_df = gen_rtx_REG (DFmode, REGNO(ops[5])); emit_insn (gen_clzv4si2 (ops[4],op1_v4si)); @@ -178,7 +178,7 @@ emit_insn (gen_ceq_v4si (ops[6],ops[4],spu_const (V4SImode, 32))); emit_insn (gen_subv4si3 (ops[4],ops[3],ops[4])); emit_insn (gen_addv4si3 (ops[5],ops[5],ops[5])); -@@ -1222,7 +1225,7 @@ (define_expand "mulv8hi3" +@@ -1285,7 +1288,7 @@ emit_move_insn (mask, spu_const (V4SImode, 0x0000ffff)); emit_insn (gen_spu_mpyhh (high, operands[1], operands[2])); emit_insn (gen_spu_mpy (low, operands[1], operands[2])); @@ -187,7 +187,7 @@ emit_insn (gen_selb (result, shift, low, mask)); DONE; }") -@@ -2100,9 +2103,9 @@ (define_insn "sumb_si" +@@ -2220,9 +2223,9 @@ [(set_attr "type" "fxb")])  @@ -199,7 +199,7 @@ [(set (match_operand:VHSI 0 "spu_reg_operand" "=r,r") (ashift:VHSI (match_operand:VHSI 1 "spu_reg_operand" "r,r") (match_operand:VHSI 2 "spu_nonmem_operand" "r,W")))] -@@ -2234,9 +2237,9 @@ (define_insn "shlqby_ti" +@@ -2354,9 +2357,9 @@ [(set_attr "type" "shuf,shuf")])  @@ -211,7 +211,7 @@ [(set (match_operand:VHSI 0 "spu_reg_operand" "=r,r") (lshiftrt:VHSI (match_operand:VHSI 1 "spu_reg_operand" "r,r") (match_operand:VHSI 2 "spu_nonmem_operand" "r,W"))) -@@ -2363,9 +2366,9 @@ (define_insn "rotqmby_<mode>" +@@ -2483,9 +2486,9 @@ [(set_attr "type" "shuf")])  @@ -223,7 +223,7 @@ [(set (match_operand:VHSI 0 "spu_reg_operand" "=r,r") (ashiftrt:VHSI (match_operand:VHSI 1 "spu_reg_operand" "r,r") (match_operand:VHSI 2 "spu_nonmem_operand" "r,W"))) -@@ -2430,7 +2433,7 @@ (define_insn_and_split "ashrdi3" +@@ -2550,7 +2553,7 @@ emit_insn (gen_lshrti3 (op0, op1, GEN_INT (32))); emit_insn (gen_spu_xswd (op0d, op0v)); if (val > 32) @@ -232,7 +232,7 @@ } else { -@@ -2479,7 +2482,7 @@ (define_expand "ashrti3" +@@ -2599,7 +2602,7 @@ rtx op1_v4si = spu_gen_subreg (V4SImode, operands[1]); rtx t = gen_reg_rtx (TImode); emit_insn (gen_subsi3 (sign_shift, GEN_INT (128), force_reg (SImode, operands[2]))); @@ -241,7 +241,7 @@ emit_insn (gen_fsm_ti (sign_mask, sign_mask)); emit_insn (gen_ashlti3 (sign_mask, sign_mask, sign_shift)); emit_insn (gen_lshrti3 (t, operands[1], operands[2])); -@@ -2496,9 +2499,9 @@ (define_insn "fsm_ti" +@@ -2616,9 +2619,9 @@ [(set_attr "type" "shuf")])  @@ -253,7 +253,7 @@ [(set (match_operand:VHSI 0 "spu_reg_operand" "=r,r") (rotate:VHSI (match_operand:VHSI 1 "spu_reg_operand" "r,r") (match_operand:VHSI 2 "spu_nonmem_operand" "r,W")))] -@@ -3046,14 +3049,14 @@ (define_expand "cgt_df" +@@ -3166,14 +3169,14 @@ selb\t%0,%5,%0,%3" emit_insn (gen_iorv4si3 (a_nan, a_nan, b_nan)); } emit_move_insn (zero, CONST0_RTX (V4SImode)); @@ -270,7 +270,7 @@ emit_insn (gen_shufb (bsel, bsel, bsel, hi_promote)); emit_insn (gen_bg_v4si (bbor, zero, b_abs)); emit_insn (gen_shufb (bbor, bbor, bbor, borrow_shuffle)); -@@ -3154,13 +3157,13 @@ (define_expand "cgt_v2df" +@@ -3274,13 +3277,13 @@ selb\t%0,%5,%0,%3" emit_insn (gen_shufb (b_nan, b_nan, b_nan, hi_promote)); emit_insn (gen_iorv4si3 (a_nan, a_nan, b_nan)); emit_move_insn (zero, CONST0_RTX (V4SImode)); @@ -286,7 +286,7 @@ emit_insn (gen_shufb (bsel, bsel, bsel, hi_promote)); emit_insn (gen_bg_v4si (bbor, zero, b_abs)); emit_insn (gen_shufb (bbor, bbor, bbor, borrow_shuffle)); -@@ -3344,7 +3347,7 @@ (define_expand "dftsv" +@@ -3464,7 +3467,7 @@ selb\t%0,%4,%0,%3" 0x08090A0B, 0x08090A0B); emit_move_insn (hi_promote, pat); @@ -297,9 +297,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc/config/rs6000/rs6000.c (revision 135303) -+++ gcc/config/rs6000/rs6000.c (revision 135304) -@@ -7109,20 +7109,20 @@ static struct builtin_description bdesc_ +--- gcc/config/rs6000/rs6000.c.orig 2009-09-21 11:44:56.000000000 +0200 ++++ gcc/config/rs6000/rs6000.c 2009-09-21 11:44:57.000000000 +0200 +@@ -7049,20 +7049,20 @@ static struct builtin_description bdesc_ { MASK_ALTIVEC, CODE_FOR_altivec_vrlb, "__builtin_altivec_vrlb", ALTIVEC_BUILTIN_VRLB }, { MASK_ALTIVEC, CODE_FOR_altivec_vrlh, "__builtin_altivec_vrlh", ALTIVEC_BUILTIN_VRLH }, { MASK_ALTIVEC, CODE_FOR_altivec_vrlw, "__builtin_altivec_vrlw", ALTIVEC_BUILTIN_VRLW }, @@ -331,9 +331,9 @@ { MASK_ALTIVEC, CODE_FOR_subv16qi3, "__builtin_altivec_vsububm", ALTIVEC_BUILTIN_VSUBUBM }, Index: gcc/config/rs6000/altivec.md =================================================================== ---- gcc/config/rs6000/altivec.md (revision 135303) -+++ gcc/config/rs6000/altivec.md (revision 135304) -@@ -575,7 +575,7 @@ (define_expand "mulv4sf3" +--- gcc/config/rs6000/altivec.md.orig 2009-09-21 11:44:56.000000000 +0200 ++++ gcc/config/rs6000/altivec.md 2009-09-21 11:44:57.000000000 +0200 +@@ -581,7 +581,7 @@ /* Generate [-0.0, -0.0, -0.0, -0.0]. */ neg0 = gen_reg_rtx (V4SImode); emit_insn (gen_altivec_vspltisw (neg0, constm1_rtx)); @@ -342,7 +342,7 @@ /* Use the multiply-add. */ emit_insn (gen_altivec_vmaddfp (operands[0], operands[1], operands[2], -@@ -634,7 +634,7 @@ (define_expand "mulv4si3" +@@ -640,7 +640,7 @@ high_product = gen_reg_rtx (V4SImode); emit_insn (gen_altivec_vmsumuhm (high_product, one, small_swap, zero)); @@ -351,7 +351,7 @@ emit_insn (gen_addv4si3 (operands[0], high_product, low_product)); -@@ -1238,7 +1238,7 @@ (define_insn "altivec_vslo" +@@ -1244,7 +1244,7 @@ "vslo %0,%1,%2" [(set_attr "type" "vecperm")]) @@ -360,7 +360,7 @@ [(set (match_operand:VI 0 "register_operand" "=v") (ashift:VI (match_operand:VI 1 "register_operand" "v") (match_operand:VI 2 "register_operand" "v") ))] -@@ -1246,7 +1246,7 @@ (define_insn "ashl<mode>3" +@@ -1252,7 +1252,7 @@ "vsl<VI_char> %0,%1,%2" [(set_attr "type" "vecsimple")]) @@ -369,7 +369,7 @@ [(set (match_operand:VI 0 "register_operand" "=v") (lshiftrt:VI (match_operand:VI 1 "register_operand" "v") (match_operand:VI 2 "register_operand" "v") ))] -@@ -1254,7 +1254,7 @@ (define_insn "lshr<mode>3" +@@ -1260,7 +1260,7 @@ "vsr<VI_char> %0,%1,%2" [(set_attr "type" "vecsimple")]) @@ -378,7 +378,7 @@ [(set (match_operand:VI 0 "register_operand" "=v") (ashiftrt:VI (match_operand:VI 1 "register_operand" "v") (match_operand:VI 2 "register_operand" "v") ))] -@@ -2640,7 +2640,7 @@ (define_expand "negv4sf2" +@@ -2646,7 +2646,7 @@ /* Generate [-0.0, -0.0, -0.0, -0.0]. */ neg0 = gen_reg_rtx (V4SImode); emit_insn (gen_altivec_vspltisw (neg0, constm1_rtx)); ++++++ build-id.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -1,8 +1,8 @@ Index: gcc/gcc.c =================================================================== ---- gcc/gcc.c.orig -+++ gcc/gcc.c -@@ -1826,6 +1826,15 @@ init_spec (void) +--- gcc/gcc.c.orig 2009-11-20 13:50:10.000000000 +0100 ++++ gcc/gcc.c 2009-11-20 13:50:34.000000000 +0100 +@@ -1828,6 +1828,15 @@ init_spec (void) obstack_grow0 (&obstack, link_spec, strlen (link_spec)); link_spec = XOBFINISH (&obstack, const char *); #endif @@ -20,8 +20,8 @@ } Index: gcc/config/elfos.h =================================================================== ---- gcc/config/elfos.h.orig -+++ gcc/config/elfos.h +--- gcc/config/elfos.h.orig 2008-02-19 10:55:58.000000000 +0100 ++++ gcc/config/elfos.h 2009-11-20 13:50:34.000000000 +0100 @@ -513,3 +513,5 @@ along with GCC; see the file COPYING3. #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \ default_elf_asm_output_external (FILE, DECL, NAME) ++++++ diff-symref-align-constpool ++++++ Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-11-20 13:52:38.000000000 +0100 +++ gcc/config/s390/s390.c 2009-11-20 13:52:42.000000000 +0100 @@ -8937,6 +8937,7 @@ s390_encode_section_info (tree decl, rtx && GET_CODE (XEXP (rtl, 0)) == SYMBOL_REF && TREE_CONSTANT_POOL_ADDRESS_P (XEXP (rtl, 0)) && (MEM_ALIGN (rtl) == 0 + || GET_MODE_BITSIZE (GET_MODE (rtl)) == 0 || MEM_ALIGN (rtl) < GET_MODE_BITSIZE (GET_MODE (rtl)))) SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_NOT_NATURALLY_ALIGNED; } ++++++ diff-vortex-1 ++++++ Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-11-20 13:51:41.000000000 +0100 +++ gcc/config/s390/s390.c 2009-11-20 13:52:31.000000000 +0100 @@ -9588,6 +9588,104 @@ s390_optimize_prologue (void) } } + +/* Exchange the two operands of COND, and swap its mask so that the + semantics does not change. */ +static void +s390_swap_cmp (rtx cond) +{ + enum rtx_code code = swap_condition (GET_CODE (cond)); + rtx tmp = XEXP (cond, 0); + + XEXP (cond, 0) = XEXP (cond, 1); + XEXP (cond, 1) = tmp; + PUT_CODE (cond, code); +} + + +/* Returns 1 if INSN reads the value of REG for purposes not related + to addressing of memory, and 0 otherwise. */ +static int +s390_non_addr_reg_read_p (rtx reg, rtx insn) +{ + return reg_referenced_p (reg, PATTERN (insn)) + && !reg_used_in_mem_p (REGNO (reg), PATTERN (insn)); +} + + +/* On z10, instructions of the compare-and-branch family have the + property to access the register occurring as second operand with + its bits complemented. If such a compare is grouped with a second + instruction that accesses the same register non-complemented, and + if that register's value is delivered via a bypass, then the + pipeline recycles, thereby causing significant performance decline. + This function locates such situations and exchanges the two + operands of the compare. */ +static void +s390_z10_optimize_cmp (void) +{ + rtx insn, prev_insn, next_insn; + int added_NOPs = 0; + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { + if (!INSN_P (insn) || INSN_CODE (insn) <= 0) + continue; + + if (get_attr_z10prop (insn) == Z10PROP_Z10_COBRA) + { + rtx op0, op1, pattern, jump_expr, cond; + + /* Extract the comparison�s condition and its operands. */ + pattern = single_set (insn); + gcc_assert (GET_CODE (pattern) == SET); + jump_expr = XEXP (pattern, 1); + gcc_assert (GET_CODE (jump_expr) == IF_THEN_ELSE); + cond = XEXP (jump_expr, 0); + op0 = XEXP (cond, 0); + op1 = XEXP (cond, 1); + + /* Swap the COMPARE�s arguments and its mask if there is a + conflicting access in the previous insn. */ + prev_insn = PREV_INSN (insn); + if (prev_insn != NULL_RTX && INSN_P (prev_insn) + && reg_referenced_p (op1, PATTERN (prev_insn))) + { + s390_swap_cmp (cond); + op0 = XEXP (cond, 0); + op1 = XEXP (cond, 1); + } + + /* Check if there is a conflict with the next insn. If there + was no conflict with the previous insn, then swap the + COMPARE´s arguments and its mask. If we already swapped + the operands, or if swapping them would cause a conflict + with the previous insn, issue a NOP after the COMPARE in + order to separate the two instuctions. */ + next_insn = NEXT_INSN (insn); + if (next_insn != NULL_RTX && INSN_P (next_insn) + && s390_non_addr_reg_read_p (op1, next_insn)) + { + if (s390_non_addr_reg_read_p (op0, prev_insn)) + { + if (REGNO(op1) == 0) + emit_insn_after (gen_nop1 (), insn); + else + emit_insn_after (gen_nop (), insn); + added_NOPs = 1; + } + else + s390_swap_cmp (cond); + } + } + } + + /* Adjust branches if we added new instructions. */ + if (added_NOPs) + shorten_branches (get_insns ()); +} + + /* Perform machine-dependent processing. */ static void @@ -9700,6 +9798,11 @@ s390_reorg (void) /* Try to optimize prologue and epilogue further. */ s390_optimize_prologue (); + + /* Eliminate z10-specific pipeline recycles related to some compare + instructions. */ + if (TARGET_Z10) + s390_z10_optimize_cmp (); } Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:30.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:31.000000000 +0100 @@ -8479,6 +8479,12 @@ [(set_attr "op_type" "RR") (set_attr "z10prop" "z10_fr_E1")]) +(define_insn "nop1" + [(const_int 1)] + "" + "lr\t1,1" + [(set_attr "op_type" "RR")]) + ; ; Special literal pool access instruction pattern(s). ++++++ diff-z6-scheduling ++++++ ++++ 3327 lines (skipped) ++++++ fpreserve-function-arguments43.patch ++++++ ++++ 684 lines (skipped) ++++ between gcc43/fpreserve-function-arguments43.patch ++++ and /mounts/work_src_done/STABLE/gcc43/fpreserve-function-arguments43.patch ++++++ gcc41-ia64-stack-protector.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -12,157 +12,131 @@ Index: gcc/config/ia64/linux.h =================================================================== -*** gcc/config/ia64/linux.h.orig 2006-12-12 16:47:58.000000000 +0100 ---- gcc/config/ia64/linux.h 2007-11-03 22:03:55.000000000 +0100 -*************** do { \ -*** 59,61 **** ---- 59,66 ---- - #define LINK_EH_SPEC "" - - #define MD_UNWIND_SUPPORT "config/ia64/linux-unwind.h" -+ -+ #ifdef TARGET_LIBC_PROVIDES_SSP -+ /* IA-64 glibc provides __stack_chk_guard in [r13-8]. */ -+ #define TARGET_THREAD_SSP_OFFSET -8 -+ #endif +--- gcc/config/ia64/linux.h.orig 2008-02-19 10:55:50.000000000 +0100 ++++ gcc/config/ia64/linux.h 2009-11-20 13:50:44.000000000 +0100 +@@ -59,3 +59,8 @@ do { \ + #define LINK_EH_SPEC "" + + #define MD_UNWIND_SUPPORT "config/ia64/linux-unwind.h" ++ ++#ifdef TARGET_LIBC_PROVIDES_SSP ++/* IA-64 glibc provides __stack_chk_guard in [r13-8]. */ ++#define TARGET_THREAD_SSP_OFFSET -8 ++#endif Index: gcc/config/ia64/ia64.c =================================================================== -*** gcc/config/ia64/ia64.c.orig 2007-10-31 17:24:41.000000000 +0100 ---- gcc/config/ia64/ia64.c 2007-11-03 22:03:55.000000000 +0100 -*************** ia64_compute_frame_size (HOST_WIDE_INT s -*** 2578,2583 **** ---- 2578,2586 ---- - else - pretend_args_size = current_function_pretend_args_size; - -+ if (FRAME_GROWS_DOWNWARD) -+ size = IA64_STACK_ALIGN (size); -+ - total_size = (spill_size + extra_spill_size + size + pretend_args_size - + current_function_outgoing_args_size); - total_size = IA64_STACK_ALIGN (total_size); -*************** ia64_compute_frame_size (HOST_WIDE_INT s -*** 2602,2633 **** - HOST_WIDE_INT - ia64_initial_elimination_offset (int from, int to) - { -! HOST_WIDE_INT offset; - -! ia64_compute_frame_size (get_frame_size ()); - switch (from) - { - case FRAME_POINTER_REGNUM: -! switch (to) -! { -! case HARD_FRAME_POINTER_REGNUM: -! if (current_function_is_leaf) -! offset = -current_frame_info.total_size; -! else -! offset = -(current_frame_info.total_size -! - current_function_outgoing_args_size - 16); -! break; -! -! case STACK_POINTER_REGNUM: -! if (current_function_is_leaf) -! offset = 0; -! else -! offset = 16 + current_function_outgoing_args_size; -! break; -! -! default: -! gcc_unreachable (); -! } - break; - - case ARG_POINTER_REGNUM: ---- 2605,2623 ---- - HOST_WIDE_INT - ia64_initial_elimination_offset (int from, int to) - { -! HOST_WIDE_INT offset, size = get_frame_size (); - -! ia64_compute_frame_size (size); - switch (from) - { - case FRAME_POINTER_REGNUM: -! offset = FRAME_GROWS_DOWNWARD ? IA64_STACK_ALIGN (size) : 0; -! if (!current_function_is_leaf) -! offset += 16 + current_function_outgoing_args_size; -! if (to == HARD_FRAME_POINTER_REGNUM) -! offset -= current_frame_info.total_size; -! else -! gcc_assert (to == STACK_POINTER_REGNUM); - break; - - case ARG_POINTER_REGNUM: +--- gcc/config/ia64/ia64.c.orig 2009-03-13 16:34:03.000000000 +0100 ++++ gcc/config/ia64/ia64.c 2009-11-20 13:50:44.000000000 +0100 +@@ -2581,6 +2581,9 @@ ia64_compute_frame_size (HOST_WIDE_INT s + else + pretend_args_size = current_function_pretend_args_size; + ++ if (FRAME_GROWS_DOWNWARD) ++ size = IA64_STACK_ALIGN (size); ++ + total_size = (spill_size + extra_spill_size + size + pretend_args_size + + current_function_outgoing_args_size); + total_size = IA64_STACK_ALIGN (total_size); +@@ -2605,32 +2608,19 @@ ia64_compute_frame_size (HOST_WIDE_INT s + HOST_WIDE_INT + ia64_initial_elimination_offset (int from, int to) + { +- HOST_WIDE_INT offset; ++ HOST_WIDE_INT offset, size = get_frame_size (); + +- ia64_compute_frame_size (get_frame_size ()); ++ ia64_compute_frame_size (size); + switch (from) + { + case FRAME_POINTER_REGNUM: +- switch (to) +- { +- case HARD_FRAME_POINTER_REGNUM: +- if (current_function_is_leaf) +- offset = -current_frame_info.total_size; +- else +- offset = -(current_frame_info.total_size +- - current_function_outgoing_args_size - 16); +- break; +- +- case STACK_POINTER_REGNUM: +- if (current_function_is_leaf) +- offset = 0; +- else +- offset = 16 + current_function_outgoing_args_size; +- break; +- +- default: +- gcc_unreachable (); +- } ++ offset = FRAME_GROWS_DOWNWARD ? IA64_STACK_ALIGN (size) : 0; ++ if (!current_function_is_leaf) ++ offset += 16 + current_function_outgoing_args_size; ++ if (to == HARD_FRAME_POINTER_REGNUM) ++ offset -= current_frame_info.total_size; ++ else ++ gcc_assert (to == STACK_POINTER_REGNUM); + break; + + case ARG_POINTER_REGNUM: Index: gcc/config/ia64/ia64.md =================================================================== -*** gcc/config/ia64/ia64.md.orig 2007-10-29 14:34:08.000000000 +0100 ---- gcc/config/ia64/ia64.md 2007-11-03 22:03:55.000000000 +0100 -*************** -*** 6416,6421 **** ---- 6416,6458 ---- - "mov %0 = ip" - [(set_attr "itanium_class" "frbr")]) - -+ ;; -+ ;; Stack guard expanders -+ -+ (define_expand "stack_protect_set" -+ [(set (match_operand 0 "memory_operand" "") -+ (match_operand 1 "memory_operand" ""))] -+ "" -+ { -+ #ifdef TARGET_THREAD_SSP_OFFSET -+ rtx thread_pointer_rtx = gen_rtx_REG (Pmode, 13); -+ rtx canary = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, thread_pointer_rtx, -+ GEN_INT (TARGET_THREAD_SSP_OFFSET))); -+ MEM_VOLATILE_P (canary) = MEM_VOLATILE_P (operands[1]); -+ operands[1] = canary; -+ #endif -+ emit_move_insn (operands[0], operands[1]); -+ DONE; -+ }) -+ -+ (define_expand "stack_protect_test" -+ [(match_operand 0 "memory_operand" "") -+ (match_operand 1 "memory_operand" "") -+ (match_operand 2 "" "")] -+ "" -+ { -+ #ifdef TARGET_THREAD_SSP_OFFSET -+ rtx thread_pointer_rtx = gen_rtx_REG (Pmode, 13); -+ rtx canary = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, thread_pointer_rtx, -+ GEN_INT (TARGET_THREAD_SSP_OFFSET))); -+ MEM_VOLATILE_P (canary) = MEM_VOLATILE_P (operands[1]); -+ operands[1] = canary; -+ #endif -+ emit_cmp_and_jump_insns (operands[0], operands[1], EQ, NULL_RTX, -+ ptr_mode, 1, operands[2]); -+ DONE; -+ }) -+ - ;; Vector operations - (include "vect.md") - ;; Atomic operations +--- gcc/config/ia64/ia64.md.orig 2008-04-20 23:49:39.000000000 +0200 ++++ gcc/config/ia64/ia64.md 2009-11-20 13:50:44.000000000 +0100 +@@ -6417,6 +6417,43 @@ + "mov %0 = ip" + [(set_attr "itanium_class" "frbr")]) + ++;; ++;; Stack guard expanders ++ ++(define_expand "stack_protect_set" ++ [(set (match_operand 0 "memory_operand" "") ++ (match_operand 1 "memory_operand" ""))] ++ "" ++{ ++#ifdef TARGET_THREAD_SSP_OFFSET ++ rtx thread_pointer_rtx = gen_rtx_REG (Pmode, 13); ++ rtx canary = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, thread_pointer_rtx, ++ GEN_INT (TARGET_THREAD_SSP_OFFSET))); ++ MEM_VOLATILE_P (canary) = MEM_VOLATILE_P (operands[1]); ++ operands[1] = canary; ++#endif ++ emit_move_insn (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "stack_protect_test" ++ [(match_operand 0 "memory_operand" "") ++ (match_operand 1 "memory_operand" "") ++ (match_operand 2 "" "")] ++ "" ++{ ++#ifdef TARGET_THREAD_SSP_OFFSET ++ rtx thread_pointer_rtx = gen_rtx_REG (Pmode, 13); ++ rtx canary = gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, thread_pointer_rtx, ++ GEN_INT (TARGET_THREAD_SSP_OFFSET))); ++ MEM_VOLATILE_P (canary) = MEM_VOLATILE_P (operands[1]); ++ operands[1] = canary; ++#endif ++ emit_cmp_and_jump_insns (operands[0], operands[1], EQ, NULL_RTX, ++ ptr_mode, 1, operands[2]); ++ DONE; ++}) ++ + ;; Vector operations + (include "vect.md") + ;; Atomic operations Index: gcc/config/ia64/ia64.h =================================================================== -*** gcc/config/ia64/ia64.h.orig 2007-10-29 14:34:08.000000000 +0100 ---- gcc/config/ia64/ia64.h 2007-11-03 22:03:55.000000000 +0100 -*************** enum reg_class -*** 902,908 **** - - /* Define this macro to nonzero if the addresses of local variable slots - are at negative offsets from the frame pointer. */ -! #define FRAME_GROWS_DOWNWARD 0 - - /* Offset from the frame pointer to the first local variable slot to - be allocated. */ ---- 902,908 ---- - - /* Define this macro to nonzero if the addresses of local variable slots - are at negative offsets from the frame pointer. */ -! #define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0) - - /* Offset from the frame pointer to the first local variable slot to - be allocated. */ +--- gcc/config/ia64/ia64.h.orig 2008-02-19 10:55:50.000000000 +0100 ++++ gcc/config/ia64/ia64.h 2009-11-20 13:50:44.000000000 +0100 +@@ -906,7 +906,7 @@ enum reg_class + + /* Define this macro to nonzero if the addresses of local variable slots + are at negative offsets from the frame pointer. */ +-#define FRAME_GROWS_DOWNWARD 0 ++#define FRAME_GROWS_DOWNWARD (flag_stack_protect != 0) + + /* Offset from the frame pointer to the first local variable slot to + be allocated. */ ++++++ gcc41-java-slow_pthread_self.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -3,9 +3,11 @@ * configure.host (slow_pthread_self): Set to empty unconditionally on Linux targets. ---- libjava/configure.host (.../gcc-4_0-branch) (revision 107266) -+++ libjava/configure.host (.../redhat/gcc-4_0-branch) (revision 107414) -@@ -174,6 +174,7 @@ +Index: libjava/configure.host +=================================================================== +--- libjava/configure.host.orig 2008-02-19 10:59:41.000000000 +0100 ++++ libjava/configure.host 2009-11-20 13:50:48.000000000 +0100 +@@ -210,6 +210,7 @@ case "${host}" in sh-linux* | sh[34]*-linux*) can_unwind_signal=yes libgcj_ld_symbolic='-Wl,-Bsymbolic' ++++++ gcc41-ppc32-retaddr.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -6,9 +6,11 @@ * gcc.dg/20051128-1.c: New test. ---- gcc/config/rs6000/rs6000.c.jj 2005-11-26 14:38:01.000000000 +0100 -+++ gcc/config/rs6000/rs6000.c 2005-11-28 20:32:18.000000000 +0100 -@@ -13166,17 +13166,22 @@ rs6000_return_addr (int count, rtx frame +Index: gcc/config/rs6000/rs6000.c +=================================================================== +--- gcc/config/rs6000/rs6000.c.orig 2009-10-19 13:18:19.000000000 +0200 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:50:52.000000000 +0100 +@@ -14833,17 +14833,22 @@ rs6000_return_addr (int count, rtx frame don't try to be too clever here. */ if (count != 0 || (DEFAULT_ABI != ABI_AIX && flag_pic)) { @@ -40,8 +42,10 @@ } cfun->machine->ra_need_lr = 1; ---- gcc/testsuite/gcc.dg/20051128-1.c.jj 2005-10-10 11:21:41.096999000 +0200 -+++ gcc/testsuite/gcc.dg/20051128-1.c 2005-11-28 12:30:57.000000000 +0100 +Index: gcc/testsuite/gcc.dg/20051128-1.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.dg/20051128-1.c 2009-11-20 13:50:52.000000000 +0100 @@ -0,0 +1,41 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -fpic" } */ ++++++ gcc-4.3.4-20090804.tar.bz2 -> gcc-4.3.4-20091019.tar.bz2 ++++++ gcc43/gcc-4.3.4-20090804.tar.bz2 /mounts/work_src_done/STABLE/gcc43/gcc-4.3.4-20091019.tar.bz2 differ: byte 11, line 1 ++++++ gcc43-as-g0 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -16,9 +16,9 @@ Index: gcc/gcc.c =================================================================== ---- gcc/gcc.c (revision 143290) -+++ gcc/gcc.c (working copy) -@@ -669,14 +669,14 @@ proper position among the other output f +--- gcc/gcc.c.orig 2009-11-20 13:50:34.000000000 +0100 ++++ gcc/gcc.c 2009-11-20 13:50:39.000000000 +0100 +@@ -670,14 +670,14 @@ proper position among the other output f && defined(HAVE_AS_GDWARF2_DEBUG_FLAG) && defined(HAVE_AS_GSTABS_DEBUG_FLAG) # define ASM_DEBUG_SPEC \ (PREFERRED_DEBUGGING_TYPE == DBX_DEBUG \ ++++++ gcc43-c++-builtin-redecl.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -7,9 +7,11 @@ * gcc.dg/builtins-65.c: New test. * g++.dg/ext/builtin10.C: New test. ---- gcc/cp/decl.c.jj 2007-10-01 22:11:09.000000000 +0200 -+++ gcc/cp/decl.c 2007-10-02 11:39:46.000000000 +0200 -@@ -1988,23 +1988,21 @@ duplicate_decls (tree newdecl, tree oldd +Index: gcc/cp/decl.c +=================================================================== +--- gcc/cp/decl.c.orig 2009-06-04 13:22:23.000000000 +0200 ++++ gcc/cp/decl.c 2009-11-20 13:50:42.000000000 +0100 +@@ -1995,23 +1995,21 @@ duplicate_decls (tree newdecl, tree oldd DECL_ARGUMENTS (olddecl) = DECL_ARGUMENTS (newdecl); DECL_RESULT (olddecl) = DECL_RESULT (newdecl); } @@ -42,8 +44,10 @@ DECL_RESULT (newdecl) = DECL_RESULT (olddecl); /* Don't clear out the arguments if we're redefining a function. */ if (DECL_ARGUMENTS (olddecl)) ---- gcc/testsuite/gcc.dg/builtins-65.c.jj 2007-10-02 11:23:51.000000000 +0200 -+++ gcc/testsuite/gcc.dg/builtins-65.c 2007-10-02 11:24:12.000000000 +0200 +Index: gcc/testsuite/gcc.dg/builtins-65.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.dg/builtins-65.c 2009-11-20 13:50:42.000000000 +0100 @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ @@ -70,8 +74,10 @@ + +/* { dg-final { scan-assembler "mysnprintf" } } */ +/* { dg-final { scan-assembler-not "__chk_fail" } } */ ---- gcc/testsuite/g++.dg/ext/builtin10.C.jj 2007-10-02 11:19:45.000000000 +0200 -+++ gcc/testsuite/g++.dg/ext/builtin10.C 2007-10-02 11:23:26.000000000 +0200 +Index: gcc/testsuite/g++.dg/ext/builtin10.C +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/g++.dg/ext/builtin10.C 2009-11-20 13:50:42.000000000 +0100 @@ -0,0 +1,27 @@ +// { dg-do compile } +// { dg-options "-O2" } ++++++ gcc43-no-unwind-tables.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -1,8 +1,8 @@ Index: gcc/Makefile.in =================================================================== ---- gcc/Makefile.in.orig -+++ gcc/Makefile.in -@@ -576,6 +576,7 @@ TARGET_LIBGCC2_CFLAGS = +--- gcc/Makefile.in.orig 2009-11-20 13:50:58.000000000 +0100 ++++ gcc/Makefile.in 2009-11-20 13:52:09.000000000 +0100 +@@ -593,6 +593,7 @@ TARGET_LIBGCC2_CFLAGS = CRTSTUFF_CFLAGS = -O2 $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -g0 \ -finhibit-size-directive -fno-inline-functions -fno-exceptions \ -fno-zero-initialized-in-bss -fno-toplevel-reorder -fno-tree-vectorize \ ++++++ gcc43-pr34037.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -10,9 +10,11 @@ * function.c (instantiate_decls): Instantiate also DECL_RTL of vars in cfun->unexpanded_var_list, free that list afterwards. ---- gcc/gimplify.c.jj 2008-09-10 20:50:11.000000000 +0200 -+++ gcc/gimplify.c 2008-09-11 13:54:22.000000000 +0200 -@@ -7105,6 +7105,18 @@ gimplify_type_sizes (tree type, gimple_s +Index: gcc/gimplify.c +=================================================================== +--- gcc/gimplify.c.orig 2009-09-21 11:44:07.000000000 +0200 ++++ gcc/gimplify.c 2009-09-21 11:44:17.000000000 +0200 +@@ -6376,6 +6376,18 @@ gimplify_type_sizes (tree type, tree *li /* These types may not have declarations, so handle them here. */ gimplify_type_sizes (TREE_TYPE (type), list_p); gimplify_type_sizes (TYPE_DOMAIN (type), list_p); @@ -31,9 +33,11 @@ break; case RECORD_TYPE: ---- gcc/cfgexpand.c.jj 2008-09-09 16:08:04.000000000 +0200 -+++ gcc/cfgexpand.c 2008-09-11 15:01:00.000000000 +0200 -@@ -1440,7 +1440,7 @@ estimated_stack_frame_size (void) +Index: gcc/cfgexpand.c +=================================================================== +--- gcc/cfgexpand.c.orig 2009-09-21 11:42:17.000000000 +0200 ++++ gcc/cfgexpand.c 2009-09-21 11:44:17.000000000 +0200 +@@ -1110,7 +1110,7 @@ estimated_stack_frame_size (void) static void expand_used_vars (void) { @@ -42,7 +46,7 @@ /* Compute the phase of the stack frame for this function. */ { -@@ -1453,11 +1453,15 @@ expand_used_vars (void) +@@ -1123,11 +1123,15 @@ expand_used_vars (void) /* At this point all variables on the unexpanded_var_list with TREE_USED set are not associated with any block scope. Lay them out. */ @@ -59,7 +63,7 @@ /* We didn't set a block for static or extern because it's hard to tell the difference between a global variable (re)declared in a local scope, and one that's really declared there to -@@ -1484,9 +1488,25 @@ expand_used_vars (void) +@@ -1154,9 +1158,25 @@ expand_used_vars (void) TREE_USED (var) = 1; if (expand_now) @@ -87,9 +91,11 @@ /* At this point, all variables within the block tree with TREE_USED set are actually used by the optimized function. Lay them out. */ ---- gcc/function.c.jj 2008-09-09 21:13:24.000000000 +0200 -+++ gcc/function.c 2008-09-11 14:56:47.000000000 +0200 -@@ -1645,7 +1645,7 @@ instantiate_decls_1 (tree let) +Index: gcc/function.c +=================================================================== +--- gcc/function.c.orig 2009-09-21 11:42:17.000000000 +0200 ++++ gcc/function.c 2009-09-21 11:44:17.000000000 +0200 +@@ -1659,7 +1659,7 @@ instantiate_decls_1 (tree let) static void instantiate_decls (tree fndecl) { @@ -98,7 +104,7 @@ /* Process all parameters of the function. */ for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl)) -@@ -1661,6 +1661,17 @@ instantiate_decls (tree fndecl) +@@ -1675,6 +1675,17 @@ instantiate_decls (tree fndecl) /* Now process all variables defined in the function or its subblocks. */ instantiate_decls_1 (DECL_INITIAL (fndecl)); ++++++ gcc43-pr36741-revert.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -7,9 +7,11 @@ * g++.dg/other/new-size-type.C: New test. ---- gcc/tree.c (revision 139711) -+++ gcc/tree.c (revision 139710) -@@ -6296,21 +6296,6 @@ int_fits_type_p (const_tree c, const_tre +Index: gcc/tree.c +=================================================================== +--- gcc/tree.c.orig 2009-08-04 12:22:36.000000000 +0200 ++++ gcc/tree.c 2009-11-20 13:50:50.000000000 +0100 +@@ -6305,21 +6305,6 @@ int_fits_type_p (const_tree c, const_tre for "unknown if constant fits", 0 for "constant known *not* to fit" and 1 for "constant known to fit". */ @@ -31,13 +33,11 @@ /* Check if C >= type_low_bound. */ if (type_low_bound && TREE_CODE (type_low_bound) == INTEGER_CST) { ---- gcc/testsuite/g++.dg/other/new-size-type.C (revision 139711) -+++ gcc/testsuite/g++.dg/other/new-size-type.C (revision 139710) -@@ -1,10 +1,10 @@ - // Contributed by Dodji Seketeli <dodji@redhat.com> - // Origin: PR c++/36741 - - #include <stddef.h> +Index: gcc/testsuite/g++.dg/other/new-size-type.C +=================================================================== +--- gcc/testsuite/g++.dg/other/new-size-type.C.orig 2008-11-05 22:19:39.000000000 +0100 ++++ gcc/testsuite/g++.dg/other/new-size-type.C 2009-11-20 13:50:50.000000000 +0100 +@@ -5,6 +5,6 @@ const char* foo() { ++++++ gcc43-pr37189.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -13,9 +13,11 @@ PR c++/37189 * g++.dg/gomp/pr37189.C: New test. ---- gcc/cp/decl2.c (revision 139954) -+++ gcc/cp/decl2.c (revision 139955) -@@ -3776,6 +3776,15 @@ mark_used (tree decl) +Index: gcc/cp/decl2.c +=================================================================== +--- gcc/cp/decl2.c.orig 2009-09-21 11:42:17.000000000 +0200 ++++ gcc/cp/decl2.c 2009-09-21 11:44:36.000000000 +0200 +@@ -3745,6 +3745,15 @@ mark_used (tree decl) /* If we don't need a value, then we don't need to synthesize DECL. */ if (skip_evaluation) return; @@ -31,8 +33,10 @@ /* Normally, we can wait until instantiation-time to synthesize DECL. However, if DECL is a static data member initialized with a constant, we need the value right now because a reference to ---- gcc/cp/decl.c (revision 139954) -+++ gcc/cp/decl.c (revision 139955) +Index: gcc/cp/decl.c +=================================================================== +--- gcc/cp/decl.c.orig 2009-09-21 11:44:13.000000000 +0200 ++++ gcc/cp/decl.c 2009-09-21 11:44:36.000000000 +0200 @@ -227,6 +227,11 @@ struct named_label_entry GTY(()) function, two inside the body of a function in a local class, etc.) */ int function_depth; @@ -45,7 +49,7 @@ /* States indicating how grokdeclarator() should handle declspecs marked with __attribute__((deprecated)). An object declared as __attribute__((deprecated)) suppresses warnings of uses of other -@@ -12033,6 +12038,9 @@ finish_function (int flags) +@@ -11788,6 +11793,9 @@ finish_function (int flags) if (fndecl == NULL_TREE) return error_mark_node; @@ -55,7 +59,7 @@ if (DECL_NONSTATIC_MEMBER_FUNCTION_P (fndecl) && DECL_VIRTUAL_P (fndecl) && !processing_template_decl) -@@ -12232,6 +12240,17 @@ finish_function (int flags) +@@ -11989,6 +11997,17 @@ finish_function (int flags) cxx_pop_function_context and then reset via pop_function_context. */ current_function_decl = NULL_TREE; @@ -73,9 +77,11 @@ return fndecl; }  ---- gcc/cp/cp-tree.h (revision 139954) -+++ gcc/cp/cp-tree.h (revision 139955) -@@ -4381,6 +4381,9 @@ extern void initialize_artificial_var ( +Index: gcc/cp/cp-tree.h +=================================================================== +--- gcc/cp/cp-tree.h.orig 2009-09-21 11:42:17.000000000 +0200 ++++ gcc/cp/cp-tree.h 2009-09-21 11:44:36.000000000 +0200 +@@ -4270,6 +4270,9 @@ extern void initialize_artificial_var ( extern tree check_var_type (tree, tree); extern tree reshape_init (tree, tree); @@ -85,8 +91,10 @@ /* in decl2.c */ extern bool check_java_method (tree); extern tree build_memfn_type (tree, tree, cp_cv_quals); ---- gcc/testsuite/g++.dg/gomp/pr37189.C (revision 0) -+++ gcc/testsuite/g++.dg/gomp/pr37189.C (revision 139955) +Index: gcc/testsuite/g++.dg/gomp/pr37189.C +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/g++.dg/gomp/pr37189.C 2009-09-21 11:44:36.000000000 +0200 @@ -0,0 +1,27 @@ +// PR c++/37189 +// { dg-do compile } ++++++ gcc43-rename-info-files.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -68,8 +68,8 @@ Index: libgomp/libgomp.texi =================================================================== ---- libgomp/libgomp.texi.orig 2007-10-29 12:36:42.000000000 +0100 -+++ libgomp/libgomp.texi 2008-02-08 16:27:44.000000000 +0100 +--- libgomp/libgomp.texi.orig 2008-02-19 10:52:32.000000000 +0100 ++++ libgomp/libgomp.texi 2009-11-20 13:50:58.000000000 +0100 @@ -32,7 +32,7 @@ texts being (a) (see below), and with th @ifinfo @dircategory GNU Libraries @@ -81,8 +81,8 @@ This manual documents the GNU implementation of the OpenMP API for Index: libgomp/Makefile.am =================================================================== ---- libgomp/Makefile.am.orig 2007-12-12 12:01:26.000000000 +0100 -+++ libgomp/Makefile.am 2008-02-08 16:27:44.000000000 +0100 +--- libgomp/Makefile.am.orig 2008-02-19 10:52:32.000000000 +0100 ++++ libgomp/Makefile.am 2009-11-20 13:50:58.000000000 +0100 @@ -91,16 +91,19 @@ endif all-local: $(STAMP_GENINSRC) @@ -110,8 +110,8 @@ MAINTAINERCLEANFILES = $(srcdir)/libgomp.info Index: libgomp/Makefile.in =================================================================== ---- libgomp/Makefile.in.orig 2008-01-08 17:45:56.000000000 +0100 -+++ libgomp/Makefile.in 2008-02-08 16:27:44.000000000 +0100 +--- libgomp/Makefile.in.orig 2008-02-19 10:52:32.000000000 +0100 ++++ libgomp/Makefile.in 2009-11-20 13:50:58.000000000 +0100 @@ -316,7 +316,8 @@ info_TEXINFOS = libgomp.texi # AM_CONDITIONAL on configure check ACX_CHECK_PROG_VER([MAKEINFO]) @@ -146,8 +146,8 @@ # Otherwise a system limit (for SysV at least) may be exceeded. Index: gcc/doc/cpp.texi =================================================================== ---- gcc/doc/cpp.texi.orig 2008-02-04 11:28:51.000000000 +0100 -+++ gcc/doc/cpp.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/doc/cpp.texi.orig 2008-02-19 10:52:38.000000000 +0100 ++++ gcc/doc/cpp.texi 2009-11-20 13:50:58.000000000 +0100 @@ -52,7 +52,7 @@ This manual contains no Invariant Sectio @ifinfo @dircategory Software development @@ -159,8 +159,8 @@ Index: gcc/doc/cppinternals.texi =================================================================== ---- gcc/doc/cppinternals.texi.orig 2007-03-11 13:17:34.000000000 +0100 -+++ gcc/doc/cppinternals.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/doc/cppinternals.texi.orig 2008-02-19 10:52:38.000000000 +0100 ++++ gcc/doc/cppinternals.texi 2009-11-20 13:50:58.000000000 +0100 @@ -7,7 +7,7 @@ @ifinfo @dircategory Software development @@ -172,9 +172,9 @@ Index: gcc/doc/extend.texi =================================================================== ---- gcc/doc/extend.texi.orig 2008-02-04 11:28:51.000000000 +0100 -+++ gcc/doc/extend.texi 2008-02-08 16:27:44.000000000 +0100 -@@ -11497,7 +11497,7 @@ want to write code that checks whether t +--- gcc/doc/extend.texi.orig 2009-04-06 11:32:09.000000000 +0200 ++++ gcc/doc/extend.texi 2009-11-20 13:50:58.000000000 +0100 +@@ -11515,7 +11515,7 @@ want to write code that checks whether t test for the GNU compiler the same way as for C programs: check for a predefined macro @code{__GNUC__}. You can also use @code{__GNUG__} to test specifically for GNU C++ (@pxref{Common Predefined Macros,, @@ -185,8 +185,8 @@ * Volatiles:: What constitutes an access to a volatile object. Index: gcc/doc/gcc.texi =================================================================== ---- gcc/doc/gcc.texi.orig 2008-01-24 17:57:55.000000000 +0100 -+++ gcc/doc/gcc.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/doc/gcc.texi.orig 2008-04-20 23:49:32.000000000 +0200 ++++ gcc/doc/gcc.texi 2009-11-20 13:50:58.000000000 +0100 @@ -65,8 +65,8 @@ included in the section entitled ``GNU F @ifnottex @dircategory Software development @@ -209,8 +209,8 @@ * G++ and GCC:: You can compile C or C++ programs. Index: gcc/doc/gccint.texi =================================================================== ---- gcc/doc/gccint.texi.orig 2007-10-29 14:31:38.000000000 +0100 -+++ gcc/doc/gccint.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/doc/gccint.texi.orig 2009-05-26 12:15:16.000000000 +0200 ++++ gcc/doc/gccint.texi 2009-11-20 13:50:58.000000000 +0100 @@ -51,7 +51,7 @@ included in the section entitled ``GNU F @ifnottex @dircategory Software development @@ -220,7 +220,7 @@ @end direntry This file documents the internals of the GNU compilers. @sp 1 -@@ -83,7 +83,7 @@ write front ends for new languages. It +@@ -83,7 +83,7 @@ write front ends for new languages. It @value{VERSION_PACKAGE} @end ifset version @value{version-GCC}. The use of the GNU compilers is documented in a @@ -231,9 +231,9 @@ This manual is mainly a reference manual rather than a tutorial. It Index: gcc/doc/invoke.texi =================================================================== ---- gcc/doc/invoke.texi.orig 2008-02-07 12:10:09.000000000 +0100 -+++ gcc/doc/invoke.texi 2008-02-08 16:27:44.000000000 +0100 -@@ -7456,7 +7456,7 @@ One of the standard libraries bypassed b +--- gcc/doc/invoke.texi.orig 2009-11-20 13:50:32.000000000 +0100 ++++ gcc/doc/invoke.texi 2009-11-20 13:50:58.000000000 +0100 +@@ -7496,7 +7496,7 @@ One of the standard libraries bypassed b @option{-nodefaultlibs} is @file{libgcc.a}, a library of internal subroutines that GCC uses to overcome shortcomings of particular machines, or special needs for some languages. @@ -242,7 +242,7 @@ Collection (GCC) Internals}, for more discussion of @file{libgcc.a}.) In most cases, you need @file{libgcc.a} even when you want to avoid -@@ -7464,7 +7464,7 @@ other standard libraries. In other word +@@ -7504,7 +7504,7 @@ other standard libraries. In other word or @option{-nodefaultlibs} you should usually specify @option{-lgcc} as well. This ensures that you have no unresolved references to internal GCC library subroutines. (For example, @samp{__main}, used to ensure C++ @@ -251,7 +251,7 @@ GNU Compiler Collection (GCC) Internals}.) @item -pie -@@ -15215,7 +15215,7 @@ Note that you can also specify places to +@@ -15308,7 +15308,7 @@ Note that you can also specify places to @option{-B}, @option{-I} and @option{-L} (@pxref{Directory Options}). These take precedence over places specified using environment variables, which in turn take precedence over those specified by the configuration of GCC@. @@ -260,7 +260,7 @@ GNU Compiler Collection (GCC) Internals}. @table @env -@@ -15370,7 +15370,7 @@ the headers it contains change. +@@ -15463,7 +15463,7 @@ the headers it contains change. A precompiled header file will be searched for when @code{#include} is seen in the compilation. As it searches for the included file @@ -271,8 +271,8 @@ the name specified in the @code{#include} with @samp{.gch} appended. If Index: gcc/doc/libgcc.texi =================================================================== ---- gcc/doc/libgcc.texi.orig 2007-10-29 14:31:38.000000000 +0100 -+++ gcc/doc/libgcc.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/doc/libgcc.texi.orig 2008-02-19 10:52:38.000000000 +0100 ++++ gcc/doc/libgcc.texi 2009-11-20 13:50:58.000000000 +0100 @@ -24,7 +24,7 @@ that needs them. GCC will also generate calls to C library routines, such as @code{memcpy} and @code{memset}, in some cases. The set of routines @@ -284,8 +284,8 @@ mode, not a specific C type. @xref{Machine Modes}, for an explanation Index: gcc/doc/makefile.texi =================================================================== ---- gcc/doc/makefile.texi.orig 2008-02-04 11:28:51.000000000 +0100 -+++ gcc/doc/makefile.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/doc/makefile.texi.orig 2008-02-19 10:52:38.000000000 +0100 ++++ gcc/doc/makefile.texi 2009-11-20 13:50:58.000000000 +0100 @@ -139,7 +139,7 @@ regardless of how it itself was compiled @item profiledbootstrap Builds a compiler with profiling feedback information. For more @@ -297,9 +297,9 @@ Restart a bootstrap, so that everything that was not built with Index: gcc/doc/passes.texi =================================================================== ---- gcc/doc/passes.texi.orig 2008-02-04 11:28:51.000000000 +0100 -+++ gcc/doc/passes.texi 2008-02-08 16:27:44.000000000 +0100 -@@ -191,7 +191,7 @@ rid of it. This pass is located in @fil +--- gcc/doc/passes.texi.orig 2009-05-26 12:15:16.000000000 +0200 ++++ gcc/doc/passes.texi 2009-11-20 13:50:58.000000000 +0100 +@@ -192,7 +192,7 @@ rid of it. This pass is located in @fil @item Mudflap declaration registration If mudflap (@pxref{Optimize Options,,-fmudflap -fmudflapth @@ -310,9 +310,9 @@ those variable declarations that have their addresses taken, or whose Index: gcc/doc/standards.texi =================================================================== ---- gcc/doc/standards.texi.orig 2007-12-12 12:01:27.000000000 +0100 -+++ gcc/doc/standards.texi 2008-02-08 16:27:44.000000000 +0100 -@@ -230,8 +230,8 @@ HTML format. +--- gcc/doc/standards.texi.orig 2008-02-21 13:59:31.000000000 +0100 ++++ gcc/doc/standards.texi 2009-11-20 13:50:58.000000000 +0100 +@@ -231,8 +231,8 @@ HTML format. GNAT Reference Manual}, for information on standard conformance and compatibility of the Ada compiler. @@ -325,8 +325,8 @@ for details of compatibility between @command{gcj} and the Java Platform. Index: gcc/java/Make-lang.in =================================================================== ---- gcc/java/Make-lang.in.orig 2008-02-07 12:10:09.000000000 +0100 -+++ gcc/java/Make-lang.in 2008-02-08 16:27:44.000000000 +0100 +--- gcc/java/Make-lang.in.orig 2009-01-07 11:02:10.000000000 +0100 ++++ gcc/java/Make-lang.in 2009-11-20 13:50:58.000000000 +0100 @@ -127,11 +127,23 @@ java.tags: force etags --include TAGS.sub --include ../TAGS.sub @@ -353,7 +353,7 @@ java.dvi: doc/gcj.dvi JAVA_PDFFILES = doc/gcj.pdf -@@ -187,8 +199,9 @@ java.uninstall: +@@ -188,8 +200,9 @@ java.uninstall: -rm -rf $(DESTDIR)$(man1dir)/gij$(man1ext) -rm -rf $(DESTDIR)$(man1dir)/jv-convert$(man1ext) -rm -rf $(DESTDIR)$(man1dir)/gcj-dbtool$(man1ext) @@ -366,8 +366,8 @@ @$(NORMAL_INSTALL) Index: gcc/java/gcj.texi =================================================================== ---- gcc/java/gcj.texi.orig 2007-12-12 12:01:27.000000000 +0100 -+++ gcc/java/gcj.texi 2008-02-08 17:19:48.000000000 +0100 +--- gcc/java/gcj.texi.orig 2008-04-20 23:49:32.000000000 +0200 ++++ gcc/java/gcj.texi 2009-11-20 13:50:58.000000000 +0100 @@ -56,21 +56,21 @@ man page gfdl(7). @format @dircategory Software development @@ -397,7 +397,7 @@ Analyze Garbage Collector (GC) memory dumps. @end direntry @end format -@@ -152,7 +152,7 @@ and the Info entries for @file{gcj} and +@@ -152,7 +152,7 @@ and the Info entries for @file{gcj} and As @command{gcj} is just another front end to @command{gcc}, it supports many of the same options as gcc. @xref{Option Summary, , Option Summary, @@ -408,8 +408,8 @@ @c man end Index: gcc/fortran/Make-lang.in =================================================================== ---- gcc/fortran/Make-lang.in.orig 2008-02-07 12:10:11.000000000 +0100 -+++ gcc/fortran/Make-lang.in 2008-02-08 16:27:44.000000000 +0100 +--- gcc/fortran/Make-lang.in.orig 2009-01-07 11:02:13.000000000 +0100 ++++ gcc/fortran/Make-lang.in 2009-11-20 13:50:58.000000000 +0100 @@ -112,7 +112,8 @@ fortran.tags: force cd $(srcdir)/fortran; etags -o TAGS.sub *.c *.h; \ etags --include TAGS.sub --include ../TAGS.sub @@ -420,7 +420,7 @@ fortran.dvi: doc/gfortran.dvi doc/gfc-internals.dvi fortran.html: $(build_htmldir)/gfortran/index.html -@@ -154,10 +155,10 @@ GFORTRAN_TEXI = \ +@@ -161,10 +162,10 @@ GFORTRAN_TEXI = \ $(srcdir)/doc/include/gcc-common.texi \ gcc-vers.texi @@ -433,7 +433,7 @@ -o $@ $<; \ else true; fi -@@ -225,7 +226,7 @@ fortran.install-common: install-finclude +@@ -232,7 +233,7 @@ fortran.install-common: install-finclude fi ; \ fi @@ -442,7 +442,7 @@ fortran.install-man: $(DESTDIR)$(man1dir)/$(GFORTRAN_INSTALL_NAME)$(man1ext) -@@ -243,7 +244,7 @@ fortran.uninstall: +@@ -250,7 +251,7 @@ fortran.uninstall: rm -rf $(DESTDIR)$(bindir)/$(GFORTRAN_INSTALL_NAME)$(exeext); \ rm -rf $(DESTDIR)$(man1dir)/$(GFORTRAN_INSTALL_NAME)$(man1ext); \ rm -rf $(DESTDIR)$(bindir)/$(GFORTRAN_TARGET_INSTALL_NAME)$(exeext); \ @@ -453,8 +453,8 @@ # Clean hooks: Index: gcc/fortran/gfortran.texi =================================================================== ---- gcc/fortran/gfortran.texi.orig 2008-01-25 16:49:43.000000000 +0100 -+++ gcc/fortran/gfortran.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/fortran/gfortran.texi.orig 2008-04-20 23:49:34.000000000 +0200 ++++ gcc/fortran/gfortran.texi 2009-11-20 13:50:58.000000000 +0100 @@ -102,7 +102,7 @@ texts being (a) (see below), and with th @ifinfo @dircategory Software development @@ -466,8 +466,8 @@ the GNU Fortran compiler, (@command{gfortran}). Index: gcc/treelang/Make-lang.in =================================================================== ---- gcc/treelang/Make-lang.in.orig 2008-02-07 12:10:11.000000000 +0100 -+++ gcc/treelang/Make-lang.in 2008-02-08 16:27:44.000000000 +0100 +--- gcc/treelang/Make-lang.in.orig 2008-02-19 10:55:22.000000000 +0100 ++++ gcc/treelang/Make-lang.in 2009-11-20 13:50:58.000000000 +0100 @@ -153,9 +153,12 @@ treelang.tags: force cd $(srcdir)/treelang; etags -o TAGS.sub *.y *.l *.c *.h; \ etags --include TAGS.sub --include ../TAGS.sub @@ -513,8 +513,8 @@ # Index: gcc/treelang/treelang.texi =================================================================== ---- gcc/treelang/treelang.texi.orig 2007-10-29 14:33:20.000000000 +0100 -+++ gcc/treelang/treelang.texi 2008-02-08 16:27:44.000000000 +0100 +--- gcc/treelang/treelang.texi.orig 2008-02-19 10:55:22.000000000 +0100 ++++ gcc/treelang/treelang.texi 2009-11-20 13:50:58.000000000 +0100 @@ -107,7 +107,7 @@ texts being (a) (see below), and with th @ifnottex @dircategory Software development @@ -544,9 +544,9 @@ by the GCC compiler (@code{gcc}). Index: gcc/Makefile.in =================================================================== ---- gcc/Makefile.in.orig 2008-02-08 16:27:44.000000000 +0100 -+++ gcc/Makefile.in 2008-02-08 17:18:23.000000000 +0100 -@@ -3617,8 +3617,27 @@ stmp-install-fixproto: fixproto +--- gcc/Makefile.in.orig 2009-11-20 13:50:56.000000000 +0100 ++++ gcc/Makefile.in 2009-11-20 13:50:58.000000000 +0100 +@@ -3638,8 +3638,27 @@ stmp-install-fixproto: fixproto doc: $(BUILD_INFO) $(GENERATED_MANPAGES) gccbug @@ -576,7 +576,7 @@ info: $(INFOFILES) lang.info @GENINSRC@ srcinfo lang.srcinfo -@@ -3668,21 +3687,41 @@ gcc-vers.texi: $(BASEVER) $(DEVPHASE) +@@ -3689,21 +3708,41 @@ gcc-vers.texi: $(BASEVER) $(DEVPHASE) # patterns. To use them, put each of the specific targets with its # specific dependencies but no build commands. @@ -625,7 +625,7 @@ -I $(gcc_docdir)/include -o $@ $<; \ fi -@@ -3990,11 +4029,11 @@ install-driver: installdirs xgcc$(exeext +@@ -4014,11 +4053,11 @@ install-driver: installdirs xgcc$(exeext # $(INSTALL_DATA) might be a relative pathname, so we can't cd into srcdir # to do the install. install-info:: doc installdirs \ @@ -642,7 +642,7 @@ lang.install-info $(DESTDIR)$(infodir)/%.info: doc/%.info installdirs -@@ -4195,8 +4234,11 @@ uninstall: lang.uninstall +@@ -4219,8 +4258,11 @@ uninstall: lang.uninstall -rm -rf $(DESTDIR)$(man1dir)/cpp$(man1ext) -rm -rf $(DESTDIR)$(man1dir)/protoize$(man1ext) -rm -rf $(DESTDIR)$(man1dir)/unprotoize$(man1ext) @@ -658,8 +658,8 @@ # contains global variables that all the testsuites will use. Index: gcc/doc/install.texi =================================================================== ---- gcc/doc/install.texi.orig 2008-01-30 11:21:55.000000000 +0100 -+++ gcc/doc/install.texi 2008-02-08 16:29:13.000000000 +0100 +--- gcc/doc/install.texi.orig 2009-09-21 11:57:58.000000000 +0200 ++++ gcc/doc/install.texi 2009-11-20 13:50:58.000000000 +0100 @@ -96,7 +96,7 @@ Free Documentation License}''. @end ifinfo @dircategory Software development @@ -671,8 +671,8 @@ @c Part 3 Titlepage and Copyright Index: gcc/ada/gnat-style.texi =================================================================== ---- gcc/ada/gnat-style.texi.orig 2007-10-29 12:59:35.000000000 +0100 -+++ gcc/ada/gnat-style.texi 2008-02-08 17:15:59.000000000 +0100 +--- gcc/ada/gnat-style.texi.orig 2008-02-19 10:55:03.000000000 +0100 ++++ gcc/ada/gnat-style.texi 2009-11-20 13:50:58.000000000 +0100 @@ -31,7 +31,7 @@ @dircategory Software development @@ -684,8 +684,8 @@ @macro syntax{element} Index: gcc/ada/gnat_rm.texi =================================================================== ---- gcc/ada/gnat_rm.texi.orig 2008-01-02 11:19:07.000000000 +0100 -+++ gcc/ada/gnat_rm.texi 2008-02-08 17:15:12.000000000 +0100 +--- gcc/ada/gnat_rm.texi.orig 2008-02-19 10:55:03.000000000 +0100 ++++ gcc/ada/gnat_rm.texi 2009-11-20 13:50:58.000000000 +0100 @@ -30,7 +30,7 @@ @dircategory GNU Ada tools @@ -697,8 +697,8 @@ @copying Index: gcc/ada/gnat_ugn.texi =================================================================== ---- gcc/ada/gnat_ugn.texi.orig 2008-01-02 11:19:08.000000000 +0100 -+++ gcc/ada/gnat_ugn.texi 2008-02-08 17:15:37.000000000 +0100 +--- gcc/ada/gnat_ugn.texi.orig 2008-02-19 10:55:05.000000000 +0100 ++++ gcc/ada/gnat_ugn.texi 2009-11-20 13:50:58.000000000 +0100 @@ -96,7 +96,7 @@ @ifset unw ++++++ gcc43-textdomain.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -24,9 +24,11 @@ exit 0 ---- gcc/Makefile.in.orig 2005-09-04 23:32:54.003440040 +0000 -+++ gcc/Makefile.in 2005-09-04 23:40:10.954013456 +0000 -@@ -4565,8 +4565,8 @@ +Index: gcc/Makefile.in +=================================================================== +--- gcc/Makefile.in.orig 2009-11-20 13:50:07.000000000 +0100 ++++ gcc/Makefile.in 2009-11-20 13:50:56.000000000 +0100 +@@ -4579,8 +4579,8 @@ install-po: dir=$(localedir)/$$lang/LC_MESSAGES; \ echo $(mkinstalldirs) $(DESTDIR)$$dir; \ $(mkinstalldirs) $(DESTDIR)$$dir || exit 1; \ @@ -37,9 +39,11 @@ done # Rule for regenerating the message template (gcc.pot). ---- gcc/intl.c.orig 2005-09-04 23:32:54.006439584 +0000 -+++ gcc/intl.c 2005-09-04 23:36:37.933397512 +0000 -@@ -51,8 +51,8 @@ +Index: gcc/intl.c +=================================================================== +--- gcc/intl.c.orig 2008-02-19 10:56:00.000000000 +0100 ++++ gcc/intl.c 2009-11-20 13:50:56.000000000 +0100 +@@ -50,8 +50,8 @@ gcc_init_libintl (void) setlocale (LC_ALL, ""); #endif @@ -50,9 +54,11 @@ /* Opening quotation mark. */ open_quote = _("`"); ---- libcpp/Makefile.in.orig 2005-09-04 23:32:54.009439128 +0000 -+++ libcpp/Makefile.in 2005-09-04 23:33:24.607787472 +0000 -@@ -47,6 +47,7 @@ +Index: libcpp/Makefile.in +=================================================================== +--- libcpp/Makefile.in.orig 2008-02-19 10:59:44.000000000 +0100 ++++ libcpp/Makefile.in 2009-11-20 13:50:56.000000000 +0100 +@@ -47,6 +47,7 @@ LDFLAGS = @LDFLAGS@ LIBICONV = @LIBICONV@ LIBINTL = @LIBINTL@ PACKAGE = @PACKAGE@ @@ -60,7 +66,7 @@ RANLIB = @RANLIB@ SHELL = @SHELL@ USED_CATALOGS = @USED_CATALOGS@ -@@ -66,6 +67,7 @@ +@@ -66,6 +67,7 @@ depcomp = $(SHELL) $(srcdir)/../depcomp INCLUDES = -I$(srcdir) -I. -I$(srcdir)/../include @INCINTL@ \ -I$(srcdir)/include @@ -68,7 +74,7 @@ ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) -@@ -156,8 +158,8 @@ +@@ -156,8 +158,8 @@ install-strip install: all installdirs else continue; \ fi; \ dir=$(localedir)/$$lang/LC_MESSAGES; \ @@ -79,9 +85,11 @@ done mostlyclean: ---- libcpp/system.h.orig 2005-09-04 23:32:54.006439584 +0000 -+++ libcpp/system.h 2005-09-04 23:33:24.606787624 +0000 -@@ -260,7 +260,7 @@ +Index: libcpp/system.h +=================================================================== +--- libcpp/system.h.orig 2008-02-19 10:59:44.000000000 +0100 ++++ libcpp/system.h 2009-11-20 13:50:56.000000000 +0100 +@@ -260,7 +260,7 @@ extern int errno; #endif #ifndef _ @@ -90,9 +98,11 @@ #endif #ifndef N_ ---- libcpp/init.c.orig 2005-09-04 23:32:54.008439280 +0000 -+++ libcpp/init.c 2005-09-04 23:33:24.607787472 +0000 -@@ -122,7 +122,7 @@ +Index: libcpp/init.c +=================================================================== +--- libcpp/init.c.orig 2008-02-19 10:59:44.000000000 +0100 ++++ libcpp/init.c 2009-11-20 13:50:56.000000000 +0100 +@@ -130,7 +130,7 @@ init_library (void) init_trigraph_map (); #ifdef ENABLE_NLS ++++++ gcc43-x86_64-va_start.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -21,9 +21,11 @@ * gcc.target/i386/amd64-abi-5.c: Likewise. * gcc.target/i386/amd64-abi-6.c: Likewise. ---- gcc/config/i386/i386.h (revision 139909) -+++ gcc/config/i386/i386.h (revision 139910) -@@ -2440,7 +2440,8 @@ struct machine_function GTY(()) +Index: gcc/config/i386/i386.h +=================================================================== +--- gcc/config/i386/i386.h.orig 2009-06-24 16:46:59.000000000 +0200 ++++ gcc/config/i386/i386.h 2009-11-20 13:50:54.000000000 +0100 +@@ -2441,7 +2441,8 @@ struct machine_function GTY(()) struct stack_local_entry *stack_locals; const char *some_ld_name; rtx force_align_arg_pointer; @@ -33,7 +35,7 @@ int accesses_prev_frame; int optimize_mode_switching[MAX_386_ENTITIES]; int needs_cld; -@@ -2463,7 +2464,8 @@ struct machine_function GTY(()) +@@ -2464,7 +2465,8 @@ struct machine_function GTY(()) }; #define ix86_stack_locals (cfun->machine->stack_locals) @@ -43,8 +45,10 @@ #define ix86_optimize_mode_switching (cfun->machine->optimize_mode_switching) #define ix86_current_function_needs_cld (cfun->machine->needs_cld) #define ix86_tls_descriptor_calls_expanded_in_cfun \ ---- gcc/config/i386/i386.c (revision 139909) -+++ gcc/config/i386/i386.c (revision 139910) +Index: gcc/config/i386/i386.c +=================================================================== +--- gcc/config/i386/i386.c.orig 2009-11-20 13:50:24.000000000 +0100 ++++ gcc/config/i386/i386.c 2009-11-20 13:50:54.000000000 +0100 @@ -1616,9 +1616,6 @@ rtx ix86_compare_op0 = NULL_RTX; rtx ix86_compare_op1 = NULL_RTX; rtx ix86_compare_emitted = NULL_RTX; @@ -55,7 +59,7 @@ /* Define the structure for the machine field in struct function. */ struct stack_local_entry GTY(()) -@@ -4976,11 +4973,22 @@ setup_incoming_varargs_64 (CUMULATIVE_AR +@@ -4999,11 +4996,22 @@ setup_incoming_varargs_64 (CUMULATIVE_AR alias_set_type set; int i; @@ -81,7 +85,7 @@ /* We need 16-byte stack alignment to save SSE registers. If user asked for lower preferred_stack_boundary, lets just hope that he knows what he is doing and won't varargs SSE values. -@@ -5006,7 +5014,7 @@ setup_incoming_varargs_64 (CUMULATIVE_AR +@@ -5029,7 +5037,7 @@ setup_incoming_varargs_64 (CUMULATIVE_AR x86_64_int_parameter_registers[i])); } @@ -90,7 +94,7 @@ { /* Now emit code to save SSE registers. The AX parameter contains number of SSE parameter registers used to call this function. We use -@@ -5041,7 +5049,7 @@ setup_incoming_varargs_64 (CUMULATIVE_AR +@@ -5064,7 +5072,7 @@ setup_incoming_varargs_64 (CUMULATIVE_AR tmp_reg = gen_reg_rtx (Pmode); emit_insn (gen_rtx_SET (VOIDmode, tmp_reg, plus_constant (save_area, @@ -99,7 +103,7 @@ mem = gen_rtx_MEM (BLKmode, plus_constant (tmp_reg, -127)); MEM_NOTRAP_P (mem) = 1; set_mem_alias_set (mem, set); -@@ -5145,7 +5153,7 @@ ix86_va_start (tree valist, rtx nextarg) +@@ -5168,7 +5176,7 @@ ix86_va_start (tree valist, rtx nextarg) expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); } @@ -108,7 +112,7 @@ { type = TREE_TYPE (fpr); t = build2 (GIMPLE_MODIFY_STMT, type, fpr, -@@ -5164,12 +5172,15 @@ ix86_va_start (tree valist, rtx nextarg) +@@ -5187,12 +5195,15 @@ ix86_va_start (tree valist, rtx nextarg) TREE_SIDE_EFFECTS (t) = 1; expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); @@ -125,7 +129,7 @@ t = build2 (GIMPLE_MODIFY_STMT, type, sav, t); TREE_SIDE_EFFECTS (t) = 1; expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); -@@ -6079,13 +6090,8 @@ ix86_compute_frame_layout (struct ix86_f +@@ -6104,13 +6115,8 @@ ix86_compute_frame_layout (struct ix86_f offset += frame->nregs * UNITS_PER_WORD; /* Va-arg area */ @@ -141,8 +145,10 @@ /* Align start of frame for local function. */ frame->padding1 = ((offset + stack_alignment_needed - 1) ---- gcc/testsuite/gcc.target/i386/amd64-abi-3.c (revision 0) -+++ gcc/testsuite/gcc.target/i386/amd64-abi-3.c (revision 139910) +Index: gcc/testsuite/gcc.target/i386/amd64-abi-3.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/i386/amd64-abi-3.c 2009-11-20 13:50:54.000000000 +0100 @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ @@ -162,8 +168,10 @@ + foo (va_arglist); + va_end (va_arglist); +} ---- gcc/testsuite/gcc.target/i386/amd64-abi-5.c (revision 0) -+++ gcc/testsuite/gcc.target/i386/amd64-abi-5.c (revision 139910) +Index: gcc/testsuite/gcc.target/i386/amd64-abi-5.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/i386/amd64-abi-5.c 2009-11-20 13:50:54.000000000 +0100 @@ -0,0 +1,64 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ @@ -229,8 +237,10 @@ + assert (n10 == e10); + return 0; +} ---- gcc/testsuite/gcc.target/i386/amd64-abi-4.c (revision 0) -+++ gcc/testsuite/gcc.target/i386/amd64-abi-4.c (revision 139910) +Index: gcc/testsuite/gcc.target/i386/amd64-abi-4.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/i386/amd64-abi-4.c 2009-11-20 13:50:54.000000000 +0100 @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ @@ -279,8 +289,10 @@ + assert (n4 == e4); + return 0; +} ---- gcc/testsuite/gcc.target/i386/amd64-abi-6.c (revision 0) -+++ gcc/testsuite/gcc.target/i386/amd64-abi-6.c (revision 139910) +Index: gcc/testsuite/gcc.target/i386/amd64-abi-6.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/i386/amd64-abi-6.c 2009-11-20 13:50:54.000000000 +0100 @@ -0,0 +1,71 @@ +/* { dg-do run } */ +/* { dg-require-effective-target lp64 } */ ++++++ gcc-dir-version.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -1,133 +1,83 @@ Index: gcc/Makefile.in =================================================================== -*** gcc/Makefile.in (revision 130135) ---- gcc/Makefile.in (working copy) -*************** GTM_H = tm.h $(tm_file_list) -*** 726,737 **** - TM_H = $(GTM_H) insn-constants.h insn-flags.h options.h - - # Variables for version information. -! BASEVER := $(srcdir)/BASE-VER # 4.x.y - DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" - DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty - REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] - - BASEVER_c := $(shell cat $(BASEVER)) - DEVPHASE_c := $(shell cat $(DEVPHASE)) - DATESTAMP_c := $(shell cat $(DATESTAMP)) - ---- 726,739 ---- - TM_H = $(GTM_H) insn-constants.h insn-flags.h options.h - - # Variables for version information. -! BASEVER := $(srcdir)/BASE-VER # 4.x -! FULLVER := $(srcdir)/FULL-VER # 4.x.y - DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" - DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty - REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] - - BASEVER_c := $(shell cat $(BASEVER)) -+ FULLVER_c := $(shell cat $(FULLVER)) - DEVPHASE_c := $(shell cat $(DEVPHASE)) - DATESTAMP_c := $(shell cat $(DATESTAMP)) - -*************** version := $(BASEVER_c) -*** 749,754 **** ---- 751,757 ---- - # (i.e. if DEVPHASE_c is empty). The space immediately after the - # comma in the $(if ...) constructs is significant - do not remove it. - BASEVER_s := "\"$(BASEVER_c)\"" -+ FULLVER_s := "\"$(FULLVER_c)\"" - DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" - DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" - PKGVERSION_s:= "\"@PKGVERSION@\"" -*************** gcc-options.o: options.c $(CONFIG_H) $(S -*** 1912,1923 **** - dumpvers: dumpvers.c - - ifdef REVISION_s -! version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) - else -! version.o: version.c version.h $(DATESTAMP) $(BASEVER) $(DEVPHASE) - endif - $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) \ -! -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ - -DREVISION=$(REVISION_s) \ - -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ - -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) ---- 1915,1926 ---- - dumpvers: dumpvers.c - - ifdef REVISION_s -! version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) - else -! version.o: version.c version.h $(DATESTAMP) $(FULLVER) $(DEVPHASE) - endif - $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) \ -! -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ - -DREVISION=$(REVISION_s) \ - -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ - -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) +--- gcc/Makefile.in.orig 2009-05-26 12:15:16.000000000 +0200 ++++ gcc/Makefile.in 2009-11-20 13:50:02.000000000 +0100 +@@ -747,12 +747,14 @@ GTM_H = tm.h $(tm_file_list) + TM_H = $(GTM_H) insn-constants.h insn-flags.h options.h + + # Variables for version information. +-BASEVER := $(srcdir)/BASE-VER # 4.x.y ++BASEVER := $(srcdir)/BASE-VER # 4.x ++FULLVER := $(srcdir)/FULL-VER # 4.x.y + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] + + BASEVER_c := $(shell cat $(BASEVER)) ++FULLVER_c := $(shell cat $(FULLVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) + +@@ -770,6 +772,7 @@ version := $(BASEVER_c) + # (i.e. if DEVPHASE_c is empty). The space immediately after the + # comma in the $(if ...) constructs is significant - do not remove it. + BASEVER_s := "\"$(BASEVER_c)\"" ++FULLVER_s := "\"$(FULLVER_c)\"" + DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" +@@ -1933,12 +1936,12 @@ gcc-options.o: options.c $(CONFIG_H) $(S + dumpvers: dumpvers.c + + ifdef REVISION_s +-version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + else +-version.o: version.c version.h $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(DATESTAMP) $(FULLVER) $(DEVPHASE) + endif + $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) \ +- -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++ -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) Index: libjava/Makefile.am =================================================================== -*** libjava/Makefile.am (revision 130144) ---- libjava/Makefile.am (working copy) -*************** endif BUILD_ECJ1 -*** 473,479 **** - install-data-local: - $(PRE_INSTALL) - ## Install the .pc file. -! @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ - file="libgcj-$${pc_version}.pc"; \ - $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ - echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ ---- 473,479 ---- - install-data-local: - $(PRE_INSTALL) - ## Install the .pc file. -! @pc_version=`echo $(GCJVERSION)`; \ - file="libgcj-$${pc_version}.pc"; \ - $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ - echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +--- libjava/Makefile.am.orig 2009-06-25 11:55:13.000000000 +0200 ++++ libjava/Makefile.am 2009-11-20 13:50:02.000000000 +0100 +@@ -481,7 +481,7 @@ endif BUILD_ECJ1 + install-data-local: + $(PRE_INSTALL) + ## Install the .pc file. +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=`echo $(GCJVERSION)`; \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ Index: libjava/Makefile.in =================================================================== -*** libjava/Makefile.in (revision 130144) ---- libjava/Makefile.in (working copy) -*************** install-exec-hook: install-toolexeclibLT -*** 11878,11884 **** - - install-data-local: - $(PRE_INSTALL) -! @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ - file="libgcj-$${pc_version}.pc"; \ - $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ - echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ ---- 11878,11884 ---- - - install-data-local: - $(PRE_INSTALL) -! @pc_version=`echo $(GCJVERSION)`; \ - file="libgcj-$${pc_version}.pc"; \ - $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ - echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +--- libjava/Makefile.in.orig 2009-07-14 12:35:52.000000000 +0200 ++++ libjava/Makefile.in 2009-11-20 13:50:02.000000000 +0100 +@@ -11891,7 +11891,7 @@ install-exec-hook: install-binPROGRAMS i + + install-data-local: + $(PRE_INSTALL) +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=`echo $(GCJVERSION)`; \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ Index: libjava/testsuite/lib/libjava.exp =================================================================== -*** libjava/testsuite/lib/libjava.exp (revision 131902) ---- libjava/testsuite/lib/libjava.exp (working copy) -*************** proc libjava_init { args } { -*** 168,174 **** - - set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] - regexp " version \[^\n\r\]*" $text version -! set libjava_version [lindex $version 1] - - verbose "version: $libjava_version" - ---- 168,174 ---- - - set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] - regexp " version \[^\n\r\]*" $text version -! set libjava_version 4.3 - - verbose "version: $libjava_version" - +--- libjava/testsuite/lib/libjava.exp.orig 2008-03-05 21:46:42.000000000 +0100 ++++ libjava/testsuite/lib/libjava.exp 2009-11-20 13:50:02.000000000 +0100 +@@ -168,7 +168,7 @@ proc libjava_init { args } { + + set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] + regexp " version \[^\n\r\]*" $text version +- set libjava_version [lindex $version 1] ++ set libjava_version 4.3 + + verbose "version: $libjava_version" + ++++++ gcc-noalias-warn.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -1,11 +1,8 @@ Index: boehm-gc/finalize.c =================================================================== -RCS file: /cvs/gcc/gcc/boehm-gc/finalize.c,v -retrieving revision 1.11.28.1 -diff -u -p -r1.11.28.1 finalize.c ---- boehm-gc/finalize.c 24 Jan 2004 11:05:54 -0000 1.11.28.1 -+++ boehm-gc/finalize.c 9 Feb 2004 16:07:25 -0000 -@@ -164,6 +164,7 @@ signed_word * log_size_ptr; +--- boehm-gc/finalize.c.orig 2008-02-19 10:56:53.000000000 +0100 ++++ boehm-gc/finalize.c 2009-11-20 13:50:09.000000000 +0100 +@@ -165,6 +165,7 @@ signed_word * log_size_ptr; int index; struct disappearing_link * new_dl; DCL_LOCK_STATE; @@ -13,7 +10,7 @@ if ((word)link & (ALIGNMENT-1)) ABORT("Bad arg to GC_general_register_disappearing_link"); -@@ -176,7 +177,7 @@ signed_word * log_size_ptr; +@@ -177,7 +178,7 @@ signed_word * log_size_ptr; # ifndef THREADS DISABLE_SIGNALS(); # endif @@ -22,7 +19,7 @@ &log_dl_table_size); # ifdef CONDPRINT if (GC_print_stats) { -@@ -339,6 +340,7 @@ finalization_mark_proc * mp; +@@ -348,6 +349,7 @@ finalization_mark_proc * mp; struct finalizable_object *new_fo; hdr *hhdr; DCL_LOCK_STATE; @@ -30,7 +27,7 @@ # ifdef THREADS DISABLE_SIGNALS(); -@@ -349,7 +351,7 @@ finalization_mark_proc * mp; +@@ -358,7 +360,7 @@ finalization_mark_proc * mp; # ifndef THREADS DISABLE_SIGNALS(); # endif ++++++ gcc-power7-sles-11sp1.patch02a ++++++ ++++ 24279 lines (skipped) ++++++ gcc-power7-sles-11sp1.patch02c ++++++ 2009-10-15 Michael Meissner <meissner@linux.vnet.ibm.com> Pat Haugen <pthaugen@us.ibm.com> Revital Eres <ERES@il.ibm.com> Peter Bergner <bergner@vnet.ibm.com> Backport rs6000 changes from GCC 4.5 mainline to 4.3 that includes improved support for vector misalignment. 2009-09-17 Revital Eres <eres@il.ibm.com> * doc/tm.texi (TARGET_SUPPORT_VECTOR_MISALIGNMENT): Document. * targhooks.c (default_builtin_support_vector_misalignment): New builtin function. * targhooks.h (default_builtin_support_vector_misalignment): Declare. * target.h (builtin_support_vector_misalignment): New field in struct gcc_target. * tree-vectorizer.c (vect_supportable_dr_alignment): Call new builtin function. * target-def.h (TARGET_SUPPORT_VECTOR_MISALIGNMENT): Define. diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/target-def.h sles-11sp1/gcc/target-def.h --- sles-11sp1-orig/gcc/target-def.h 2008-06-30 07:54:13.000000000 -0400 +++ sles-11sp1/gcc/target-def.h 2009-10-13 13:01:47.000000000 -0400 @@ -364,6 +364,8 @@ #define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST 0 #define TARGET_VECTOR_ALIGNMENT_REACHABLE \ default_builtin_vector_alignment_reachable +#define TARGET_SUPPORT_VECTOR_MISALIGNMENT \ + default_builtin_support_vector_misalignment #define TARGET_VECTORIZE \ { \ @@ -373,7 +375,8 @@ TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN, \ TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD, \ TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST, \ - TARGET_VECTOR_ALIGNMENT_REACHABLE \ + TARGET_VECTOR_ALIGNMENT_REACHABLE, \ + TARGET_SUPPORT_VECTOR_MISALIGNMENT \ } #define TARGET_DEFAULT_TARGET_FLAGS 0 diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/target.h sles-11sp1/gcc/target.h --- sles-11sp1-orig/gcc/target.h 2008-06-30 07:54:12.000000000 -0400 +++ sles-11sp1/gcc/target.h 2009-10-13 13:00:59.000000000 -0400 @@ -438,6 +438,11 @@ struct gcc_target /* Return true if vector alignment is reachable (by peeling N iterations) for the given type. */ bool (* vector_alignment_reachable) (const_tree, bool); + /* Return true if the target supports misaligned store/load of a + specific factor denoted in the third parameter. The last parameter + is true if the access is defined in a packed struct. */ + bool (* builtin_support_vector_misalignment) (enum machine_mode, + const_tree, int, bool); } vectorize; /* The initial value of target_flags. */ diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/targhooks.c sles-11sp1/gcc/targhooks.c --- sles-11sp1-orig/gcc/targhooks.c 2008-06-30 07:54:12.000000000 -0400 +++ sles-11sp1/gcc/targhooks.c 2009-10-13 13:00:36.000000000 -0400 @@ -691,6 +691,23 @@ tree default_mangle_decl_assembler_name return id; } +/* By default, assume that a target supports any factor of misalignment + memory access if it supports movmisalign patten. + is_packed is true if the memory access is defined in a packed struct. */ +bool +default_builtin_support_vector_misalignment (enum machine_mode mode, + const_tree type + ATTRIBUTE_UNUSED, + int misalignment + ATTRIBUTE_UNUSED, + bool is_packed + ATTRIBUTE_UNUSED) +{ + if (optab_handler (movmisalign_optab, mode)->insn_code != CODE_FOR_nothing) + return true; + return false; +} + bool default_builtin_vector_alignment_reachable (const_tree type, bool is_packed) { diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/targhooks.h sles-11sp1/gcc/targhooks.h --- sles-11sp1-orig/gcc/targhooks.h 2008-06-30 07:54:12.000000000 -0400 +++ sles-11sp1/gcc/targhooks.h 2009-10-13 13:00:47.000000000 -0400 @@ -70,6 +70,10 @@ extern tree default_builtin_vectorized_c extern tree default_builtin_reciprocal (enum built_in_function, bool, bool); extern bool default_builtin_vector_alignment_reachable (const_tree, bool); +extern bool +default_builtin_support_vector_misalignment (enum machine_mode mode, + const_tree, + int, bool); /* These are here, and not in hooks.[ch], because not all users of hooks.h include tm.h, and thus we don't have CUMULATIVE_ARGS. */ diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/tree-vectorizer.c sles-11sp1/gcc/tree-vectorizer.c --- sles-11sp1-orig/gcc/tree-vectorizer.c 2009-10-09 17:11:06.000000000 -0400 +++ sles-11sp1/gcc/tree-vectorizer.c 2009-10-13 13:01:17.000000000 -0400 @@ -1938,6 +1938,9 @@ vect_supportable_dr_alignment (struct da if (DR_IS_READ (dr)) { + bool is_packed = false; + tree type = (TREE_TYPE (DR_REF (dr))); + if (optab_handler (vec_realign_load_optab, mode)->insn_code != CODE_FOR_nothing && (!targetm.vectorize.builtin_mask_for_load @@ -1949,9 +1952,17 @@ vect_supportable_dr_alignment (struct da else return dr_explicit_realign_optimized; } + if (!known_alignment_for_access_p (dr)) + { + tree ba = DR_BASE_OBJECT (dr); + + if (ba) + is_packed = contains_packed_reference (ba); + } - if (optab_handler (movmisalign_optab, mode)->insn_code != - CODE_FOR_nothing) + if (targetm.vectorize. + builtin_support_vector_misalignment (mode, type, + DR_MISALIGNMENT (dr), is_packed)) /* Can't software pipeline the loads, but can at least do them. */ return dr_unaligned_supported; } diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/doc/tm.texi sles-11sp1/gcc/doc/tm.texi --- sles-11sp1-orig/gcc/doc/tm.texi 2009-10-09 17:15:53.000000000 -0400 +++ sles-11sp1/gcc/doc/tm.texi 2009-10-13 13:00:13.000000000 -0400 @@ -5541,6 +5541,14 @@ the vectorized function shall be of vect argument types should be @var{vec_type_in}. @end deftypefn +@deftypefn {Target Hook} bool TARGET_SUPPORT_VECTOR_MISALIGNMENT (enum machine_mode @var{mode}, tree @var{type}, int @var{misalignment}, bool @var{is_packed}) +This hook should return true if the target supports misaligned vector +store/load of a specific factor denoted in the @var{misalignment} +parameter. The vector store/load should be of machine mode @var{mode} and +the elements in the vectors should be of type @var{type}. @var{is_packed} +parameter is true if the memory access is defined in a packed struct. +@end deftypefn + @node Anchored Addresses @section Anchored Addresses @cindex anchored addresses ++++++ gcc-power7-sles-11sp1.patch02d ++++++ ++++ 1799 lines (skipped) ++++++ gcc-power7-sles-11sp1.patch02e ++++++ 2009-10-15 Michael Meissner <meissner@linux.vnet.ibm.com> Pat Haugen <pthaugen@us.ibm.com> Revital Eres <ERES@il.ibm.com> Peter Bergner <bergner@vnet.ibm.com> Backport rs6000 changes from GCC 4.5 mainline to 4.3 that fixes some problems that show up with vectorization. 2009-06-05 Michael Meissner <meissner@linux.vnet.ibm.com> PR tree-optimization/40219 * tree.c (iterative_hash_expr): Make sure the builtin function is a normal builtin function and not a front end or back end builtin before indexing into the built_in_decls array. PR tree-optimization/40049 * tree-vect-transform.c (vectorizable_operation): If the machine has only vector/vector shifts, convert the type of the constant to the appropriate type to avoid building incorrect trees, which eventually have problems with garbage collection. diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/tree.c sles-11sp1/gcc/tree.c --- sles-11sp1-orig/gcc/tree.c 2009-10-09 17:07:59.000000000 -0400 +++ sles-11sp1/gcc/tree.c 2009-10-13 13:02:08.000000000 -0400 @@ -5348,11 +5348,13 @@ iterative_hash_expr (const_tree t, hashv return val; } case FUNCTION_DECL: - /* When referring to a built-in FUNCTION_DECL, use the - __builtin__ form. Otherwise nodes that compare equal - according to operand_equal_p might get different - hash codes. */ - if (DECL_BUILT_IN (t)) + /* When referring to a built-in FUNCTION_DECL, use the __builtin__ form. + Otherwise nodes that compare equal according to operand_equal_p might + get different hash codes. However, don't do this for machine specific + or front end builtins, since the function code is overloaded in those + cases. */ + if (DECL_BUILT_IN_CLASS (t) == BUILT_IN_NORMAL + && built_in_decls[DECL_FUNCTION_CODE (t)]) { val = iterative_hash_pointer (built_in_decls[DECL_FUNCTION_CODE (t)], val); diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/gcc/tree-vect-transform.c sles-11sp1/gcc/tree-vect-transform.c --- sles-11sp1-orig/gcc/tree-vect-transform.c 2009-10-09 17:11:06.000000000 -0400 +++ sles-11sp1/gcc/tree-vect-transform.c 2009-10-13 13:02:38.000000000 -0400 @@ -3961,6 +3961,13 @@ vectorizable_operation (tree stmt, block && (optab_handler (optab, TYPE_MODE (vectype))->insn_code != CODE_FOR_nothing)) fprintf (vect_dump, "vector/vector shift/rotate found."); + + /* Unlike the other binary operators, shifts/rotates have + the rhs being int, instead of the same type as the lhs, + so make sure the scalar is the right type if we are + dealing with vectors of short/char. */ + if (dt[1] == vect_constant_def) + op1 = fold_convert (TREE_TYPE (vectype), op1); } } ++++++ gcc-power7-sles-11sp1.patch02f ++++++ 2009-10-15 Michael Meissner <meissner@linux.vnet.ibm.com> * libiberty.h (XALLOCA): Backport from 4.5 development tree. (XDUP): Ditto. (XALLOCAVEC): Ditto. (XDUPVEC): Ditto. (XALLOCVAR): Ditto. (XDUPVAR): Ditto. (XOBNEWVEC): Ditto. (XOBNEWVAR): Ditto. diff -rupN --exclude='*~' --exclude=autom4te.cache sles-11sp1-orig/include/libiberty.h sles-11sp1/include/libiberty.h --- sles-11sp1-orig/include/libiberty.h 2008-02-19 04:56:53.000000000 -0500 +++ sles-11sp1/include/libiberty.h 2009-10-12 17:33:11.000000000 -0400 @@ -320,26 +320,34 @@ extern double physmem_available (void); /* Scalar allocators. */ +#define XALLOCA(T) ((T *) alloca (sizeof (T))) #define XNEW(T) ((T *) xmalloc (sizeof (T))) #define XCNEW(T) ((T *) xcalloc (1, sizeof (T))) +#define XDUP(T, P) ((T *) xmemdup ((P), sizeof (T), sizeof (T))) #define XDELETE(P) free ((void*) (P)) /* Array allocators. */ +#define XALLOCAVEC(T, N) ((T *) alloca (sizeof (T) * (N))) #define XNEWVEC(T, N) ((T *) xmalloc (sizeof (T) * (N))) #define XCNEWVEC(T, N) ((T *) xcalloc ((N), sizeof (T))) +#define XDUPVEC(T, P, N) ((T *) xmemdup ((P), sizeof (T) * (N), sizeof (T) * (N))) #define XRESIZEVEC(T, P, N) ((T *) xrealloc ((void *) (P), sizeof (T) * (N))) #define XDELETEVEC(P) free ((void*) (P)) /* Allocators for variable-sized structures and raw buffers. */ +#define XALLOCAVAR(T, S) ((T *) alloca ((S))) #define XNEWVAR(T, S) ((T *) xmalloc ((S))) #define XCNEWVAR(T, S) ((T *) xcalloc (1, (S))) +#define XDUPVAR(T, P, S1, S2) ((T *) xmemdup ((P), (S1), (S2))) #define XRESIZEVAR(T, P, S) ((T *) xrealloc ((P), (S))) /* Type-safe obstack allocator. */ #define XOBNEW(O, T) ((T *) obstack_alloc ((O), sizeof (T))) +#define XOBNEWVEC(O, T, N) ((T *) obstack_alloc ((O), sizeof (T) * (N))) +#define XOBNEWVAR(O, T, S) ((T *) obstack_alloc ((O), (S))) #define XOBFINISH(O, T) ((T) obstack_finish ((O))) /* hex character manipulation routines */ ++++++ gcc-sles-version.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -1,35 +1,16 @@ Index: gcc/Makefile.in =================================================================== -*** gcc/Makefile.in 2008-09-01 15:17:38.000000000 +0200 ---- gcc/Makefile.in 2008-09-01 15:19:49.000000000 +0200 -*************** gcc-options.o: options.c $(CONFIG_H) $(S -*** 1919,1932 **** - dumpvers: dumpvers.c - - ifdef REVISION_s -! version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) - else -! version.o: version.c version.h $(DATESTAMP) $(FULLVER) $(DEVPHASE) - endif - $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) \ -! -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ - -DREVISION=$(REVISION_s) \ -! -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ - -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) - - gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ ---- 1919,1932 ---- - dumpvers: dumpvers.c - - ifdef REVISION_s -! version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) - else -! version.o: version.c version.h $(DATESTAMP) $(FULLVER) $(DEVPHASE) - endif - $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) \ -! -DBASEVER=$(FULLVER_s) -DDATESTAMP="" \ - -DREVISION=$(REVISION_s) \ -! -DDEVPHASE="" -DPKGVERSION=$(PKGVERSION_s) \ - -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) - - gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ +--- gcc/Makefile.in.orig 2009-11-20 13:50:02.000000000 +0100 ++++ gcc/Makefile.in 2009-11-20 13:50:07.000000000 +0100 +@@ -1941,9 +1941,9 @@ else + version.o: version.c version.h $(DATESTAMP) $(FULLVER) $(DEVPHASE) + endif + $(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) \ +- -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++ -DBASEVER=$(FULLVER_s) -DDATESTAMP="" \ + -DREVISION=$(REVISION_s) \ +- -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ ++ -DDEVPHASE="" -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) -c $(srcdir)/version.c $(OUTPUT_OPTION) + + gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ ++++++ gcc.spec.in ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -128,7 +128,7 @@ %define biarch_targets x86_64 s390x powerpc64 powerpc URL: http://gcc.gnu.org/ -Version: 4.3.4_20090804 +Version: 4.3.4_20091019 Release: 1 %define gcc_version %(echo %version | sed 's/_.*//') %define gcc_dir_version %(echo %gcc_version | cut -d '.' -f 1-2) @@ -229,7 +229,7 @@ Patch99: ibm-vector-keyword-1 Patch100: ibm-vector-keyword-2 Patch101: ibm-vector-keyword-3 -Patch102: ibm304071-z10-7 +Patch102: diff-z6-scheduling Patch103: ibm304134-power7-1 Patch104: ibm-cell-split Patch105: ibm-cell-split-fixes @@ -251,12 +251,32 @@ Patch124: nvl441016.patch Patch126: nvl447669.diff Patch127: nvl464739.patch +Patch128: ibm434505-spu # Patches for SAP features Patch130: sap303956-utf16-1.diff Patch131: sap303956-utf16-2.diff Patch132: sap303956-utf16-3.diff Patch133: sap303956-utf16-4.diff Patch134: sap303956-utf16-mangling.diff +# Patches for SP1 IBM features +Patch140: z10-IJ-constraints +Patch141: s390-mvc-mov +Patch142: z10-sched-fixes1 +Patch143: z10-sched-fixes3 +Patch144: z10-sched-fixes4 +Patch145: diff-vortex-1 +Patch146: s390-address-constraints +Patch147: true-comp-z10 +Patch148: s390-max-unroll-insn-default +Patch149: s390-long-loop-prediction-1 +Patch150: z10-cost +Patch151: stcmh-fix +Patch152: diff-symref-align-constpool +Patch160: gcc-power7-sles-11sp1.patch02a +Patch162: gcc-power7-sles-11sp1.patch02c +Patch163: gcc-power7-sles-11sp1.patch02d +Patch164: gcc-power7-sles-11sp1.patch02e +Patch165: gcc-power7-sles-11sp1.patch02f # LIBJAVA-DELETE-BEGIN Group: Development/Languages/C and C++ @@ -1025,11 +1045,30 @@ %patch124 -p1 %patch126 %patch127 +%patch128 %patch130 %patch131 %patch132 %patch133 %patch134 +%patch140 -p1 +%patch141 +%patch142 +%patch143 +%patch144 +%patch145 +%patch146 +%patch147 +%patch148 +%patch149 +%patch150 +%patch151 +%patch152 +%patch160 -p1 +%patch162 -p1 +%patch163 -p1 +%patch164 -p1 +%patch165 -p1 %build # Avoid rebuilding of generated files @@ -1231,10 +1270,12 @@ %if "%{TARGET_ARCH}" == "s390" --with-tune=z9-109 --with-arch=z900 \ --with-long-double-128 \ + --enable-decimal-float \ %endif %if "%{TARGET_ARCH}" == "s390x" --with-tune=z9-109 --with-arch=z900 \ --with-long-double-128 \ + --enable-decimal-float \ %endif --build=%{GCCDIST} ++++++ ibm304071-z10-1 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -58,359 +58,236 @@ Index: gcc/defaults.h =================================================================== -*** gcc/defaults.h.orig 2008-05-27 08:40:45.000000000 +0200 ---- gcc/defaults.h 2008-05-27 08:45:44.000000000 +0200 -*************** along with GCC; see the file COPYING3. -*** 902,907 **** ---- 902,911 ---- - #define LEGITIMATE_PIC_OPERAND_P(X) 1 - #endif - -+ #ifndef TARGET_MEM_CONSTRAINT -+ #define TARGET_MEM_CONSTRAINT 'm' -+ #endif -+ - #ifndef REVERSIBLE_CC_MODE - #define REVERSIBLE_CC_MODE(MODE) 0 - #endif +--- gcc/defaults.h.orig 2008-02-19 10:55:59.000000000 +0100 ++++ gcc/defaults.h 2009-11-20 13:51:25.000000000 +0100 +@@ -902,6 +902,10 @@ along with GCC; see the file COPYING3. + #define LEGITIMATE_PIC_OPERAND_P(X) 1 + #endif + ++#ifndef TARGET_MEM_CONSTRAINT ++#define TARGET_MEM_CONSTRAINT 'm' ++#endif ++ + #ifndef REVERSIBLE_CC_MODE + #define REVERSIBLE_CC_MODE(MODE) 0 + #endif Index: gcc/postreload.c =================================================================== -*** gcc/postreload.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/postreload.c 2008-05-27 08:45:44.000000000 +0200 -*************** reload_cse_simplify_operands (rtx insn, -*** 542,553 **** - case '*': case '%': - case '0': case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': -! case 'm': case '<': case '>': case 'V': case 'o': - case 'E': case 'F': case 'G': case 'H': - case 's': case 'i': case 'n': - case 'I': case 'J': case 'K': case 'L': - case 'M': case 'N': case 'O': case 'P': -! case 'p': case 'X': - /* These don't say anything we care about. */ - break; - ---- 542,553 ---- - case '*': case '%': - case '0': case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': -! case '<': case '>': case 'V': case 'o': - case 'E': case 'F': case 'G': case 'H': - case 's': case 'i': case 'n': - case 'I': case 'J': case 'K': case 'L': - case 'M': case 'N': case 'O': case 'P': -! case 'p': case 'X': case TARGET_MEM_CONSTRAINT: - /* These don't say anything we care about. */ - break; - +--- gcc/postreload.c.orig 2008-02-19 10:55:59.000000000 +0100 ++++ gcc/postreload.c 2009-11-20 13:51:25.000000000 +0100 +@@ -542,12 +542,12 @@ reload_cse_simplify_operands (rtx insn, + case '*': case '%': + case '0': case '1': case '2': case '3': case '4': + case '5': case '6': case '7': case '8': case '9': +- case 'm': case '<': case '>': case 'V': case 'o': ++ case '<': case '>': case 'V': case 'o': + case 'E': case 'F': case 'G': case 'H': + case 's': case 'i': case 'n': + case 'I': case 'J': case 'K': case 'L': + case 'M': case 'N': case 'O': case 'P': +- case 'p': case 'X': ++ case 'p': case 'X': case TARGET_MEM_CONSTRAINT: + /* These don't say anything we care about. */ + break; + Index: gcc/recog.c =================================================================== -*** gcc/recog.c.orig 2008-05-27 08:40:45.000000000 +0200 ---- gcc/recog.c 2008-05-27 08:45:44.000000000 +0200 -*************** asm_operand_ok (rtx op, const char *cons -*** 1543,1549 **** - result = 1; - break; - -! case 'm': - case 'V': /* non-offsettable */ - if (memory_operand (op, VOIDmode)) - result = 1; ---- 1543,1549 ---- - result = 1; - break; - -! case TARGET_MEM_CONSTRAINT: - case 'V': /* non-offsettable */ - if (memory_operand (op, VOIDmode)) - result = 1; -*************** preprocess_constraints (void) -*** 2082,2088 **** - } - continue; - -! case 'm': - op_alt[j].memory_ok = 1; - break; - case '<': ---- 2082,2088 ---- - } - continue; - -! case TARGET_MEM_CONSTRAINT: - op_alt[j].memory_ok = 1; - break; - case '<': -*************** constrain_operands (int strict) -*** 2355,2361 **** - win = 1; - break; - -! case 'm': - /* Memory operands must be valid, to the extent - required by STRICT. */ - if (MEM_P (op)) ---- 2355,2361 ---- - win = 1; - break; - -! case TARGET_MEM_CONSTRAINT: - /* Memory operands must be valid, to the extent - required by STRICT. */ - if (MEM_P (op)) +--- gcc/recog.c.orig 2009-11-20 13:50:29.000000000 +0100 ++++ gcc/recog.c 2009-11-20 13:51:25.000000000 +0100 +@@ -1593,7 +1593,7 @@ asm_operand_ok (rtx op, const char *cons + result = 1; + break; + +- case 'm': ++ case TARGET_MEM_CONSTRAINT: + case 'V': /* non-offsettable */ + if (memory_operand (op, VOIDmode)) + result = 1; +@@ -2132,7 +2132,7 @@ preprocess_constraints (void) + } + continue; + +- case 'm': ++ case TARGET_MEM_CONSTRAINT: + op_alt[j].memory_ok = 1; + break; + case '<': +@@ -2405,7 +2405,7 @@ constrain_operands (int strict) + win = 1; + break; + +- case 'm': ++ case TARGET_MEM_CONSTRAINT: + /* Memory operands must be valid, to the extent + required by STRICT. */ + if (MEM_P (op)) Index: gcc/regclass.c =================================================================== -*** gcc/regclass.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/regclass.c 2008-05-27 08:45:44.000000000 +0200 -*************** record_reg_classes (int n_alts, int n_op -*** 1701,1707 **** - [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; - break; - -! case 'm': case 'o': case 'V': - /* It doesn't seem worth distinguishing between offsettable - and non-offsettable addresses here. */ - allows_mem[i] = 1; ---- 1701,1707 ---- - [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; - break; - -! case TARGET_MEM_CONSTRAINT: case 'o': case 'V': - /* It doesn't seem worth distinguishing between offsettable - and non-offsettable addresses here. */ - allows_mem[i] = 1; +--- gcc/regclass.c.orig 2008-02-19 10:56:00.000000000 +0100 ++++ gcc/regclass.c 2009-11-20 13:51:25.000000000 +0100 +@@ -1699,7 +1699,7 @@ record_reg_classes (int n_alts, int n_op + [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)]; + break; + +- case 'm': case 'o': case 'V': ++ case TARGET_MEM_CONSTRAINT: case 'o': case 'V': + /* It doesn't seem worth distinguishing between offsettable + and non-offsettable addresses here. */ + allows_mem[i] = 1; Index: gcc/reload.c =================================================================== -*** gcc/reload.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/reload.c 2008-05-27 08:45:44.000000000 +0200 -*************** find_reloads (rtx insn, int replace, int -*** 3182,3188 **** - badop = 0; - break; - -! case 'm': - if (force_reload) - break; - if (MEM_P (operand) ---- 3182,3188 ---- - badop = 0; - break; - -! case TARGET_MEM_CONSTRAINT: - if (force_reload) - break; - if (MEM_P (operand) -*************** alternative_allows_const_pool_ref (rtx m -*** 4522,4528 **** - while (*constraint++ != ','); - altnum--; - } -! /* Scan the requested alternative for 'm' or 'o'. - If one of them is present, this alternative accepts the result of - passing a constant-pool reference through find_reloads_toplev. - ---- 4522,4528 ---- - while (*constraint++ != ','); - altnum--; - } -! /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'. - If one of them is present, this alternative accepts the result of - passing a constant-pool reference through find_reloads_toplev. - -*************** alternative_allows_const_pool_ref (rtx m -*** 4533,4539 **** - for (; (c = *constraint) && c != ',' && c != '#'; - constraint += CONSTRAINT_LEN (c, constraint)) - { -! if (c == 'm' || c == 'o') - return true; - #ifdef EXTRA_CONSTRAINT_STR - if (EXTRA_MEMORY_CONSTRAINT (c, constraint) ---- 4533,4539 ---- - for (; (c = *constraint) && c != ',' && c != '#'; - constraint += CONSTRAINT_LEN (c, constraint)) - { -! if (c == TARGET_MEM_CONSTRAINT || c == 'o') - return true; - #ifdef EXTRA_CONSTRAINT_STR - if (EXTRA_MEMORY_CONSTRAINT (c, constraint) +--- gcc/reload.c.orig 2008-08-18 10:56:42.000000000 +0200 ++++ gcc/reload.c 2009-11-20 13:51:25.000000000 +0100 +@@ -3203,7 +3203,7 @@ find_reloads (rtx insn, int replace, int + badop = 0; + break; + +- case 'm': ++ case TARGET_MEM_CONSTRAINT: + if (force_reload) + break; + if (MEM_P (operand) +@@ -4555,7 +4555,7 @@ alternative_allows_const_pool_ref (rtx m + while (*constraint++ != ','); + altnum--; + } +- /* Scan the requested alternative for 'm' or 'o'. ++ /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'. + If one of them is present, this alternative accepts the result of + passing a constant-pool reference through find_reloads_toplev. + +@@ -4566,7 +4566,7 @@ alternative_allows_const_pool_ref (rtx m + for (; (c = *constraint) && c != ',' && c != '#'; + constraint += CONSTRAINT_LEN (c, constraint)) + { +- if (c == 'm' || c == 'o') ++ if (c == TARGET_MEM_CONSTRAINT || c == 'o') + return true; + #ifdef EXTRA_CONSTRAINT_STR + if (EXTRA_MEMORY_CONSTRAINT (c, constraint) Index: gcc/reload1.c =================================================================== -*** gcc/reload1.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/reload1.c 2008-05-27 08:45:44.000000000 +0200 -*************** maybe_fix_stack_asms (void) -*** 1454,1464 **** - switch (c) - { - case '=': case '+': case '*': case '%': case '?': case '!': -! case '0': case '1': case '2': case '3': case '4': case 'm': -! case '<': case '>': case 'V': case 'o': case '&': case 'E': -! case 'F': case 's': case 'i': case 'n': case 'X': case 'I': -! case 'J': case 'K': case 'L': case 'M': case 'N': case 'O': -! case 'P': - break; - - case 'p': ---- 1454,1464 ---- - switch (c) - { - case '=': case '+': case '*': case '%': case '?': case '!': -! case '0': case '1': case '2': case '3': case '4': case '<': -! case '>': case 'V': case 'o': case '&': case 'E': case 'F': -! case 's': case 'i': case 'n': case 'X': case 'I': case 'J': -! case 'K': case 'L': case 'M': case 'N': case 'O': case 'P': -! case TARGET_MEM_CONSTRAINT: - break; - - case 'p': +--- gcc/reload1.c.orig 2008-02-19 10:56:00.000000000 +0100 ++++ gcc/reload1.c 2009-11-20 13:51:25.000000000 +0100 +@@ -1455,11 +1455,11 @@ maybe_fix_stack_asms (void) + switch (c) + { + case '=': case '+': case '*': case '%': case '?': case '!': +- case '0': case '1': case '2': case '3': case '4': case 'm': +- case '<': case '>': case 'V': case 'o': case '&': case 'E': +- case 'F': case 's': case 'i': case 'n': case 'X': case 'I': +- case 'J': case 'K': case 'L': case 'M': case 'N': case 'O': +- case 'P': ++ case '0': case '1': case '2': case '3': case '4': case '<': ++ case '>': case 'V': case 'o': case '&': case 'E': case 'F': ++ case 's': case 'i': case 'n': case 'X': case 'I': case 'J': ++ case 'K': case 'L': case 'M': case 'N': case 'O': case 'P': ++ case TARGET_MEM_CONSTRAINT: + break; + + case 'p': Index: gcc/stmt.c =================================================================== -*** gcc/stmt.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/stmt.c 2008-05-27 08:45:44.000000000 +0200 -*************** parse_output_constraint (const char **co -*** 363,369 **** - } - break; - -! case 'V': case 'm': case 'o': - *allows_mem = true; - break; - ---- 363,369 ---- - } - break; - -! case 'V': case TARGET_MEM_CONSTRAINT: case 'o': - *allows_mem = true; - break; - -*************** parse_input_constraint (const char **con -*** 462,468 **** - } - break; - -! case 'V': case 'm': case 'o': - *allows_mem = true; - break; - ---- 462,468 ---- - } - break; - -! case 'V': case TARGET_MEM_CONSTRAINT: case 'o': - *allows_mem = true; - break; - +--- gcc/stmt.c.orig 2009-03-13 16:34:03.000000000 +0100 ++++ gcc/stmt.c 2009-11-20 13:51:25.000000000 +0100 +@@ -364,7 +364,7 @@ parse_output_constraint (const char **co + } + break; + +- case 'V': case 'm': case 'o': ++ case 'V': case TARGET_MEM_CONSTRAINT: case 'o': + *allows_mem = true; + break; + +@@ -463,7 +463,7 @@ parse_input_constraint (const char **con + } + break; + +- case 'V': case 'm': case 'o': ++ case 'V': case TARGET_MEM_CONSTRAINT: case 'o': + *allows_mem = true; + break; + Index: gcc/recog.h =================================================================== -*** gcc/recog.h.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/recog.h 2008-05-27 08:45:44.000000000 +0200 -*************** struct operand_alternative -*** 50,56 **** - - /* Nonzero if '&' was found in the constraint string. */ - unsigned int earlyclobber:1; -! /* Nonzero if 'm' was found in the constraint string. */ - unsigned int memory_ok:1; - /* Nonzero if 'o' was found in the constraint string. */ - unsigned int offmem_ok:1; ---- 50,57 ---- - - /* Nonzero if '&' was found in the constraint string. */ - unsigned int earlyclobber:1; -! /* Nonzero if TARGET_MEM_CONSTRAINT was found in the constraint -! string. */ - unsigned int memory_ok:1; - /* Nonzero if 'o' was found in the constraint string. */ - unsigned int offmem_ok:1; +--- gcc/recog.h.orig 2009-03-13 16:34:03.000000000 +0100 ++++ gcc/recog.h 2009-11-20 13:51:25.000000000 +0100 +@@ -50,7 +50,8 @@ struct operand_alternative + + /* Nonzero if '&' was found in the constraint string. */ + unsigned int earlyclobber:1; +- /* Nonzero if 'm' was found in the constraint string. */ ++ /* Nonzero if TARGET_MEM_CONSTRAINT was found in the constraint ++ string. */ + unsigned int memory_ok:1; + /* Nonzero if 'o' was found in the constraint string. */ + unsigned int offmem_ok:1; Index: gcc/genpreds.c =================================================================== -*** gcc/genpreds.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/genpreds.c 2008-05-27 08:45:44.000000000 +0200 -*************** static struct constraint_data **last_con -*** 690,697 **** - for (iter_ = first_constraint; iter_; iter_ = iter_->next_textual) - - /* These letters, and all names beginning with them, are reserved for -! generic constraints. */ -! static const char generic_constraint_letters[] = "EFVXgimnoprs"; - - /* Machine-independent code expects that constraints with these - (initial) letters will allow only (a subset of all) CONST_INTs. */ ---- 690,700 ---- - for (iter_ = first_constraint; iter_; iter_ = iter_->next_textual) - - /* These letters, and all names beginning with them, are reserved for -! generic constraints. -! The 'm' constraint is not mentioned here since that constraint -! letter can be overridden by the back end by defining the -! TARGET_MEM_CONSTRAINT macro. */ -! static const char generic_constraint_letters[] = "EFVXginoprs"; - - /* Machine-independent code expects that constraints with these - (initial) letters will allow only (a subset of all) CONST_INTs. */ +--- gcc/genpreds.c.orig 2008-02-19 10:56:00.000000000 +0100 ++++ gcc/genpreds.c 2009-11-20 13:51:25.000000000 +0100 +@@ -690,8 +690,11 @@ static struct constraint_data **last_con + for (iter_ = first_constraint; iter_; iter_ = iter_->next_textual) + + /* These letters, and all names beginning with them, are reserved for +- generic constraints. */ +-static const char generic_constraint_letters[] = "EFVXgimnoprs"; ++ generic constraints. ++ The 'm' constraint is not mentioned here since that constraint ++ letter can be overridden by the back end by defining the ++ TARGET_MEM_CONSTRAINT macro. */ ++static const char generic_constraint_letters[] = "EFVXginoprs"; + + /* Machine-independent code expects that constraints with these + (initial) letters will allow only (a subset of all) CONST_INTs. */ Index: gcc/genoutput.c =================================================================== -*** gcc/genoutput.c.orig 2008-05-15 10:28:00.000000000 +0200 ---- gcc/genoutput.c 2008-05-27 08:45:44.000000000 +0200 -*************** note_constraint (rtx exp, int lineno) -*** 1122,1128 **** - unsigned int namelen = strlen (name); - struct constraint_data **iter, **slot, *new; - -! if (strchr (indep_constraints, name[0])) - { - if (name[1] == '\0') - message_with_line (lineno, "constraint letter '%s' cannot be " ---- 1122,1131 ---- - unsigned int namelen = strlen (name); - struct constraint_data **iter, **slot, *new; - -! /* The 'm' constraint is special here since that constraint letter -! can be overridden by the back end by defining the -! TARGET_MEM_CONSTRAINT macro. */ -! if (strchr (indep_constraints, name[0]) && name[0] != 'm') - { - if (name[1] == '\0') - message_with_line (lineno, "constraint letter '%s' cannot be " +--- gcc/genoutput.c.orig 2008-02-19 10:55:59.000000000 +0100 ++++ gcc/genoutput.c 2009-11-20 13:51:25.000000000 +0100 +@@ -1122,7 +1122,10 @@ note_constraint (rtx exp, int lineno) + unsigned int namelen = strlen (name); + struct constraint_data **iter, **slot, *new; + +- if (strchr (indep_constraints, name[0])) ++ /* The 'm' constraint is special here since that constraint letter ++ can be overridden by the back end by defining the ++ TARGET_MEM_CONSTRAINT macro. */ ++ if (strchr (indep_constraints, name[0]) && name[0] != 'm') + { + if (name[1] == '\0') + message_with_line (lineno, "constraint letter '%s' cannot be " Index: gcc/doc/md.texi =================================================================== -*** gcc/doc/md.texi.orig 2008-05-15 10:22:48.000000000 +0200 ---- gcc/doc/md.texi 2008-05-27 08:45:44.000000000 +0200 -*************** number of constraints and modifiers. -*** 1085,1090 **** ---- 1085,1092 ---- - @item @samp{m} - A memory operand is allowed, with any kind of address that the machine - supports in general. -+ Note that the letter used for the general memory constraint can be -+ re-defined by a back end using the @code{TARGET_MEM_CONSTRAINT} macro. - - @cindex offsettable address - @cindex @samp{o} in constraint +--- gcc/doc/md.texi.orig 2009-11-20 13:51:10.000000000 +0100 ++++ gcc/doc/md.texi 2009-11-20 13:51:25.000000000 +0100 +@@ -1085,6 +1085,8 @@ number of constraints and modifiers. + @item @samp{m} + A memory operand is allowed, with any kind of address that the machine + supports in general. ++Note that the letter used for the general memory constraint can be ++re-defined by a back end using the @code{TARGET_MEM_CONSTRAINT} macro. + + @cindex offsettable address + @cindex @samp{o} in constraint Index: gcc/doc/tm.texi =================================================================== -*** gcc/doc/tm.texi.orig 2008-05-27 08:40:32.000000000 +0200 ---- gcc/doc/tm.texi 2008-05-27 08:45:44.000000000 +0200 -*************** into the @code{symbol_ref}, and then che -*** 5315,5320 **** ---- 5315,5331 ---- - Format}. - @end defmac - -+ @defmac TARGET_MEM_CONSTRAINT -+ A single character to be used instead of the default @code{'m'} -+ character for general memory addresses. This defines the constraint -+ letter which matches the memory addresses accepted by -+ @code{GO_IF_LEGITIMATE_ADDRESS_P}. Define this macro if you want to -+ support new address formats in your back end without changing the -+ semantics of the @code{'m'} constraint. This is necessary in order to -+ preserve functionality of inline assembly constructs using the -+ @code{'m'} constraint. -+ @end defmac -+ - @defmac FIND_BASE_TERM (@var{x}) - A C expression to determine the base term of address @var{x}. - This macro is used in only one place: `find_base_term' in alias.c. - +--- gcc/doc/tm.texi.orig 2008-02-19 10:52:38.000000000 +0100 ++++ gcc/doc/tm.texi 2009-11-20 13:51:25.000000000 +0100 +@@ -5297,6 +5297,17 @@ into the @code{symbol_ref}, and then che + Format}. + @end defmac + ++@defmac TARGET_MEM_CONSTRAINT ++A single character to be used instead of the default @code{'m'} ++character for general memory addresses. This defines the constraint ++letter which matches the memory addresses accepted by ++@code{GO_IF_LEGITIMATE_ADDRESS_P}. Define this macro if you want to ++support new address formats in your back end without changing the ++semantics of the @code{'m'} constraint. This is necessary in order to ++preserve functionality of inline assembly constructs using the ++@code{'m'} constraint. ++@end defmac ++ + @defmac FIND_BASE_TERM (@var{x}) + A C expression to determine the base term of address @var{x}. + This macro is used in only one place: `find_base_term' in alias.c. ++++++ ibm304071-z10-2 ++++++ ++++ 796 lines (skipped) ++++ between gcc43/ibm304071-z10-2 ++++ and /mounts/work_src_done/STABLE/gcc43/ibm304071-z10-2 ++++++ ibm304071-z10-5 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -48,239 +48,184 @@ Index: gcc/config/s390/s390.c =================================================================== -*** gcc/config/s390/s390.c.orig 2008-05-15 10:27:36.000000000 +0200 ---- gcc/config/s390/s390.c 2008-05-27 08:49:56.000000000 +0200 -*************** struct processor_costs z9_109_cost = -*** 188,193 **** ---- 188,225 ---- - COSTS_N_INSNS (24), /* DSGR */ - }; - -+ static const -+ struct processor_costs z10_cost = -+ { -+ COSTS_N_INSNS (4), /* M */ -+ COSTS_N_INSNS (2), /* MGHI */ -+ COSTS_N_INSNS (2), /* MH */ -+ COSTS_N_INSNS (2), /* MHI */ -+ COSTS_N_INSNS (4), /* ML */ -+ COSTS_N_INSNS (4), /* MR */ -+ COSTS_N_INSNS (5), /* MS */ -+ COSTS_N_INSNS (6), /* MSG */ -+ COSTS_N_INSNS (4), /* MSGF */ -+ COSTS_N_INSNS (4), /* MSGFR */ -+ COSTS_N_INSNS (4), /* MSGR */ -+ COSTS_N_INSNS (4), /* MSR */ -+ COSTS_N_INSNS (1), /* multiplication in DFmode */ -+ COSTS_N_INSNS (28), /* MXBR */ -+ COSTS_N_INSNS (130), /* SQXBR */ -+ COSTS_N_INSNS (66), /* SQDBR */ -+ COSTS_N_INSNS (38), /* SQEBR */ -+ COSTS_N_INSNS (1), /* MADBR */ -+ COSTS_N_INSNS (1), /* MAEBR */ -+ COSTS_N_INSNS (60), /* DXBR */ -+ COSTS_N_INSNS (40), /* DDBR */ -+ COSTS_N_INSNS (26), /* DEBR */ -+ COSTS_N_INSNS (30), /* DLGR */ -+ COSTS_N_INSNS (23), /* DLR */ -+ COSTS_N_INSNS (23), /* DR */ -+ COSTS_N_INSNS (24), /* DSGFR */ -+ COSTS_N_INSNS (24), /* DSGR */ -+ }; -+ - extern int reload_completed; - - /* Save information from a "cmpxx" operation until the branch or scc is -*************** s390_handle_arch_option (const char *arg -*** 1365,1370 **** ---- 1397,1404 ---- - | PF_LONG_DISPLACEMENT | PF_EXTIMM}, - {"z9-ec", PROCESSOR_2094_Z9_109, PF_IEEE_FLOAT | PF_ZARCH - | PF_LONG_DISPLACEMENT | PF_EXTIMM | PF_DFP }, -+ {"z10", PROCESSOR_2097_Z10, PF_IEEE_FLOAT | PF_ZARCH -+ | PF_LONG_DISPLACEMENT | PF_EXTIMM | PF_DFP | PF_Z10}, - }; - size_t i; - -*************** override_options (void) -*** 1472,1484 **** - } - - /* Set processor cost function. */ -! if (s390_tune == PROCESSOR_2094_Z9_109) -! s390_cost = &z9_109_cost; -! else if (s390_tune == PROCESSOR_2084_Z990) -! s390_cost = &z990_cost; -! else -! s390_cost = &z900_cost; -! - if (TARGET_BACKCHAIN && TARGET_PACKED_STACK && TARGET_HARD_FLOAT) - error ("-mbackchain -mpacked-stack -mhard-float are not supported " - "in combination"); ---- 1506,1526 ---- - } - - /* Set processor cost function. */ -! switch (s390_tune) -! { -! case PROCESSOR_2084_Z990: -! s390_cost = &z990_cost; -! break; -! case PROCESSOR_2094_Z9_109: -! s390_cost = &z9_109_cost; -! break; -! case PROCESSOR_2097_Z10: -! s390_cost = &z10_cost; -! break; -! default: -! s390_cost = &z900_cost; -! } -! - if (TARGET_BACKCHAIN && TARGET_PACKED_STACK && TARGET_HARD_FLOAT) - error ("-mbackchain -mpacked-stack -mhard-float are not supported " - "in combination"); -*************** s390_adjust_priority (rtx insn ATTRIBUTE -*** 4930,4939 **** - static int - s390_issue_rate (void) - { -! if (s390_tune == PROCESSOR_2084_Z990 -! || s390_tune == PROCESSOR_2094_Z9_109) -! return 3; -! return 1; - } - - static int ---- 4972,4987 ---- - static int - s390_issue_rate (void) - { -! switch (s390_tune) -! { -! case PROCESSOR_2084_Z990: -! case PROCESSOR_2094_Z9_109: -! return 3; -! case PROCESSOR_2097_Z10: -! return 2; -! default: -! return 1; -! } - } - - static int +--- gcc/config/s390/s390.c.orig 2008-02-19 10:55:43.000000000 +0100 ++++ gcc/config/s390/s390.c 2009-11-20 13:51:31.000000000 +0100 +@@ -188,6 +188,38 @@ struct processor_costs z9_109_cost = + COSTS_N_INSNS (24), /* DSGR */ + }; + ++static const ++struct processor_costs z10_cost = ++{ ++ COSTS_N_INSNS (4), /* M */ ++ COSTS_N_INSNS (2), /* MGHI */ ++ COSTS_N_INSNS (2), /* MH */ ++ COSTS_N_INSNS (2), /* MHI */ ++ COSTS_N_INSNS (4), /* ML */ ++ COSTS_N_INSNS (4), /* MR */ ++ COSTS_N_INSNS (5), /* MS */ ++ COSTS_N_INSNS (6), /* MSG */ ++ COSTS_N_INSNS (4), /* MSGF */ ++ COSTS_N_INSNS (4), /* MSGFR */ ++ COSTS_N_INSNS (4), /* MSGR */ ++ COSTS_N_INSNS (4), /* MSR */ ++ COSTS_N_INSNS (1), /* multiplication in DFmode */ ++ COSTS_N_INSNS (28), /* MXBR */ ++ COSTS_N_INSNS (130), /* SQXBR */ ++ COSTS_N_INSNS (66), /* SQDBR */ ++ COSTS_N_INSNS (38), /* SQEBR */ ++ COSTS_N_INSNS (1), /* MADBR */ ++ COSTS_N_INSNS (1), /* MAEBR */ ++ COSTS_N_INSNS (60), /* DXBR */ ++ COSTS_N_INSNS (40), /* DDBR */ ++ COSTS_N_INSNS (26), /* DEBR */ ++ COSTS_N_INSNS (30), /* DLGR */ ++ COSTS_N_INSNS (23), /* DLR */ ++ COSTS_N_INSNS (23), /* DR */ ++ COSTS_N_INSNS (24), /* DSGFR */ ++ COSTS_N_INSNS (24), /* DSGR */ ++}; ++ + extern int reload_completed; + + /* Save information from a "cmpxx" operation until the branch or scc is +@@ -1365,6 +1397,8 @@ s390_handle_arch_option (const char *arg + | PF_LONG_DISPLACEMENT | PF_EXTIMM}, + {"z9-ec", PROCESSOR_2094_Z9_109, PF_IEEE_FLOAT | PF_ZARCH + | PF_LONG_DISPLACEMENT | PF_EXTIMM | PF_DFP }, ++ {"z10", PROCESSOR_2097_Z10, PF_IEEE_FLOAT | PF_ZARCH ++ | PF_LONG_DISPLACEMENT | PF_EXTIMM | PF_DFP | PF_Z10}, + }; + size_t i; + +@@ -1472,13 +1506,21 @@ override_options (void) + } + + /* Set processor cost function. */ +- if (s390_tune == PROCESSOR_2094_Z9_109) +- s390_cost = &z9_109_cost; +- else if (s390_tune == PROCESSOR_2084_Z990) +- s390_cost = &z990_cost; +- else +- s390_cost = &z900_cost; +- ++ switch (s390_tune) ++ { ++ case PROCESSOR_2084_Z990: ++ s390_cost = &z990_cost; ++ break; ++ case PROCESSOR_2094_Z9_109: ++ s390_cost = &z9_109_cost; ++ break; ++ case PROCESSOR_2097_Z10: ++ s390_cost = &z10_cost; ++ break; ++ default: ++ s390_cost = &z900_cost; ++ } ++ + if (TARGET_BACKCHAIN && TARGET_PACKED_STACK && TARGET_HARD_FLOAT) + error ("-mbackchain -mpacked-stack -mhard-float are not supported " + "in combination"); +@@ -4930,10 +4972,16 @@ s390_adjust_priority (rtx insn ATTRIBUTE + static int + s390_issue_rate (void) + { +- if (s390_tune == PROCESSOR_2084_Z990 +- || s390_tune == PROCESSOR_2094_Z9_109) +- return 3; +- return 1; ++ switch (s390_tune) ++ { ++ case PROCESSOR_2084_Z990: ++ case PROCESSOR_2094_Z9_109: ++ return 3; ++ case PROCESSOR_2097_Z10: ++ return 2; ++ default: ++ return 1; ++ } + } + + static int Index: gcc/config/s390/s390.h =================================================================== -*** gcc/config/s390/s390.h.orig 2008-05-15 10:27:36.000000000 +0200 ---- gcc/config/s390/s390.h 2008-05-27 08:49:56.000000000 +0200 -*************** enum processor_type -*** 40,45 **** ---- 40,46 ---- - PROCESSOR_2064_Z900, - PROCESSOR_2084_Z990, - PROCESSOR_2094_Z9_109, -+ PROCESSOR_2097_Z10, - PROCESSOR_max - }; - -*************** enum processor_flags -*** 51,57 **** - PF_ZARCH = 2, - PF_LONG_DISPLACEMENT = 4, - PF_EXTIMM = 8, -! PF_DFP = 16 - }; - - extern enum processor_type s390_tune; ---- 52,59 ---- - PF_ZARCH = 2, - PF_LONG_DISPLACEMENT = 4, - PF_EXTIMM = 8, -! PF_DFP = 16, -! PF_Z10 = 32 - }; - - extern enum processor_type s390_tune; -*************** extern enum processor_flags s390_arch_fl -*** 70,75 **** ---- 72,79 ---- - (s390_arch_flags & PF_EXTIMM) - #define TARGET_CPU_DFP \ - (s390_arch_flags & PF_DFP) -+ #define TARGET_CPU_Z10 \ -+ (s390_arch_flags & PF_Z10) - - #define TARGET_LONG_DISPLACEMENT \ - (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT) -*************** extern enum processor_flags s390_arch_fl -*** 77,82 **** ---- 81,88 ---- - (TARGET_ZARCH && TARGET_CPU_EXTIMM) - #define TARGET_DFP \ - (TARGET_ZARCH && TARGET_CPU_DFP) -+ #define TARGET_Z10 \ -+ (TARGET_ZARCH && TARGET_CPU_Z10) - - /* Run-time target specification. */ - +--- gcc/config/s390/s390.h.orig 2008-11-20 11:39:20.000000000 +0100 ++++ gcc/config/s390/s390.h 2009-11-20 13:51:31.000000000 +0100 +@@ -40,6 +40,7 @@ enum processor_type + PROCESSOR_2064_Z900, + PROCESSOR_2084_Z990, + PROCESSOR_2094_Z9_109, ++ PROCESSOR_2097_Z10, + PROCESSOR_max + }; + +@@ -51,7 +52,8 @@ enum processor_flags + PF_ZARCH = 2, + PF_LONG_DISPLACEMENT = 4, + PF_EXTIMM = 8, +- PF_DFP = 16 ++ PF_DFP = 16, ++ PF_Z10 = 32 + }; + + extern enum processor_type s390_tune; +@@ -70,6 +72,8 @@ extern enum processor_flags s390_arch_fl + (s390_arch_flags & PF_EXTIMM) + #define TARGET_CPU_DFP \ + (s390_arch_flags & PF_DFP) ++#define TARGET_CPU_Z10 \ ++ (s390_arch_flags & PF_Z10) + + #define TARGET_LONG_DISPLACEMENT \ + (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT) +@@ -77,6 +81,8 @@ extern enum processor_flags s390_arch_fl + (TARGET_ZARCH && TARGET_CPU_EXTIMM) + #define TARGET_DFP \ + (TARGET_ZARCH && TARGET_CPU_DFP) ++#define TARGET_Z10 \ ++ (TARGET_ZARCH && TARGET_CPU_Z10) + + /* Run-time target specification. */ + Index: gcc/config/s390/s390.md =================================================================== -*** gcc/config/s390/s390.md.orig 2008-05-27 08:49:36.000000000 +0200 ---- gcc/config/s390/s390.md 2008-05-27 08:49:56.000000000 +0200 -*************** -*** 228,237 **** - ;; distinguish between g5 and g6, but there are differences between the two - ;; CPUs could in theory be modeled. - -! (define_attr "cpu" "g5,g6,z900,z990,z9_109" - (const (symbol_ref "s390_tune"))) - -! (define_attr "cpu_facility" "standard,ieee,zarch,longdisp,extimm,dfp" - (const_string "standard")) - - (define_attr "enabled" "" ---- 228,237 ---- - ;; distinguish between g5 and g6, but there are differences between the two - ;; CPUs could in theory be modeled. - -! (define_attr "cpu" "g5,g6,z900,z990,z9_109,z10" - (const (symbol_ref "s390_tune"))) - -! (define_attr "cpu_facility" "standard,ieee,zarch,longdisp,extimm,dfp,z10" - (const_string "standard")) - - (define_attr "enabled" "" -*************** -*** 256,261 **** ---- 256,265 ---- - - (and (eq_attr "cpu_facility" "dfp") - (ne (symbol_ref "TARGET_DFP") (const_int 0))) -+ (const_int 1) -+ -+ (and (eq_attr "cpu_facility" "z10") -+ (ne (symbol_ref "TARGET_Z10") (const_int 0))) - (const_int 1)] - (const_int 0))) - +--- gcc/config/s390/s390.md.orig 2009-11-20 13:51:31.000000000 +0100 ++++ gcc/config/s390/s390.md 2009-11-20 13:51:31.000000000 +0100 +@@ -228,10 +228,10 @@ + ;; distinguish between g5 and g6, but there are differences between the two + ;; CPUs could in theory be modeled. + +-(define_attr "cpu" "g5,g6,z900,z990,z9_109" ++(define_attr "cpu" "g5,g6,z900,z990,z9_109,z10" + (const (symbol_ref "s390_tune"))) + +-(define_attr "cpu_facility" "standard,ieee,zarch,longdisp,extimm,dfp" ++(define_attr "cpu_facility" "standard,ieee,zarch,longdisp,extimm,dfp,z10" + (const_string "standard")) + + (define_attr "enabled" "" +@@ -256,6 +256,10 @@ + + (and (eq_attr "cpu_facility" "dfp") + (ne (symbol_ref "TARGET_DFP") (const_int 0))) ++ (const_int 1) ++ ++ (and (eq_attr "cpu_facility" "z10") ++ (ne (symbol_ref "TARGET_Z10") (const_int 0))) + (const_int 1)] + (const_int 0))) + Index: gcc/config.gcc =================================================================== -*** gcc/config.gcc.orig 2008-05-27 08:40:46.000000000 +0200 ---- gcc/config.gcc 2008-05-27 08:49:56.000000000 +0200 -*************** case "${target}" in -*** 3182,3188 **** - for which in arch tune; do - eval "val=\$with_$which" - case ${val} in -! "" | g5 | g6 | z900 | z990 | z9-109 | z9-ec) - # OK - ;; - *) ---- 3182,3188 ---- - for which in arch tune; do - eval "val=\$with_$which" - case ${val} in -! "" | g5 | g6 | z900 | z990 | z9-109 | z9-ec | z10) - # OK - ;; - *) - +--- gcc/config.gcc.orig 2009-11-20 13:51:21.000000000 +0100 ++++ gcc/config.gcc 2009-11-20 13:51:31.000000000 +0100 +@@ -3155,7 +3155,7 @@ case "${target}" in + for which in arch tune; do + eval "val=\$with_$which" + case ${val} in +- "" | g5 | g6 | z900 | z990 | z9-109 | z9-ec) ++ "" | g5 | g6 | z900 | z990 | z9-109 | z9-ec | z10) + # OK + ;; + *) ++++++ ibm304071-z10-6 ++++++ ++++ 4679 lines (skipped) ++++ between gcc43/ibm304071-z10-6 ++++ and /mounts/work_src_done/STABLE/gcc43/ibm304071-z10-6 ++++++ ibm304071-z10-8 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -1,8 +1,8 @@ Index: gcc/doc/invoke.texi =================================================================== ---- gcc/doc/invoke.texi.orig 2008-10-02 15:06:53.000000000 +0200 -+++ gcc/doc/invoke.texi 2008-10-02 15:07:36.000000000 +0200 -@@ -13746,7 +13746,7 @@ The default is to not print debug inform +--- gcc/doc/invoke.texi.orig 2009-11-20 13:51:43.000000000 +0100 ++++ gcc/doc/invoke.texi 2009-11-20 13:52:03.000000000 +0100 +@@ -13747,7 +13747,7 @@ The default is to not print debug inform Generate code that will run on @var{cpu-type}, which is the name of a system representing a certain processor type. Possible values for @var{cpu-type} are @samp{g5}, @samp{g6}, @samp{z900}, @samp{z990}, ++++++ ibm304134-power7-1 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -33,9 +33,9 @@ Index: gcc/doc/invoke.texi =================================================================== ---- gcc/doc/invoke.texi (revision 139880) -+++ gcc/doc/invoke.texi (working copy) -@@ -12945,7 +12945,8 @@ Supported values for @var{cpu_type} are +--- gcc/doc/invoke.texi.orig 2009-11-20 13:51:21.000000000 +0100 ++++ gcc/doc/invoke.texi 2009-11-20 13:51:43.000000000 +0100 +@@ -12957,7 +12957,8 @@ Supported values for @var{cpu_type} are @samp{860}, @samp{970}, @samp{8540}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6}, @@ -47,8 +47,8 @@ @option{-mcpu=common} selects a completely generic processor. Code Index: gcc/configure =================================================================== ---- gcc/configure (revision 139880) -+++ gcc/configure (working copy) +--- gcc/configure.orig 2008-08-01 12:10:39.000000000 +0200 ++++ gcc/configure 2009-11-20 13:51:43.000000000 +0100 @@ -21881,6 +21881,52 @@ _ACEOF fi @@ -104,8 +104,8 @@ if test "${gcc_cv_as_powerpc_gnu_attribute+set}" = set; then Index: gcc/config.in =================================================================== ---- gcc/config.in (revision 139880) -+++ gcc/config.in (working copy) +--- gcc/config.in.orig 2008-08-05 14:06:10.000000000 +0200 ++++ gcc/config.in 2009-11-20 13:51:43.000000000 +0100 @@ -375,6 +375,10 @@ #undef HAVE_AS_TLS #endif @@ -119,8 +119,8 @@ #ifndef USED_FOR_TARGET Index: gcc/configure.ac =================================================================== ---- gcc/configure.ac (revision 139880) -+++ gcc/configure.ac (working copy) +--- gcc/configure.ac.orig 2008-08-01 12:10:39.000000000 +0200 ++++ gcc/configure.ac 2009-11-20 13:51:43.000000000 +0100 @@ -3013,6 +3013,21 @@ LCF0: [AC_DEFINE(HAVE_AS_DFP, 1, [Define if your assembler supports DFP instructions.])]) @@ -145,9 +145,9 @@ [.gnu_attribute 4,1],, Index: gcc/config.gcc =================================================================== ---- gcc/config.gcc (revision 139880) -+++ gcc/config.gcc (working copy) -@@ -343,7 +343,7 @@ powerpc*-*-*) +--- gcc/config.gcc.orig 2009-11-20 13:51:31.000000000 +0100 ++++ gcc/config.gcc 2009-11-20 13:51:43.000000000 +0100 +@@ -345,7 +345,7 @@ powerpc*-*-*) extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h" need_64bit_hwint=yes case x$with_cpu in @@ -167,8 +167,8 @@ | 601 | 602 | 603 | 603e | ec603e | 604 \ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc/config/rs6000/rs6000.c (revision 139880) -+++ gcc/config/rs6000/rs6000.c (working copy) +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:09.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:43.000000000 +0100 @@ -1437,19 +1437,23 @@ rs6000_override_options (const char *def {"power3", PROCESSOR_PPC630, POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}, @@ -202,8 +202,8 @@ POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_POWERPC64}, Index: gcc/config/rs6000/rs6000.h =================================================================== ---- gcc/config/rs6000/rs6000.h (revision 139880) -+++ gcc/config/rs6000/rs6000.h (working copy) +--- gcc/config/rs6000/rs6000.h.orig 2008-02-19 10:55:53.000000000 +0100 ++++ gcc/config/rs6000/rs6000.h 2009-11-20 13:51:43.000000000 +0100 @@ -60,6 +60,24 @@ #define TARGET_PAIRED_FLOAT 0 #endif ++++++ ibm434505-spu ++++++ ++++ 1590 lines (skipped) ++++++ ibm-cell-split ++++++ ++++ 2573 lines (skipped) ++++ between gcc43/ibm-cell-split ++++ and /mounts/work_src_done/STABLE/gcc43/ibm-cell-split ++++++ ibm-cell-split-fixes ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:49.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:49.000000000 +0100 @@ -11,115 +11,97 @@ * config/spu/spu.md ("_abs<mode>2"): Do not split in split0 pass. -diff -crNp -x .svn gcc-4_3-orig/gcc/config/spu/spu.c gcc-4_3/gcc/config/spu/spu.c -*** gcc-4_3-orig/gcc/config/spu/spu.c 2008-09-10 22:09:24.000000000 +0200 ---- gcc-4_3/gcc/config/spu/spu.c 2008-09-11 00:40:35.000000000 +0200 -*************** spu_split_load (rtx * ops) -*** 3596,3602 **** - - rot = 0; - rot_amt = 0; -! if (GET_CODE (addr) == PLUS) - { - /* 8 cases: - aligned reg + aligned reg => lqx ---- 3596,3605 ---- - - rot = 0; - rot_amt = 0; -! -! if (MEM_ALIGN (ops[1]) >= 128) -! /* Address is already aligned; simply perform a TImode load. */; -! else if (GET_CODE (addr) == PLUS) - { - /* 8 cases: - aligned reg + aligned reg => lqx -*************** spu_split_load (rtx * ops) -*** 3707,3712 **** ---- 3710,3723 ---- - rot_amt = 0; - } - -+ /* If the source is properly aligned, we don't need to split this insn into -+ a TImode load plus a _spu_convert. However, we want to perform the split -+ anyway when optimizing to make the MEMs look the same as those used for -+ stores so they are more easily merged. When *not* optimizing, that will -+ not happen anyway, so we prefer to avoid generating the _spu_convert. */ -+ if (!rot && !rot_amt && !optimize) -+ return 0; -+ - load = gen_reg_rtx (TImode); - - mem = change_address (ops[1], TImode, copy_rtx (addr)); -diff -crNp -x .svn gcc-4_3-orig/gcc/config/spu/spu.h gcc-4_3/gcc/config/spu/spu.h -*** gcc-4_3-orig/gcc/config/spu/spu.h 2008-09-10 22:09:24.000000000 +0200 ---- gcc-4_3/gcc/config/spu/spu.h 2008-09-10 21:19:30.000000000 +0200 -*************** extern GTY(()) rtx spu_compare_op1; -*** 640,642 **** ---- 640,644 ---- - - #define SPLIT_BEFORE_CSE2 1 - -+ #define ADDRESSES_NEVER_TRAP 1 -+ -diff -crNp -x .svn gcc-4_3-orig/gcc/config/spu/spu.md gcc-4_3/gcc/config/spu/spu.md -*** gcc-4_3-orig/gcc/config/spu/spu.md 2008-09-10 22:09:32.000000000 +0200 ---- gcc-4_3/gcc/config/spu/spu.md 2008-09-10 20:09:59.000000000 +0200 -*************** -*** 1246,1252 **** - (use (match_operand:<F2I> 2 "spu_reg_operand" "r"))] - "" - "#" -! "" - [(set (match_dup:<F2I> 3) - (and:<F2I> (match_dup:<F2I> 4) - (match_dup:<F2I> 2)))] ---- 1246,1252 ---- - (use (match_operand:<F2I> 2 "spu_reg_operand" "r"))] - "" - "#" -! "split0_completed" - [(set (match_dup:<F2I> 3) - (and:<F2I> (match_dup:<F2I> 4) - (match_dup:<F2I> 2)))] -diff -crNp -x .svn gcc-4_3-orig/gcc/doc/tm.texi gcc-4_3/gcc/doc/tm.texi -*** gcc-4_3-orig/gcc/doc/tm.texi 2008-09-10 22:09:25.000000000 +0200 ---- gcc-4_3/gcc/doc/tm.texi 2008-09-10 21:43:46.000000000 +0200 -*************** optimizations before this pass work bett -*** 10384,10386 **** ---- 10384,10392 ---- - instructions, and the optimizations right after this pass (e.g., CSE and - combine) are be able to optimize the split instructions. - @end defmac -+ -+ @defmac ADDRESSES_NEVER_TRAP -+ Define this macro if memory accesses will never cause a trap. -+ This is the case for example on the Cell SPU processor. -+ @end defmac -+ -diff -crNp -x .svn gcc-4_3-orig/gcc/rtlanal.c gcc-4_3/gcc/rtlanal.c -*** gcc-4_3-orig/gcc/rtlanal.c 2008-03-05 19:44:55.000000000 +0100 ---- gcc-4_3/gcc/rtlanal.c 2008-09-10 21:18:53.000000000 +0200 -*************** rtx_varies_p (const_rtx x, bool for_alia -*** 265,270 **** ---- 265,274 ---- - static int - rtx_addr_can_trap_p_1 (const_rtx x, enum machine_mode mode, bool unaligned_mems) - { -+ #ifdef ADDRESSES_NEVER_TRAP -+ /* On some processors, like the SPU, memory accesses never trap. */ -+ return 0; -+ #else - enum rtx_code code = GET_CODE (x); - - switch (code) -*************** rtx_addr_can_trap_p_1 (const_rtx x, enum -*** 344,349 **** ---- 348,354 ---- - - /* If it isn't one of the case above, it can cause a trap. */ - return 1; -+ #endif - } - - /* Return nonzero if the use of X as an address in a MEM can cause a trap. */ +Index: gcc-4.3.4-20090804/gcc/config/spu/spu.c +=================================================================== +--- gcc-4.3.4-20090804.orig/gcc/config/spu/spu.c 2009-09-21 11:47:27.000000000 +0200 ++++ gcc-4.3.4-20090804/gcc/config/spu/spu.c 2009-09-21 11:47:38.000000000 +0200 +@@ -4269,7 +4269,10 @@ spu_split_load (rtx * ops) + + rot = 0; + rot_amt = 0; +- if (GET_CODE (addr) == PLUS) ++ ++ if (MEM_ALIGN (ops[1]) >= 128) ++ /* Address is already aligned; simply perform a TImode load. */; ++ else if (GET_CODE (addr) == PLUS) + { + /* 8 cases: + aligned reg + aligned reg => lqx +@@ -4380,6 +4383,14 @@ spu_split_load (rtx * ops) + rot_amt = 0; + } + ++ /* If the source is properly aligned, we don't need to split this insn into ++ a TImode load plus a _spu_convert. However, we want to perform the split ++ anyway when optimizing to make the MEMs look the same as those used for ++ stores so they are more easily merged. When *not* optimizing, that will ++ not happen anyway, so we prefer to avoid generating the _spu_convert. */ ++ if (!rot && !rot_amt && !optimize) ++ return 0; ++ + load = gen_reg_rtx (TImode); + + mem = change_address (ops[1], TImode, copy_rtx (addr)); +Index: gcc-4.3.4-20090804/gcc/config/spu/spu.h +=================================================================== +--- gcc-4.3.4-20090804.orig/gcc/config/spu/spu.h 2009-09-21 11:47:27.000000000 +0200 ++++ gcc-4.3.4-20090804/gcc/config/spu/spu.h 2009-09-21 11:47:38.000000000 +0200 +@@ -641,6 +641,8 @@ extern GTY(()) rtx spu_compare_op1; + + #define SPLIT_BEFORE_CSE2 1 + ++#define ADDRESSES_NEVER_TRAP 1 ++ + + /* Builtins. */ + +Index: gcc-4.3.4-20090804/gcc/config/spu/spu.md +=================================================================== +--- gcc-4.3.4-20090804.orig/gcc/config/spu/spu.md 2009-09-21 11:47:27.000000000 +0200 ++++ gcc-4.3.4-20090804/gcc/config/spu/spu.md 2009-09-21 11:47:38.000000000 +0200 +@@ -1249,7 +1249,7 @@ + (use (match_operand:<F2I> 2 "spu_reg_operand" "r"))] + "" + "#" +- "" ++ "split0_completed" + [(set (match_dup:<F2I> 3) + (and:<F2I> (match_dup:<F2I> 4) + (match_dup:<F2I> 2)))] +Index: gcc-4.3.4-20090804/gcc/doc/tm.texi +=================================================================== +--- gcc-4.3.4-20090804.orig/gcc/doc/tm.texi 2009-09-21 11:47:27.000000000 +0200 ++++ gcc-4.3.4-20090804/gcc/doc/tm.texi 2009-09-21 11:47:38.000000000 +0200 +@@ -10395,3 +10395,9 @@ optimizations before this pass work bett + instructions, and the optimizations right after this pass (e.g., CSE and + combine) are be able to optimize the split instructions. + @end defmac ++ ++@defmac ADDRESSES_NEVER_TRAP ++Define this macro if memory accesses will never cause a trap. ++This is the case for example on the Cell SPU processor. ++@end defmac ++ +Index: gcc-4.3.4-20090804/gcc/rtlanal.c +=================================================================== +--- gcc-4.3.4-20090804.orig/gcc/rtlanal.c 2009-09-21 11:42:15.000000000 +0200 ++++ gcc-4.3.4-20090804/gcc/rtlanal.c 2009-09-21 11:47:38.000000000 +0200 +@@ -266,6 +266,10 @@ static int + rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size, + enum machine_mode mode, bool unaligned_mems) + { ++#ifdef ADDRESSES_NEVER_TRAP ++ /* On some processors, like the SPU, memory accesses never trap. */ ++ return 0; ++#else + enum rtx_code code = GET_CODE (x); + + if (STRICT_ALIGNMENT +@@ -382,6 +386,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST + + /* If it isn't one of the case above, it can cause a trap. */ + return 1; ++#endif + } + + /* Return nonzero if the use of X as an address in a MEM can cause a trap. */ ++++++ ibm-vector-keyword-1 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -42,8 +42,8 @@ Index: gcc/doc/extend.texi =================================================================== ---- gcc/doc/extend.texi.orig 2008-08-05 13:59:49.000000000 +0200 -+++ gcc/doc/extend.texi 2008-08-05 14:00:09.000000000 +0200 +--- gcc/doc/extend.texi.orig 2009-09-21 11:45:56.000000000 +0200 ++++ gcc/doc/extend.texi 2009-09-21 11:45:58.000000000 +0200 @@ -8897,9 +8897,10 @@ always specify the signedness. @item @@ -61,7 +61,7 @@ Index: gcc/testsuite/gcc.target/powerpc/altivec-macros.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ gcc/testsuite/gcc.target/powerpc/altivec-macros.c 2008-08-05 14:00:09.000000000 +0200 ++++ gcc/testsuite/gcc.target/powerpc/altivec-macros.c 2009-09-21 11:45:58.000000000 +0200 @@ -0,0 +1,63 @@ +/* Copyright (C) 2007 Free Software Foundation, Inc. */ + @@ -129,7 +129,7 @@ Index: gcc/testsuite/gcc.target/powerpc/altivec-26.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ gcc/testsuite/gcc.target/powerpc/altivec-26.c 2008-08-05 14:00:09.000000000 +0200 ++++ gcc/testsuite/gcc.target/powerpc/altivec-26.c 2009-09-21 11:45:58.000000000 +0200 @@ -0,0 +1,11 @@ +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ @@ -145,7 +145,7 @@ Index: gcc/testsuite/gcc.dg/vmx/1b-07-ansi.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ gcc/testsuite/gcc.dg/vmx/1b-07-ansi.c 2008-08-05 14:00:09.000000000 +0200 ++++ gcc/testsuite/gcc.dg/vmx/1b-07-ansi.c 2009-09-21 11:45:58.000000000 +0200 @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-options "-ansi -maltivec" } */ @@ -208,8 +208,8 @@ +vector float _2674 ; Index: gcc/testsuite/gcc.dg/vmx/1b-07.c =================================================================== ---- gcc/testsuite/gcc.dg/vmx/1b-07.c.orig 2008-02-19 10:53:21.000000000 +0100 -+++ gcc/testsuite/gcc.dg/vmx/1b-07.c 2008-08-05 14:00:09.000000000 +0200 +--- gcc/testsuite/gcc.dg/vmx/1b-07.c.orig 2009-09-21 11:45:56.000000000 +0200 ++++ gcc/testsuite/gcc.dg/vmx/1b-07.c 2009-09-21 11:45:58.000000000 +0200 @@ -6,7 +6,6 @@ vector char unsigned _56 ; vector unsigned char _64 ; vector char signed _112 ; @@ -221,7 +221,7 @@ Index: gcc/testsuite/gcc.dg/vmx/1b-06-ansi.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ gcc/testsuite/gcc.dg/vmx/1b-06-ansi.c 2008-08-05 14:00:09.000000000 +0200 ++++ gcc/testsuite/gcc.dg/vmx/1b-06-ansi.c 2009-09-21 11:45:58.000000000 +0200 @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-ansi -maltivec" } */ @@ -249,8 +249,8 @@ +vector float _339 ; Index: gcc/testsuite/gcc.dg/vmx/1b-06.c =================================================================== ---- gcc/testsuite/gcc.dg/vmx/1b-06.c.orig 2008-02-19 10:53:21.000000000 +0100 -+++ gcc/testsuite/gcc.dg/vmx/1b-06.c 2008-08-05 14:00:09.000000000 +0200 +--- gcc/testsuite/gcc.dg/vmx/1b-06.c.orig 2009-09-21 11:45:56.000000000 +0200 ++++ gcc/testsuite/gcc.dg/vmx/1b-06.c 2009-09-21 11:45:58.000000000 +0200 @@ -3,7 +3,6 @@ vector char bool _4 ; vector char unsigned _31 ; @@ -261,8 +261,8 @@ vector short bool _102 ; Index: gcc/coretypes.h =================================================================== ---- gcc/coretypes.h.orig 2008-02-19 10:56:00.000000000 +0100 -+++ gcc/coretypes.h 2008-08-05 14:00:09.000000000 +0200 +--- gcc/coretypes.h.orig 2009-09-21 11:45:56.000000000 +0200 ++++ gcc/coretypes.h 2009-09-21 11:45:58.000000000 +0200 @@ -60,9 +60,11 @@ enum ir_type { /* Provide forward struct declaration so that we don't have to include @@ -278,8 +278,8 @@ or SYMBOL_REF. This isn't used much, but both trees and RTL refer Index: gcc/c-common.h =================================================================== ---- gcc/c-common.h.orig 2008-02-19 10:56:00.000000000 +0100 -+++ gcc/c-common.h 2008-08-05 14:01:13.000000000 +0200 +--- gcc/c-common.h.orig 2009-09-21 11:45:56.000000000 +0200 ++++ gcc/c-common.h 2009-09-21 11:45:58.000000000 +0200 @@ -180,6 +180,8 @@ enum c_tree_index CTI_MAX }; @@ -291,8 +291,8 @@ /* Identifier part common to the C front ends. Inherits from Index: gcc/config/rs6000/rs6000-c.c =================================================================== ---- gcc/config/rs6000/rs6000-c.c.orig 2008-02-19 10:55:53.000000000 +0100 -+++ gcc/config/rs6000/rs6000-c.c 2008-08-05 14:00:09.000000000 +0200 +--- gcc/config/rs6000/rs6000-c.c.orig 2009-09-21 11:45:56.000000000 +0200 ++++ gcc/config/rs6000/rs6000-c.c 2009-09-21 11:45:58.000000000 +0200 @@ -84,6 +84,149 @@ rs6000_pragma_longcall (cpp_reader *pfil #define builtin_define(TXT) cpp_define (pfile, TXT) #define builtin_assert(TXT) cpp_assert (pfile, TXT) @@ -462,12 +462,12 @@ + cpp_get_callbacks (pfile)->macro_to_expand = rs6000_macro_to_expand; + } } - if (TARGET_SPE) - builtin_define ("__SPE__"); + if (rs6000_cpu == PROCESSOR_CELL) + builtin_define ("__PPU__"); Index: libcpp/macro.c =================================================================== ---- libcpp/macro.c.orig 2008-02-19 10:59:44.000000000 +0100 -+++ libcpp/macro.c 2008-08-05 14:00:09.000000000 +0200 +--- libcpp/macro.c.orig 2009-09-21 11:45:56.000000000 +0200 ++++ libcpp/macro.c 2009-09-21 11:45:58.000000000 +0200 @@ -1224,16 +1224,21 @@ cpp_get_token (cpp_reader *pfile) if (!(node->flags & NODE_DISABLED)) @@ -565,8 +565,8 @@ Index: libcpp/include/cpplib.h =================================================================== ---- libcpp/include/cpplib.h.orig 2008-02-19 10:59:42.000000000 +0100 -+++ libcpp/include/cpplib.h 2008-08-05 14:01:51.000000000 +0200 +--- libcpp/include/cpplib.h.orig 2009-09-21 11:45:56.000000000 +0200 ++++ libcpp/include/cpplib.h 2009-09-21 11:45:58.000000000 +0200 @@ -476,6 +476,10 @@ struct cpp_callbacks void (*read_pch) (cpp_reader *, const char *, int, const char *); missing_header_cb missing_header; @@ -607,8 +607,8 @@ extern cppchar_t cpp_interpret_charconst (cpp_reader *, const cpp_token *, Index: libcpp/internal.h =================================================================== ---- libcpp/internal.h.orig 2008-02-19 10:59:44.000000000 +0100 -+++ libcpp/internal.h 2008-08-05 14:00:09.000000000 +0200 +--- libcpp/internal.h.orig 2009-09-21 11:45:56.000000000 +0200 ++++ libcpp/internal.h 2009-09-21 11:45:58.000000000 +0200 @@ -527,6 +527,7 @@ extern const unsigned char *_cpp_builtin extern int _cpp_warn_if_unused_macro (cpp_reader *, cpp_hashnode *, void *); extern void _cpp_push_token_context (cpp_reader *, cpp_hashnode *, @@ -619,8 +619,8 @@ extern void _cpp_init_hashtable (cpp_reader *, hash_table *); Index: libcpp/lex.c =================================================================== ---- libcpp/lex.c.orig 2008-02-19 10:59:44.000000000 +0100 -+++ libcpp/lex.c 2008-08-05 14:00:09.000000000 +0200 +--- libcpp/lex.c.orig 2009-09-21 11:45:56.000000000 +0200 ++++ libcpp/lex.c 2009-09-21 11:45:58.000000000 +0200 @@ -730,6 +730,49 @@ next_tokenrun (tokenrun *run) return run->next; } ++++++ ibm-vector-keyword-3 ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -15,8 +15,8 @@ Index: gcc/testsuite/gcc.target/spu/vector.c =================================================================== ---- gcc/testsuite/gcc.target/spu/vector.c (revision 0) -+++ gcc/testsuite/gcc.target/spu/vector.c (revision 138106) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/spu/vector.c 2009-09-21 11:47:07.000000000 +0200 @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "" } */ @@ -52,8 +52,8 @@ +vector double vd; Index: gcc/testsuite/gcc.target/spu/vector-ansi.c =================================================================== ---- gcc/testsuite/gcc.target/spu/vector-ansi.c (revision 0) -+++ gcc/testsuite/gcc.target/spu/vector-ansi.c (revision 138106) +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/spu/vector-ansi.c 2009-09-21 11:47:07.000000000 +0200 @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-ansi" } */ @@ -92,10 +92,10 @@ +vector double vd; Index: gcc/config/spu/spu-c.c =================================================================== ---- gcc/config/spu/spu-c.c (revision 138105) -+++ gcc/config/spu/spu-c.c (revision 138106) -@@ -35,6 +35,64 @@ - #include "spu-builtins.h" +--- gcc/config/spu/spu-c.c.orig 2009-09-21 11:42:15.000000000 +0200 ++++ gcc/config/spu/spu-c.c 2009-09-21 11:47:07.000000000 +0200 +@@ -34,6 +34,64 @@ + #include "optabs.h"  +/* Keep the vector keywords handy for fast comparisons. */ @@ -159,7 +159,7 @@ /* target hook for resolve_overloaded_builtin(). Returns a function call RTX if we can resolve the overloaded builtin */ tree -@@ -140,6 +198,22 @@ spu_cpu_cpp_builtins (struct cpp_reader +@@ -142,6 +200,22 @@ spu_cpu_cpp_builtins (struct cpp_reader if (spu_arch == PROCESSOR_CELLEDP) builtin_define_std ("__SPU_EDP__"); builtin_define_std ("__vector=__attribute__((__spu_vector__))"); ++++++ intel303993-aes.diff ++++++ ++++ 2924 lines (skipped) ++++ between gcc43/intel303993-aes.diff ++++ and /mounts/work_src_done/STABLE/gcc43/intel303993-aes.diff ++++++ libjava-no-multilib.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,33 +1,31 @@ Index: libjava/configure =================================================================== -*** libjava/configure.orig 2007-10-31 17:24:49.000000000 +0100 ---- libjava/configure 2007-11-03 22:03:29.000000000 +0100 -*************** else -*** 1848,1853 **** ---- 1848,1873 ---- - fi - - -+ # Default to --enable-libjava-multilib -+ # Check whether --enable-libjava-multilib or --disable-libjava-multilib was given. -+ if test "${enable_libjava_multilib+set}" = set; then -+ enableval="$enable_libjava_multilib" -+ case "${enableval}" in -+ yes) multilib=yes ;; -+ no) multilib=no ;; -+ *) { { echo "$as_me:$LINENO: error: bad value ${enableval} for libjava-multilib option" >&5 -+ echo "$as_me: error: bad value ${enableval} for libjava-multilib option" >&2;} -+ { (exit 1); exit 1; }; } ;; -+ esac -+ else -+ multilib=yes -+ fi; -+ if test "$multilib" = no; then -+ # Reset also --enable-multilib state, as that is what is looked at -+ # by config-ml.in -+ ac_configure_args="$ac_configure_args --disable-multilib" -+ fi -+ - # It may not be safe to run linking tests in AC_PROG_CC/AC_PROG_CXX. - - +--- libjava/configure.orig 2009-11-20 13:50:17.000000000 +0100 ++++ libjava/configure 2009-11-20 13:50:18.000000000 +0100 +@@ -1850,6 +1850,26 @@ else + fi + + ++# Default to --enable-libjava-multilib ++# Check whether --enable-libjava-multilib or --disable-libjava-multilib was given. ++if test "${enable_libjava_multilib+set}" = set; then ++ enableval="$enable_libjava_multilib" ++ case "${enableval}" in ++ yes) multilib=yes ;; ++ no) multilib=no ;; ++ *) { { echo "$as_me:$LINENO: error: bad value ${enableval} for libjava-multilib option" >&5 ++echo "$as_me: error: bad value ${enableval} for libjava-multilib option" >&2;} ++ { (exit 1); exit 1; }; } ;; ++ esac ++else ++ multilib=yes ++fi; ++if test "$multilib" = no; then ++# Reset also --enable-multilib state, as that is what is looked at ++# by config-ml.in ++ ac_configure_args="$ac_configure_args --disable-multilib" ++fi ++ + # It may not be safe to run linking tests in AC_PROG_CC/AC_PROG_CXX. + + ++++++ nvl423594.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,6 +1,8 @@ ---- /space/rguenther/src/svn/gcc-4_3-branch/gcc/tree-gimple.h 2008-02-19 10:55:59.000000000 +0100 -+++ gcc/tree-gimple.h 2008-09-15 12:10:46.000000000 +0200 -@@ -119,6 +119,7 @@ +Index: gcc/tree-gimple.h +=================================================================== +--- gcc/tree-gimple.h.orig 2008-02-19 10:55:59.000000000 +0100 ++++ gcc/tree-gimple.h 2009-11-20 13:50:36.000000000 +0100 +@@ -119,6 +119,7 @@ extern void gimplify_body (tree *, tree, extern void push_gimplify_context (void); extern void pop_gimplify_context (tree); extern void gimplify_and_add (tree, tree *); @@ -8,9 +10,11 @@ /* Miscellaneous helpers. */ extern void gimple_add_tmp_var (tree); ---- /space/rguenther/src/svn/gcc-4_3-branch/gcc/gimplify.c 2008-09-04 16:09:13.000000000 +0200 -+++ gcc/gimplify.c 2008-09-15 12:58:13.000000000 +0200 -@@ -6695,4 +6749,20 @@ +Index: gcc/gimplify.c +=================================================================== +--- gcc/gimplify.c.orig 2009-11-20 13:50:29.000000000 +0100 ++++ gcc/gimplify.c 2009-11-20 13:50:36.000000000 +0100 +@@ -6751,4 +6751,20 @@ force_gimple_operand_bsi (block_stmt_ite return expr; } @@ -31,9 +35,11 @@ +} + #include "gt-gimplify.h" ---- /space/rguenther/src/svn/gcc-4_3-branch/gcc/tree-sra.c 2008-02-19 10:56:00.000000000 +0100 -+++ gcc/tree-sra.c 2008-09-15 12:10:55.000000000 +0200 -@@ -2186,7 +2186,7 @@ +Index: gcc/tree-sra.c +=================================================================== +--- gcc/tree-sra.c.orig 2009-01-07 11:02:13.000000000 +0100 ++++ gcc/tree-sra.c 2009-11-20 13:50:36.000000000 +0100 +@@ -2186,7 +2186,7 @@ sra_build_assignment (tree dst, tree src stmt = build_gimple_modify_stmt (stmp, fold_build1 (VIEW_CONVERT_EXPR, stype, var)); @@ -42,8 +48,10 @@ var = stmp; } ---- /dev/null 2008-06-06 22:36:48.000000000 +0200 -+++ gcc/testsuite/gcc.c-torture/compile/nvl423594.c 2008-09-15 13:05:25.000000000 +0200 +Index: gcc/testsuite/gcc.c-torture/compile/nvl423594.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.c-torture/compile/nvl423594.c 2009-11-20 13:50:36.000000000 +0100 @@ -0,0 +1,16 @@ +void Deactivate(void); +typedef struct { ++++++ nvl425783.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -7,9 +7,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc/config/rs6000/rs6000.c (revision 140242) -+++ gcc/config/rs6000/rs6000.c (working copy) -@@ -3630,19 +3630,29 @@ rs6000_legitimize_address (rtx x, rtx ol +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:47.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:49.000000000 +0100 +@@ -3634,19 +3634,29 @@ rs6000_legitimize_address (rtx x, rtx ol /* We accept [reg + reg] and [reg + OFFSET]. */ if (GET_CODE (x) == PLUS) @@ -23,14 +23,13 @@ - && (GET_CODE (op2) != CONST_INT - || !SPE_CONST_OFFSET_OK (INTVAL (op2)))) - op2 = force_reg (Pmode, op2); -- -- return gen_rtx_PLUS (Pmode, op1, op2); -- } + { + rtx op1 = XEXP (x, 0); + rtx op2 = XEXP (x, 1); + rtx y; -+ + +- return gen_rtx_PLUS (Pmode, op1, op2); +- } + op1 = force_reg (Pmode, op1); + + if (GET_CODE (op2) != REG ++++++ nvl425784.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -11,9 +11,9 @@ Index: gcc/config/rs6000/rs6000.h =================================================================== ---- gcc/config/rs6000/rs6000.h (revision 140242) -+++ gcc/config/rs6000/rs6000.h (working copy) -@@ -596,6 +596,7 @@ extern enum rs6000_nop_insertion rs6000_ +--- gcc/config/rs6000/rs6000.h.orig 2009-11-20 13:51:43.000000000 +0100 ++++ gcc/config/rs6000/rs6000.h 2009-11-20 13:51:50.000000000 +0100 +@@ -618,6 +618,7 @@ extern enum rs6000_nop_insertion rs6000_ Make vector constants quadword aligned. */ #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ (TREE_CODE (EXP) == STRING_CST \ ++++++ nvl425788.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -7,9 +7,9 @@ Index: gcc/config/rs6000/rs6000.h =================================================================== ---- gcc.orig/config/rs6000/rs6000.h 2008-09-10 16:22:31.000000000 -0300 -+++ gcc/config/rs6000/rs6000.h 2008-09-10 16:55:58.000000000 -0300 -@@ -619,12 +619,15 @@ +--- gcc/config/rs6000/rs6000.h.orig 2009-11-20 13:51:50.000000000 +0100 ++++ gcc/config/rs6000/rs6000.h 2009-11-20 13:51:52.000000000 +0100 +@@ -642,12 +642,15 @@ extern enum rs6000_nop_insertion rs6000_ /* Define this macro to be the value 1 if unaligned accesses have a cost many times greater than aligned accesses, for example if they are emulated in a trap handler. */ ++++++ nvl425789.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -7,7 +7,7 @@ Index: gcc/testsuite/gcc.target/powerpc/darwin-save-world-1.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ gcc/testsuite/gcc.target/powerpc/darwin-save-world-1.c 2008-09-10 17:37:44.000000000 -0300 ++++ gcc/testsuite/gcc.target/powerpc/darwin-save-world-1.c 2009-11-20 13:51:53.000000000 +0100 @@ -0,0 +1,18 @@ +/* { dg-do run { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ @@ -29,9 +29,9 @@ +} Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:37:37.000000000 -0300 -+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:37:44.000000000 -0300 -@@ -14212,6 +14212,9 @@ +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:49.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:53.000000000 +0100 +@@ -14232,6 +14232,9 @@ compute_save_world_info (rs6000_stack_t will attempt to save it. */ info_ptr->vrsave_size = 4; ++++++ nvl425791.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -8,9 +8,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc/config/rs6000/rs6000.c (revision 140242) -+++ gcc/config/rs6000/rs6000.c (working copy) -@@ -3582,6 +3582,7 @@ rs6000_legitimize_address (rtx x, rtx ol +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:53.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:55.000000000 +0100 +@@ -3586,6 +3586,7 @@ rs6000_legitimize_address (rtx x, rtx ol && GET_CODE (XEXP (x, 1)) == CONST_INT && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (x, 1)) + 0x8000) >= 0x10000 && !(SPE_VECTOR_MODE (mode) @@ -18,7 +18,7 @@ || (TARGET_E500_DOUBLE && (mode == DFmode || mode == TFmode || mode == DImode)))) { -@@ -3599,11 +3600,12 @@ rs6000_legitimize_address (rtx x, rtx ol +@@ -3603,11 +3604,12 @@ rs6000_legitimize_address (rtx x, rtx ol && GET_MODE_NUNITS (mode) == 1 && ((TARGET_HARD_FLOAT && TARGET_FPRS) || TARGET_POWERPC64 ++++++ nvl425798-1.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -7,8 +7,8 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:29:26.000000000 -0300 -+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:35:02.000000000 -0300 +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:55.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:57.000000000 +0100 @@ -1,6 +1,6 @@ /* Subroutines used for code generation on IBM RS/6000. Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, @@ -17,7 +17,7 @@ Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) -@@ -16246,6 +16246,10 @@ +@@ -16281,6 +16281,10 @@ rs6000_output_function_prologue (FILE *f rs6000_pic_labelno++; } @@ -28,7 +28,7 @@ /* Emit function epilogue as insns. At present, dwarf2out_frame_debug_expr doesn't understand -@@ -16285,9 +16289,14 @@ +@@ -16320,9 +16324,14 @@ rs6000_emit_epilogue (int sibcall) || current_function_calls_eh_return || info->first_fp_reg_save == 64 || FP_SAVE_INLINE (info->first_fp_reg_save)); @@ -46,7 +46,7 @@ using_mtcr_multiple = (rs6000_cpu == PROCESSOR_PPC601 || rs6000_cpu == PROCESSOR_PPC603 || rs6000_cpu == PROCESSOR_PPC750 -@@ -16392,8 +16401,9 @@ +@@ -16427,8 +16436,9 @@ rs6000_emit_epilogue (int sibcall) stack. */ if (TARGET_ALTIVEC_ABI && info->altivec_size != 0 @@ -58,7 +58,7 @@ { int i; -@@ -16404,6 +16414,8 @@ +@@ -16439,6 +16449,8 @@ rs6000_emit_epilogue (int sibcall) gen_rtx_MEM (Pmode, sp_reg_rtx)); sp_offset = 0; } @@ -67,7 +67,7 @@ for (i = info->first_altivec_reg_save; i <= LAST_ALTIVEC_REGNO; ++i) if (info->vrsave_mask & ALTIVEC_REG_BIT (i)) -@@ -16428,18 +16440,23 @@ +@@ -16463,18 +16475,23 @@ rs6000_emit_epilogue (int sibcall) if (TARGET_ALTIVEC && TARGET_ALTIVEC_VRSAVE && info->vrsave_mask != 0 @@ -99,7 +99,7 @@ } addr = gen_rtx_PLUS (Pmode, frame_reg_rtx, -@@ -16451,17 +16468,11 @@ +@@ -16486,17 +16503,11 @@ rs6000_emit_epilogue (int sibcall) emit_insn (generate_set_vrsave (reg, info, 1)); } @@ -120,7 +120,7 @@ { /* Under V.4, don't reset the stack pointer until after we're done loading the saved registers. */ -@@ -16472,6 +16483,30 @@ +@@ -16507,6 +16518,30 @@ rs6000_emit_epilogue (int sibcall) gen_rtx_MEM (Pmode, sp_reg_rtx)); sp_offset = 0; } @@ -151,7 +151,7 @@ } else if (info->push_p && DEFAULT_ABI != ABI_V4 -@@ -16486,7 +16521,8 @@ +@@ -16521,7 +16556,8 @@ rs6000_emit_epilogue (int sibcall) } /* Restore AltiVec registers if we have not done so already. */ @@ -161,7 +161,7 @@ && info->altivec_size != 0 && (DEFAULT_ABI == ABI_V4 || info->altivec_save_offset >= (TARGET_32BIT ? -220 : -288))) -@@ -16513,7 +16549,8 @@ +@@ -16548,7 +16584,8 @@ rs6000_emit_epilogue (int sibcall) } /* Restore VRSAVE if we have not done so already. */ ++++++ nvl425798-2.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -8,9 +8,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:35:02.000000000 -0300 -+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:35:43.000000000 -0300 -@@ -16295,6 +16295,9 @@ +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:57.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:59.000000000 +0100 +@@ -16330,6 +16330,9 @@ rs6000_emit_epilogue (int sibcall) frame pointer for alloca, but the generic parts of the compiler give us one anyway. */ use_backchain_to_restore_sp = (info->total_size > 32767 ++++++ nvl425799.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -5,9 +5,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:07:35.000000000 -0300 -+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:07:50.000000000 -0300 -@@ -4245,8 +4245,7 @@ +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:59.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:52:01.000000000 +0100 +@@ -4261,8 +4261,7 @@ rs6000_mode_dependent_address (rtx addr) case LO_SUM: return true; ++++++ nvl425806.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -5,9 +5,9 @@ Index: gcc/config/rs6000/rs6000.c =================================================================== ---- gcc.orig/config/rs6000/rs6000.c 2008-09-10 17:37:30.000000000 -0300 -+++ gcc/config/rs6000/rs6000.c 2008-09-10 17:37:37.000000000 -0300 -@@ -21387,6 +21387,12 @@ +--- gcc/config/rs6000/rs6000.c.orig 2009-11-20 13:51:43.000000000 +0100 ++++ gcc/config/rs6000/rs6000.c 2009-11-20 13:51:47.000000000 +0100 +@@ -21368,6 +21368,12 @@ rs6000_register_move_cost (enum machine_ else if (from == CR_REGS) return 4; ++++++ nvl434500.patch ++++++ ++++ 3251 lines (skipped) ++++ between gcc43/nvl434500.patch ++++ and /mounts/work_src_done/STABLE/gcc43/nvl434500.patch ++++++ nvl436041.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -8,8 +8,8 @@ Index: gcc/config/s390/s390.h =================================================================== ---- gcc/config/s390/s390.h (revision 141137) -+++ gcc/config/s390/s390.h (revision 141138) +--- gcc/config/s390/s390.h.orig 2009-11-20 13:51:33.000000000 +0100 ++++ gcc/config/s390/s390.h 2009-11-20 13:52:07.000000000 +0100 @@ -89,7 +89,7 @@ extern enum processor_flags s390_arch_fl #define TARGET_EXTIMM \ (TARGET_ZARCH && TARGET_CPU_EXTIMM) @@ -21,9 +21,9 @@ Index: gcc/config/s390/s390.md =================================================================== ---- gcc/config/s390/s390.md (revision 141137) -+++ gcc/config/s390/s390.md (revision 141138) -@@ -3818,7 +3818,7 @@ (define_expand "fixuns_truncdddi2" +--- gcc/config/s390/s390.md.orig 2009-11-20 13:51:41.000000000 +0100 ++++ gcc/config/s390/s390.md 2009-11-20 13:52:07.000000000 +0100 +@@ -3817,7 +3817,7 @@ (unsigned_fix:DI (match_operand:DD 1 "register_operand" ""))) (clobber (match_scratch:TD 2 "=f"))])] @@ -32,7 +32,7 @@ { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); -@@ -3850,7 +3850,7 @@ (define_expand "fixuns_truncdddi2" +@@ -3849,7 +3849,7 @@ (define_expand "fixuns_trunctddi2" [(set (match_operand:DI 0 "register_operand" "") (unsigned_fix:DI (match_operand:TD 1 "register_operand" "")))] @@ -41,7 +41,7 @@ { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); -@@ -3939,7 +3939,7 @@ (define_insn "fix_trunc<BFP:mode><GPR:mo +@@ -3938,7 +3938,7 @@ (define_expand "fix_trunc<mode>di2" [(set (match_operand:DI 0 "register_operand" "") (fix:DI (match_operand:DFP 1 "nonimmediate_operand" "")))] @@ -50,7 +50,7 @@ { operands[1] = force_reg (<MODE>mode, operands[1]); emit_insn (gen_fix_trunc<mode>di2_dfp (operands[0], operands[1], -@@ -3953,7 +3953,7 @@ (define_insn "fix_trunc<DFP:mode>di2_dfp +@@ -3952,7 +3952,7 @@ (fix:DI (match_operand:DFP 1 "register_operand" "f"))) (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC CC_REGNUM))] @@ -59,7 +59,7 @@ "cg<DFP:xde>tr\t%0,%h2,%1" [(set_attr "op_type" "RRF") (set_attr "type" "ftoidfp")]) -@@ -4029,7 +4029,7 @@ (define_insn "trunctddd2" +@@ -4028,7 +4028,7 @@ [(set (match_operand:DD 0 "register_operand" "=f") (float_truncate:DD (match_operand:TD 1 "register_operand" "f"))) (clobber (match_scratch:TD 2 "=f"))] @@ -68,7 +68,7 @@ "ldxtr\t%2,0,%1,0\;ldr\t%0,%2" [(set_attr "length" "6") (set_attr "type" "ftruncdd")]) -@@ -4037,7 +4037,7 @@ (define_insn "trunctddd2" +@@ -4036,7 +4036,7 @@ (define_insn "truncddsd2" [(set (match_operand:SD 0 "register_operand" "=f") (float_truncate:SD (match_operand:DD 1 "register_operand" "f")))] @@ -77,7 +77,7 @@ "ledtr\t%0,0,%1,0" [(set_attr "op_type" "RRF") (set_attr "type" "ftruncsd")]) -@@ -4065,7 +4065,7 @@ (define_insn "extend<DSF:mode><BFP:mode> +@@ -4064,7 +4064,7 @@ (define_insn "extendddtd2" [(set (match_operand:TD 0 "register_operand" "=f") (float_extend:TD (match_operand:DD 1 "register_operand" "f")))] @@ -86,7 +86,7 @@ "lxdtr\t%0,%1,0" [(set_attr "op_type" "RRF") (set_attr "type" "fsimptf")]) -@@ -4073,7 +4073,7 @@ (define_insn "extendddtd2" +@@ -4072,7 +4072,7 @@ (define_insn "extendsddd2" [(set (match_operand:DD 0 "register_operand" "=f") (float_extend:DD (match_operand:SD 1 "register_operand" "f")))] @@ -95,7 +95,7 @@ "ldetr\t%0,%1,0" [(set_attr "op_type" "RRF") (set_attr "type" "fsimptf")]) -@@ -4086,7 +4086,7 @@ (define_insn "*trunc<BFP:mode><DFP_ALL:m +@@ -4085,7 +4085,7 @@ (float_truncate:DFP_ALL (reg:BFP FPR2_REGNUM))) (use (reg:SI GPR0_REGNUM)) (clobber (reg:CC CC_REGNUM))] @@ -104,7 +104,7 @@ "pfpo") (define_insn "*trunc<DFP_ALL:mode><BFP:mode>2" -@@ -4094,7 +4094,7 @@ (define_insn "*trunc<DFP_ALL:mode><BFP:m +@@ -4093,7 +4093,7 @@ (float_truncate:BFP (reg:DFP_ALL FPR2_REGNUM))) (use (reg:SI GPR0_REGNUM)) (clobber (reg:CC CC_REGNUM))] @@ -113,7 +113,7 @@ "pfpo") (define_expand "trunc<BFP:mode><DFP_ALL:mode>2" -@@ -4107,7 +4107,7 @@ (define_expand "trunc<BFP:mode><DFP_ALL: +@@ -4106,7 +4106,7 @@ (clobber (reg:CC CC_REGNUM))]) (set (match_operand:DFP_ALL 0 "nonimmediate_operand" "") (reg:DFP_ALL FPR0_REGNUM))] @@ -122,7 +122,7 @@ && GET_MODE_SIZE (<BFP:MODE>mode) > GET_MODE_SIZE (<DFP_ALL:MODE>mode)" { HOST_WIDE_INT flags; -@@ -4128,7 +4128,7 @@ (define_expand "trunc<DFP_ALL:mode><BFP: +@@ -4127,7 +4127,7 @@ (use (reg:SI GPR0_REGNUM)) (clobber (reg:CC CC_REGNUM))]) (set (match_operand:BFP 0 "nonimmediate_operand" "") (reg:BFP FPR0_REGNUM))] @@ -131,7 +131,7 @@ && GET_MODE_SIZE (<DFP_ALL:MODE>mode) >= GET_MODE_SIZE (<BFP:MODE>mode)" { HOST_WIDE_INT flags; -@@ -4148,14 +4148,14 @@ (define_insn "*extend<BFP:mode><DFP_ALL: +@@ -4147,14 +4147,14 @@ [(set (reg:DFP_ALL FPR0_REGNUM) (float_extend:DFP_ALL (reg:BFP FPR2_REGNUM))) (use (reg:SI GPR0_REGNUM)) (clobber (reg:CC CC_REGNUM))] @@ -148,7 +148,7 @@ "pfpo") (define_expand "extend<BFP:mode><DFP_ALL:mode>2" -@@ -4168,7 +4168,7 @@ (define_expand "extend<BFP:mode><DFP_ALL +@@ -4167,7 +4167,7 @@ (clobber (reg:CC CC_REGNUM))]) (set (match_operand:DFP_ALL 0 "nonimmediate_operand" "") (reg:DFP_ALL FPR0_REGNUM))] @@ -157,7 +157,7 @@ && GET_MODE_SIZE (<BFP:MODE>mode) <= GET_MODE_SIZE (<DFP_ALL:MODE>mode)" { HOST_WIDE_INT flags; -@@ -4189,7 +4189,7 @@ (define_expand "extend<DFP_ALL:mode><BFP +@@ -4188,7 +4188,7 @@ (use (reg:SI GPR0_REGNUM)) (clobber (reg:CC CC_REGNUM))]) (set (match_operand:BFP 0 "nonimmediate_operand" "") (reg:BFP FPR0_REGNUM))] @@ -166,7 +166,7 @@ && GET_MODE_SIZE (<DFP_ALL:MODE>mode) < GET_MODE_SIZE (<BFP:MODE>mode)" { HOST_WIDE_INT flags; -@@ -6775,7 +6775,7 @@ (define_insn "*neg<mode>2_cconly" +@@ -6774,7 +6774,7 @@ (define_insn "*neg<mode>2_nocc" [(set (match_operand:FP 0 "register_operand" "=f") (neg:FP (match_operand:FP 1 "register_operand" "<fT0>")))] @@ -175,7 +175,7 @@ "lcdfr\t%0,%1" [(set_attr "op_type" "RRE") (set_attr "type" "fsimp<mode>")]) -@@ -6891,7 +6891,7 @@ (define_insn "*abs<mode>2_cconly" +@@ -6890,7 +6890,7 @@ (define_insn "*abs<mode>2_nocc" [(set (match_operand:FP 0 "register_operand" "=f") (abs:FP (match_operand:FP 1 "register_operand" "<fT0>")))] @@ -184,7 +184,7 @@ "lpdfr\t%0,%1" [(set_attr "op_type" "RRE") (set_attr "type" "fsimp<mode>")]) -@@ -7000,7 +7000,7 @@ (define_insn "*negabs<mode>2_cconly" +@@ -6999,7 +6999,7 @@ (define_insn "*negabs<mode>2_nocc" [(set (match_operand:FP 0 "register_operand" "=f") (neg:FP (abs:FP (match_operand:BFP 1 "register_operand" "<fT0>"))))] @@ -193,7 +193,7 @@ "lndfr\t%0,%1" [(set_attr "op_type" "RRE") (set_attr "type" "fsimp<mode>")]) -@@ -7025,7 +7025,7 @@ (define_insn "copysign<mode>3" +@@ -7024,7 +7024,7 @@ (unspec:FP [(match_operand:FP 1 "register_operand" "<fT0>") (match_operand:FP 2 "register_operand" "f")] UNSPEC_COPYSIGN))] ++++++ nvl464739.patch ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -18,9 +18,9 @@ Index: gcc/ginclude/float.h =================================================================== ---- gcc/ginclude/float.h (revision 143163) -+++ gcc/ginclude/float.h (working copy) -@@ -214,13 +214,13 @@ +--- gcc/ginclude/float.h.orig 2009-11-20 13:52:02.000000000 +0100 ++++ gcc/ginclude/float.h 2009-11-20 13:52:12.000000000 +0100 +@@ -214,13 +214,13 @@ Boston, MA 02110-1301, USA. */ #define DEC64_MIN __DEC64_MIN__ #define DEC128_MIN __DEC128_MIN__ @@ -43,9 +43,9 @@ -1 indeterminate Index: gcc/real.c =================================================================== ---- gcc/real.c (revision 143163) -+++ gcc/real.c (working copy) -@@ -4324,8 +4324,8 @@ +--- gcc/real.c.orig 2009-10-19 13:18:20.000000000 +0200 ++++ gcc/real.c 2009-11-20 13:52:12.000000000 +0100 +@@ -4420,8 +4420,8 @@ const struct real_format decimal_single_ 10, 7, 7, @@ -56,7 +56,7 @@ 31, 31, false, -@@ -4345,8 +4345,8 @@ +@@ -4441,8 +4441,8 @@ const struct real_format decimal_double_ 10, 16, 16, @@ -67,7 +67,7 @@ 63, 63, false, -@@ -4366,8 +4366,8 @@ +@@ -4462,8 +4462,8 @@ const struct real_format decimal_quad_fo 10, 34, 34, @@ -80,9 +80,9 @@ false, Index: gcc/c-cppbuiltin.c =================================================================== ---- gcc/c-cppbuiltin.c (revision 143163) -+++ gcc/c-cppbuiltin.c (working copy) -@@ -280,7 +280,7 @@ +--- gcc/c-cppbuiltin.c.orig 2008-08-21 13:36:55.000000000 +0200 ++++ gcc/c-cppbuiltin.c 2009-11-20 13:52:12.000000000 +0100 +@@ -280,7 +280,7 @@ builtin_define_decimal_float_constants ( /* Compute the minimum representable value. */ sprintf (name, "__%s_MIN__", name_prefix); @@ -91,7 +91,7 @@ builtin_define_with_value (name, buf, 0); /* Compute the maximum representable value. */ -@@ -293,8 +293,9 @@ +@@ -293,8 +293,9 @@ builtin_define_decimal_float_constants ( *p++ = '.'; } *p = 0; @@ -103,7 +103,7 @@ builtin_define_with_value (name, buf, 0); /* Compute epsilon (the difference between 1 and least value greater -@@ -303,8 +304,8 @@ +@@ -303,8 +304,8 @@ builtin_define_decimal_float_constants ( sprintf (buf, "1E-%d%s", fmt->p - 1, suffix); builtin_define_with_value (name, buf, 0); @@ -114,7 +114,7 @@ p = buf; for (digits = fmt->p; digits > 1; digits--) { -@@ -313,7 +314,7 @@ +@@ -313,7 +314,7 @@ builtin_define_decimal_float_constants ( *p++ = '.'; } *p = 0; @@ -125,14 +125,14 @@ Index: gcc/testsuite/gcc.dg/dfp/decfloat-constants.c =================================================================== ---- gcc/testsuite/gcc.dg/dfp/decfloat-constants.c (revision 143163) -+++ gcc/testsuite/gcc.dg/dfp/decfloat-constants.c (working copy) +--- gcc/testsuite/gcc.dg/dfp/decfloat-constants.c.orig 2008-02-19 10:53:24.000000000 +0100 ++++ gcc/testsuite/gcc.dg/dfp/decfloat-constants.c 2009-11-20 13:52:12.000000000 +0100 @@ -14,36 +14,50 @@ #include <float.h> extern void abort (void); +static int failcnt; - ++ +/* Support compiling the test to report individual failures; default is + to abort as soon as a check fails. */ +#ifdef DBG @@ -141,40 +141,44 @@ +#else +#define FAILURE abort (); +#endif -+ + int main () { - if (DEC32_MANT_DIG != 7) abort(); - if (DEC64_MANT_DIG != 16) abort(); - if (DEC128_MANT_DIG != 34) abort(); -+ if (DEC32_MANT_DIG != 7) FAILURE -+ if (DEC64_MANT_DIG != 16) FAILURE -+ if (DEC128_MANT_DIG != 34) FAILURE - +- - if (DEC32_MIN_EXP != -95) abort(); - if (DEC64_MIN_EXP != -383) abort(); - if (DEC128_MIN_EXP != -6143) abort(); -+ if (DEC32_MIN_EXP != -94) FAILURE -+ if (DEC64_MIN_EXP != -382) FAILURE -+ if (DEC128_MIN_EXP != -6142) FAILURE - +- - if (DEC32_MAX_EXP != 96) abort(); - if (DEC64_MAX_EXP != 384) abort(); - if (DEC128_MAX_EXP != 6144) abort(); -+ if (DEC32_MAX_EXP != 97) FAILURE -+ if (DEC64_MAX_EXP != 385) FAILURE -+ if (DEC128_MAX_EXP != 6145) FAILURE - +- - if (DEC32_MAX != 9.999999E96DF) abort(); - if (DEC64_MAX != 9.999999999999999E384DD) abort(); - if (DEC128_MAX != 9.999999999999999999999999999999999E6144DL) abort(); -+ if (DEC32_MAX != 9.999999E96DF) FAILURE -+ if (DEC64_MAX != 9.999999999999999E384DD) FAILURE -+ if (DEC128_MAX != 9.999999999999999999999999999999999E6144DL) FAILURE - +- - if (DEC32_EPSILON != 1E-6DF) abort(); - if (DEC64_EPSILON != 1E-15DD) abort(); - if (DEC128_EPSILON != 1E-33DL) abort(); ++ if (DEC32_MANT_DIG != 7) FAILURE ++ if (DEC64_MANT_DIG != 16) FAILURE ++ if (DEC128_MANT_DIG != 34) FAILURE ++ ++ if (DEC32_MIN_EXP != -94) FAILURE ++ if (DEC64_MIN_EXP != -382) FAILURE ++ if (DEC128_MIN_EXP != -6142) FAILURE ++ ++ if (DEC32_MAX_EXP != 97) FAILURE ++ if (DEC64_MAX_EXP != 385) FAILURE ++ if (DEC128_MAX_EXP != 6145) FAILURE ++ ++ if (DEC32_MAX != 9.999999E96DF) FAILURE ++ if (DEC64_MAX != 9.999999999999999E384DD) FAILURE ++ if (DEC128_MAX != 9.999999999999999999999999999999999E6144DL) FAILURE ++ + if (DEC32_EPSILON != 1E-6DF) FAILURE + if (DEC64_EPSILON != 1E-15DD) FAILURE + if (DEC128_EPSILON != 1E-33DL) FAILURE @@ -182,20 +186,21 @@ - if (DEC32_MIN != 1E-95DF) abort(); - if (DEC64_MIN != 1E-383DD) abort(); - if (DEC128_MIN != 1E-6143DL) abort(); -+ if (DEC32_MIN != 1E-95DF) FAILURE -+ if (DEC64_MIN != 1E-383DD) FAILURE -+ if (DEC128_MIN != 1E-6143DL) FAILURE - +- - if (DEC32_DEN != 0.000001E-95DF) abort(); - if (DEC64_DEN != 0.000000000000001E-383DD) abort(); - if (DEC128_DEN != 0.000000000000000000000000000000001E-6143DL) abort(); ++ if (DEC32_MIN != 1E-95DF) FAILURE ++ if (DEC64_MIN != 1E-383DD) FAILURE ++ if (DEC128_MIN != 1E-6143DL) FAILURE ++ + if (DEC32_SUBNORMAL_MIN != 0.000001E-95DF) FAILURE + if (DEC64_SUBNORMAL_MIN != 0.000000000000001E-383DD) FAILURE + if (DEC128_SUBNORMAL_MIN != 0.000000000000000000000000000000001E-6143DL) + FAILURE - ++ + if (failcnt != 0) + abort (); -+ + return 0; } ++++++ pr27975.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -13,109 +13,85 @@ Index: gcc/doc/invoke.texi =================================================================== -*** gcc/doc/invoke.texi.orig 2008-06-25 11:47:35.000000000 +0200 ---- gcc/doc/invoke.texi 2008-09-02 16:58:34.000000000 +0200 -*************** Objective-C and Objective-C++ Dialects}. -*** 232,238 **** - -Wchar-subscripts -Wclobbered -Wcomment @gol - -Wconversion -Wcoverage-mismatch -Wno-deprecated-declarations @gol - -Wdisabled-optimization -Wno-div-by-zero @gol -! -Wempty-body -Wno-endif-labels @gol - -Werror -Werror=* @gol - -Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol - -Wno-format-extra-args -Wformat-nonliteral @gol ---- 232,238 ---- - -Wchar-subscripts -Wclobbered -Wcomment @gol - -Wconversion -Wcoverage-mismatch -Wno-deprecated-declarations @gol - -Wdisabled-optimization -Wno-div-by-zero @gol -! -Wempty-body -Wenum-compare -Wno-endif-labels @gol - -Werror -Werror=* @gol - -Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol - -Wno-format-extra-args -Wformat-nonliteral @gol -*************** while} statement. Additionally, in C++, -*** 3625,3630 **** ---- 3625,3635 ---- - in a @samp{while} or @samp{for} statement with no whitespacing before - the semicolon. This warning is also enabled by @option{-Wextra}. - -+ @item -Wenum-compare @r{(C++ and Objective-C++ only)} -+ @opindex Wenum-compare -+ @opindex Wno-enum-compare -+ Warn about a comparison between values of different enum types. -+ - @item -Wsign-compare - @opindex Wsign-compare - @opindex Wno-sign-compare +--- gcc/doc/invoke.texi.orig 2009-01-31 21:54:38.000000000 +0100 ++++ gcc/doc/invoke.texi 2009-11-20 13:50:32.000000000 +0100 +@@ -232,7 +232,7 @@ Objective-C and Objective-C++ Dialects}. + -Wchar-subscripts -Wclobbered -Wcomment @gol + -Wconversion -Wcoverage-mismatch -Wno-deprecated-declarations @gol + -Wdisabled-optimization -Wno-div-by-zero @gol +--Wempty-body -Wno-endif-labels @gol ++-Wempty-body -Wenum-compare -Wno-endif-labels @gol + -Werror -Werror=* @gol + -Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol + -Wno-format-extra-args -Wformat-nonliteral @gol +@@ -3626,6 +3626,11 @@ while} statement. Additionally, in C++, + in a @samp{while} or @samp{for} statement with no whitespacing before + the semicolon. This warning is also enabled by @option{-Wextra}. + ++@item -Wenum-compare @r{(C++ and Objective-C++ only)} ++@opindex Wenum-compare ++@opindex Wno-enum-compare ++Warn about a comparison between values of different enum types. ++ + @item -Wsign-compare + @opindex Wsign-compare + @opindex Wno-sign-compare Index: gcc/testsuite/g++.dg/warn/Wenum-compare-no.C =================================================================== -*** /dev/null 1970-01-01 00:00:00.000000000 +0000 ---- gcc/testsuite/g++.dg/warn/Wenum-compare-no.C 2008-09-02 16:57:58.000000000 +0200 -*************** -*** 0 **** ---- 1,10 ---- -+ /* Test disabling -Wenum-compare (on by default). See PR27975. */ -+ /* { dg-do compile } */ -+ /* { dg-options "-Wno-enum-compare" } */ -+ enum E1 { a }; -+ enum E2 { b }; -+ -+ int foo (E1 e1, E2 e2) -+ { -+ return e1 == e2; /* { dg-bogus "comparison between" } */ -+ } +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/g++.dg/warn/Wenum-compare-no.C 2009-11-20 13:50:32.000000000 +0100 +@@ -0,0 +1,10 @@ ++/* Test disabling -Wenum-compare (on by default). See PR27975. */ ++/* { dg-do compile } */ ++/* { dg-options "-Wno-enum-compare" } */ ++enum E1 { a }; ++enum E2 { b }; ++ ++int foo (E1 e1, E2 e2) ++{ ++ return e1 == e2; /* { dg-bogus "comparison between" } */ ++} Index: gcc/testsuite/g++.dg/warn/Wenum-compare.C =================================================================== -*** /dev/null 1970-01-01 00:00:00.000000000 +0000 ---- gcc/testsuite/g++.dg/warn/Wenum-compare.C 2008-09-02 16:57:58.000000000 +0200 -*************** -*** 0 **** ---- 1,10 ---- -+ /* Test that we get the -Wenum-compare by default. See PR27975. */ -+ /* { dg-do compile } */ -+ /* { dg-options "" } */ -+ enum E1 { a }; -+ enum E2 { b }; -+ -+ int foo (E1 e1, E2 e2) -+ { -+ return e1 == e2; /* { dg-warning "comparison between" } */ -+ } +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/g++.dg/warn/Wenum-compare.C 2009-11-20 13:50:32.000000000 +0100 +@@ -0,0 +1,10 @@ ++/* Test that we get the -Wenum-compare by default. See PR27975. */ ++/* { dg-do compile } */ ++/* { dg-options "" } */ ++enum E1 { a }; ++enum E2 { b }; ++ ++int foo (E1 e1, E2 e2) ++{ ++ return e1 == e2; /* { dg-warning "comparison between" } */ ++} Index: gcc/cp/call.c =================================================================== -*** gcc/cp/call.c.orig 2008-07-25 17:49:45.000000000 +0200 ---- gcc/cp/call.c 2008-09-02 16:57:58.000000000 +0200 -*************** build_new_op (enum tree_code code, int f -*** 3963,3969 **** - && (TYPE_MAIN_VARIANT (TREE_TYPE (arg1)) - != TYPE_MAIN_VARIANT (TREE_TYPE (arg2)))) - { -! warning (0, "comparison between %q#T and %q#T", - TREE_TYPE (arg1), TREE_TYPE (arg2)); - } - break; ---- 3963,3970 ---- - && (TYPE_MAIN_VARIANT (TREE_TYPE (arg1)) - != TYPE_MAIN_VARIANT (TREE_TYPE (arg2)))) - { -! warning (OPT_Wenum_compare, -! "comparison between %q#T and %q#T", - TREE_TYPE (arg1), TREE_TYPE (arg2)); - } - break; +--- gcc/cp/call.c.orig 2009-06-17 13:58:55.000000000 +0200 ++++ gcc/cp/call.c 2009-11-20 13:50:32.000000000 +0100 +@@ -3975,7 +3975,8 @@ build_new_op (enum tree_code code, int f + && (TYPE_MAIN_VARIANT (TREE_TYPE (arg1)) + != TYPE_MAIN_VARIANT (TREE_TYPE (arg2)))) + { +- warning (0, "comparison between %q#T and %q#T", ++ warning (OPT_Wenum_compare, ++ "comparison between %q#T and %q#T", + TREE_TYPE (arg1), TREE_TYPE (arg2)); + } + break; Index: gcc/c.opt =================================================================== -*** gcc/c.opt.orig 2008-09-02 16:57:51.000000000 +0200 ---- gcc/c.opt 2008-09-02 16:57:58.000000000 +0200 -*************** Wendif-labels -*** 199,204 **** ---- 199,208 ---- - C ObjC C++ ObjC++ Warning - Warn about stray tokens after #elif and #endif - -+ Wenum-compare -+ C++ ObjC++ Var(warn_enum_compare) Init(1) Warning -+ Warn about comparison of different enum types -+ - Werror - C ObjC C++ ObjC++ - ; Documented in common.opt +--- gcc/c.opt.orig 2009-11-20 13:50:25.000000000 +0100 ++++ gcc/c.opt 2009-11-20 13:50:32.000000000 +0100 +@@ -199,6 +199,10 @@ Wendif-labels + C ObjC C++ ObjC++ Warning + Warn about stray tokens after #elif and #endif + ++Wenum-compare ++C++ ObjC++ Var(warn_enum_compare) Init(1) Warning ++Warn about comparison of different enum types ++ + Werror + C ObjC C++ ObjC++ + ; Documented in common.opt ++++++ pr33763.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,19 +1,17 @@ Index: gcc/tree-inline.c =================================================================== -*** gcc/tree-inline.c (revision 130489) ---- gcc/tree-inline.c (working copy) -*************** expand_call_inline (basic_block bb, tree -*** 2573,2578 **** ---- 2573,2584 ---- - if (!cgraph_inline_p (cg_edge, &reason)) - { - if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (fn)) -+ /* For extern inline functions that get redefined we always -+ silently ignored alway_inline flag. Better behaviour would -+ be to be able to keep both bodies and use extern inline body -+ for inlining, but we can't do that because frontends overwrite -+ the body. */ -+ && !cg_edge->callee->local.redefined_extern_inline - /* Avoid warnings during early inline pass. */ - && (!flag_unit_at_a_time || cgraph_global_info_ready)) - { +--- gcc/tree-inline.c.orig 2008-09-04 16:09:13.000000000 +0200 ++++ gcc/tree-inline.c 2009-11-20 13:50:22.000000000 +0100 +@@ -2668,6 +2668,12 @@ expand_call_inline (basic_block bb, tree + if (!cgraph_inline_p (cg_edge, &reason)) + { + if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (fn)) ++ /* For extern inline functions that get redefined we always ++ silently ignored alway_inline flag. Better behaviour would ++ be to be able to keep both bodies and use extern inline body ++ for inlining, but we can't do that because frontends overwrite ++ the body. */ ++ && !cg_edge->callee->local.redefined_extern_inline + /* Avoid warnings during early inline pass. */ + && (!flag_unit_at_a_time || cgraph_global_info_ready)) + { ++++++ pr34043-1.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -9,9 +9,9 @@ Index: gcc/tree-ssa-sccvn.c =================================================================== ---- gcc/tree-ssa-sccvn.c (revision 132767) -+++ gcc/tree-ssa-sccvn.c (revision 132768) -@@ -1231,6 +1231,8 @@ visit_reference_op_store (tree lhs, tree +--- gcc/tree-ssa-sccvn.c.orig 2009-07-17 14:35:08.000000000 +0200 ++++ gcc/tree-ssa-sccvn.c 2009-11-20 13:51:00.000000000 +0100 +@@ -1227,6 +1227,8 @@ visit_reference_op_store (tree lhs, tree { if (TREE_CODE (result) == SSA_NAME) result = SSA_VAL (result); @@ -20,7 +20,7 @@ resultsame = expressions_equal_p (result, op); } -@@ -1527,13 +1529,10 @@ simplify_unary_expression (tree rhs) +@@ -1523,13 +1525,10 @@ simplify_unary_expression (tree rhs) static tree try_to_simplify (tree stmt, tree rhs) { @@ -37,7 +37,7 @@ else { switch (TREE_CODE_CLASS (TREE_CODE (rhs))) -@@ -1550,13 +1549,11 @@ try_to_simplify (tree stmt, tree rhs) +@@ -1546,13 +1545,11 @@ try_to_simplify (tree stmt, tree rhs) /* Fallthrough. */ case tcc_reference: @@ -58,9 +58,9 @@ break; Index: gcc/tree-ssa-pre.c =================================================================== ---- gcc/tree-ssa-pre.c (revision 132767) -+++ gcc/tree-ssa-pre.c (revision 132768) -@@ -3256,7 +3256,9 @@ get_sccvn_value (tree name) +--- gcc/tree-ssa-pre.c.orig 2008-07-15 14:58:05.000000000 +0200 ++++ gcc/tree-ssa-pre.c 2009-11-20 13:51:00.000000000 +0100 +@@ -3263,7 +3263,9 @@ get_sccvn_value (tree name) !ZERO_SSA_OPERANDS (defstmt2, SSA_OP_ALL_VIRTUALS)) gcc_assert (defstmt); } ++++++ pr34043-3.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -9,71 +9,60 @@ Index: gcc/fold-const.c =================================================================== -*** gcc/fold-const.c.orig 2008-02-27 15:07:55.000000000 +0100 ---- gcc/fold-const.c 2008-03-11 13:51:09.000000000 +0100 -*************** fold_unary (enum tree_code code, tree ty -*** 8263,8275 **** - case VIEW_CONVERT_EXPR: - if (TREE_TYPE (op0) == type) - return op0; -! if (TREE_CODE (op0) == VIEW_CONVERT_EXPR -! || (TREE_CODE (op0) == NOP_EXPR -! && INTEGRAL_TYPE_P (TREE_TYPE (op0)) -! && INTEGRAL_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0))) -! && TYPE_PRECISION (TREE_TYPE (op0)) -! == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (op0, 0))))) - return fold_build1 (VIEW_CONVERT_EXPR, type, TREE_OPERAND (op0, 0)); - return fold_view_convert_expr (type, op0); - - case NEGATE_EXPR: ---- 8263,8295 ---- - case VIEW_CONVERT_EXPR: - if (TREE_TYPE (op0) == type) - return op0; -! if (TREE_CODE (op0) == VIEW_CONVERT_EXPR) - return fold_build1 (VIEW_CONVERT_EXPR, type, TREE_OPERAND (op0, 0)); -+ -+ /* For integral conversions with the same precision or pointer -+ conversions use a NOP_EXPR instead. */ -+ if ((INTEGRAL_TYPE_P (type) -+ || POINTER_TYPE_P (type)) -+ && (INTEGRAL_TYPE_P (TREE_TYPE (op0)) -+ || POINTER_TYPE_P (TREE_TYPE (op0))) -+ && TYPE_PRECISION (type) == TYPE_PRECISION (TREE_TYPE (op0)) -+ /* Do not muck with VIEW_CONVERT_EXPRs that convert from -+ a sub-type to its base type as generated by the Ada FE. */ -+ && !(INTEGRAL_TYPE_P (TREE_TYPE (op0)) -+ && TREE_TYPE (TREE_TYPE (op0)))) -+ return fold_convert (type, op0); -+ -+ /* Strip inner integral conversions that do not change the precision. */ -+ if ((TREE_CODE (op0) == NOP_EXPR -+ || TREE_CODE (op0) == CONVERT_EXPR) -+ && (INTEGRAL_TYPE_P (TREE_TYPE (op0)) -+ || POINTER_TYPE_P (TREE_TYPE (op0))) -+ && (INTEGRAL_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0))) -+ || POINTER_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0)))) -+ && (TYPE_PRECISION (TREE_TYPE (op0)) -+ == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (op0, 0))))) -+ return fold_build1 (VIEW_CONVERT_EXPR, type, TREE_OPERAND (op0, 0)); -+ - return fold_view_convert_expr (type, op0); - - case NEGATE_EXPR: +--- gcc/fold-const.c.orig 2009-07-07 11:19:07.000000000 +0200 ++++ gcc/fold-const.c 2009-11-20 13:51:03.000000000 +0100 +@@ -8299,13 +8299,33 @@ fold_unary (enum tree_code code, tree ty + case VIEW_CONVERT_EXPR: + if (TREE_TYPE (op0) == type) + return op0; +- if (TREE_CODE (op0) == VIEW_CONVERT_EXPR +- || (TREE_CODE (op0) == NOP_EXPR +- && INTEGRAL_TYPE_P (TREE_TYPE (op0)) +- && INTEGRAL_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0))) +- && TYPE_PRECISION (TREE_TYPE (op0)) +- == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (op0, 0))))) ++ if (TREE_CODE (op0) == VIEW_CONVERT_EXPR) + return fold_build1 (VIEW_CONVERT_EXPR, type, TREE_OPERAND (op0, 0)); ++ ++ /* For integral conversions with the same precision or pointer ++ conversions use a NOP_EXPR instead. */ ++ if ((INTEGRAL_TYPE_P (type) ++ || POINTER_TYPE_P (type)) ++ && (INTEGRAL_TYPE_P (TREE_TYPE (op0)) ++ || POINTER_TYPE_P (TREE_TYPE (op0))) ++ && TYPE_PRECISION (type) == TYPE_PRECISION (TREE_TYPE (op0)) ++ /* Do not muck with VIEW_CONVERT_EXPRs that convert from ++ a sub-type to its base type as generated by the Ada FE. */ ++ && !(INTEGRAL_TYPE_P (TREE_TYPE (op0)) ++ && TREE_TYPE (TREE_TYPE (op0)))) ++ return fold_convert (type, op0); ++ ++ /* Strip inner integral conversions that do not change the precision. */ ++ if ((TREE_CODE (op0) == NOP_EXPR ++ || TREE_CODE (op0) == CONVERT_EXPR) ++ && (INTEGRAL_TYPE_P (TREE_TYPE (op0)) ++ || POINTER_TYPE_P (TREE_TYPE (op0))) ++ && (INTEGRAL_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0))) ++ || POINTER_TYPE_P (TREE_TYPE (TREE_OPERAND (op0, 0)))) ++ && (TYPE_PRECISION (TREE_TYPE (op0)) ++ == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (op0, 0))))) ++ return fold_build1 (VIEW_CONVERT_EXPR, type, TREE_OPERAND (op0, 0)); ++ + return fold_view_convert_expr (type, op0); + + case NEGATE_EXPR: Index: gcc/tree-ssa-loop-im.c =================================================================== -*** gcc/tree-ssa-loop-im.c.orig 2008-02-19 10:55:59.000000000 +0100 ---- gcc/tree-ssa-loop-im.c 2008-03-11 14:44:25.000000000 +0100 -*************** for_each_index (tree *addr_p, bool (*cbc -*** 208,213 **** ---- 208,217 ---- - case CONSTRUCTOR: - return true; - -+ case ADDR_EXPR: -+ gcc_assert (is_gimple_min_invariant (*addr_p)); -+ return true; -+ - case TARGET_MEM_REF: - idx = &TMR_BASE (*addr_p); - if (*idx +--- gcc/tree-ssa-loop-im.c.orig 2009-06-24 16:52:45.000000000 +0200 ++++ gcc/tree-ssa-loop-im.c 2009-11-20 13:51:03.000000000 +0100 +@@ -208,6 +208,10 @@ for_each_index (tree *addr_p, bool (*cbc + case CONSTRUCTOR: + return true; + ++ case ADDR_EXPR: ++ gcc_assert (is_gimple_min_invariant (*addr_p)); ++ return true; ++ + case TARGET_MEM_REF: + idx = &TMR_BASE (*addr_p); + if (*idx ++++++ pr34043-4.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -7,75 +7,44 @@ Index: gcc/tree-ssa-sccvn.c =================================================================== -*** gcc/tree-ssa-sccvn.c 2008-03-01 19:53:24.000000000 +0100 ---- gcc/tree-ssa-sccvn.c 2008-03-01 19:53:24.000000000 +0100 -*************** visit_reference_op_store (tree lhs, tree -*** 1311,1317 **** - changed |= set_ssa_val_to (vdef, vdef); - } - -! vn_reference_insert (lhs, op, vdefs); - } - else - { ---- 1365,1374 ---- - changed |= set_ssa_val_to (vdef, vdef); - } - -! /* Do not insert structure copies into the tables. */ -! if (is_gimple_min_invariant (op) -! || is_gimple_reg (op)) -! vn_reference_insert (lhs, op, vdefs); - } - else - { -*************** simplify_unary_expression (tree rhs) -*** 1549,1561 **** - else if (TREE_CODE (rhs) == NOP_EXPR - || TREE_CODE (rhs) == CONVERT_EXPR - || TREE_CODE (rhs) == REALPART_EXPR -! || TREE_CODE (rhs) == IMAGPART_EXPR) - { - /* We want to do tree-combining on conversion-like expressions. - Make sure we feed only SSA_NAMEs or constants to fold though. */ - tree tem = valueize_expr (VN_INFO (op0)->expr); - if (UNARY_CLASS_P (tem) - || BINARY_CLASS_P (tem) - || TREE_CODE (tem) == SSA_NAME - || is_gimple_min_invariant (tem)) - op0 = tem; ---- 1606,1620 ---- - else if (TREE_CODE (rhs) == NOP_EXPR - || TREE_CODE (rhs) == CONVERT_EXPR - || TREE_CODE (rhs) == REALPART_EXPR -! || TREE_CODE (rhs) == IMAGPART_EXPR -! || TREE_CODE (rhs) == VIEW_CONVERT_EXPR) - { - /* We want to do tree-combining on conversion-like expressions. - Make sure we feed only SSA_NAMEs or constants to fold though. */ - tree tem = valueize_expr (VN_INFO (op0)->expr); - if (UNARY_CLASS_P (tem) - || BINARY_CLASS_P (tem) -+ || TREE_CODE (tem) == VIEW_CONVERT_EXPR - || TREE_CODE (tem) == SSA_NAME - || is_gimple_min_invariant (tem)) - op0 = tem; -*************** try_to_simplify (tree stmt, tree rhs) -*** 1607,1613 **** - - /* Fallthrough for some codes that can operate on registers. */ - if (!(TREE_CODE (rhs) == REALPART_EXPR -! || TREE_CODE (rhs) == IMAGPART_EXPR)) - break; - /* We could do a little more with unary ops, if they expand - into binary ops, but it's debatable whether it is worth it. */ ---- 1666,1673 ---- - - /* Fallthrough for some codes that can operate on registers. */ - if (!(TREE_CODE (rhs) == REALPART_EXPR -! || TREE_CODE (rhs) == IMAGPART_EXPR -! || TREE_CODE (rhs) == VIEW_CONVERT_EXPR)) - break; - /* We could do a little more with unary ops, if they expand - into binary ops, but it's debatable whether it is worth it. */ - +--- gcc/tree-ssa-sccvn.c.orig 2009-11-20 13:51:00.000000000 +0100 ++++ gcc/tree-ssa-sccvn.c 2009-11-20 13:51:05.000000000 +0100 +@@ -1255,7 +1255,10 @@ visit_reference_op_store (tree lhs, tree + changed |= set_ssa_val_to (vdef, vdef); + } + +- vn_reference_insert (lhs, op, vdefs); ++ /* Do not insert structure copies into the tables. */ ++ if (is_gimple_min_invariant (op) ++ || is_gimple_reg (op)) ++ vn_reference_insert (lhs, op, vdefs); + } + else + { +@@ -1493,13 +1496,15 @@ simplify_unary_expression (tree rhs) + else if (TREE_CODE (rhs) == NOP_EXPR + || TREE_CODE (rhs) == CONVERT_EXPR + || TREE_CODE (rhs) == REALPART_EXPR +- || TREE_CODE (rhs) == IMAGPART_EXPR) ++ || TREE_CODE (rhs) == IMAGPART_EXPR ++ || TREE_CODE (rhs) == VIEW_CONVERT_EXPR) + { + /* We want to do tree-combining on conversion-like expressions. + Make sure we feed only SSA_NAMEs or constants to fold though. */ + tree tem = valueize_expr (VN_INFO (op0)->expr); + if (UNARY_CLASS_P (tem) + || BINARY_CLASS_P (tem) ++ || TREE_CODE (tem) == VIEW_CONVERT_EXPR + || TREE_CODE (tem) == SSA_NAME + || is_gimple_min_invariant (tem)) + op0 = tem; +@@ -1551,7 +1556,8 @@ try_to_simplify (tree stmt, tree rhs) + + /* Fallthrough for some codes that can operate on registers. */ + if (!(TREE_CODE (rhs) == REALPART_EXPR +- || TREE_CODE (rhs) == IMAGPART_EXPR)) ++ || TREE_CODE (rhs) == IMAGPART_EXPR ++ || TREE_CODE (rhs) == VIEW_CONVERT_EXPR)) + break; + /* We could do a little more with unary ops, if they expand + into binary ops, but it's debatable whether it is worth it. */ ++++++ pr36822.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -92,62 +92,49 @@ Index: gcc/recog.c =================================================================== -*** gcc/recog.c.orig 2008-07-16 16:55:35.000000000 +0200 ---- gcc/recog.c 2008-07-17 08:20:58.000000000 +0200 -*************** asm_operand_ok (rtx op, const char *cons -*** 1686,1701 **** - result = 1; - } - #ifdef EXTRA_CONSTRAINT_STR - else if (EXTRA_CONSTRAINT_STR (op, c, constraint)) - result = 1; -- else if (EXTRA_MEMORY_CONSTRAINT (c, constraint) -- /* Every memory operand can be reloaded to fit. */ -- && memory_operand (op, VOIDmode)) -- result = 1; -- else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint) -- /* Every address operand can be reloaded to fit. */ -- && address_operand (op, VOIDmode)) -- result = 1; - #endif - break; - } ---- 1686,1699 ---- - result = 1; - } - #ifdef EXTRA_CONSTRAINT_STR -+ else if (EXTRA_MEMORY_CONSTRAINT (c, constraint)) -+ /* Every memory operand can be reloaded to fit. */ -+ result = result || memory_operand (op, VOIDmode); -+ else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint)) -+ /* Every address operand can be reloaded to fit. */ -+ result = result || address_operand (op, VOIDmode); - else if (EXTRA_CONSTRAINT_STR (op, c, constraint)) - result = 1; - #endif - break; - } +--- gcc/recog.c.orig 2009-11-20 13:51:27.000000000 +0100 ++++ gcc/recog.c 2009-11-20 13:51:36.000000000 +0100 +@@ -1735,16 +1735,14 @@ asm_operand_ok (rtx op, const char *cons + result = 1; + } + #ifdef EXTRA_CONSTRAINT_STR ++ else if (EXTRA_MEMORY_CONSTRAINT (c, constraint)) ++ /* Every memory operand can be reloaded to fit. */ ++ result = result || memory_operand (op, VOIDmode); ++ else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint)) ++ /* Every address operand can be reloaded to fit. */ ++ result = result || address_operand (op, VOIDmode); + else if (EXTRA_CONSTRAINT_STR (op, c, constraint)) + result = 1; +- else if (EXTRA_MEMORY_CONSTRAINT (c, constraint) +- /* Every memory operand can be reloaded to fit. */ +- && memory_operand (op, VOIDmode)) +- result = 1; +- else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint) +- /* Every address operand can be reloaded to fit. */ +- && address_operand (op, VOIDmode)) +- result = 1; + #endif + break; + } Index: gcc/testsuite/gcc.target/s390/pr36822.c =================================================================== -*** /dev/null 1970-01-01 00:00:00.000000000 +0000 ---- gcc/testsuite/gcc.target/s390/pr36822.c 2008-07-17 08:20:58.000000000 +0200 -*************** -*** 0 **** ---- 1,16 ---- -+ /* This used to ICE on s390 due to bug in the definition of the 'R' -+ constraint which replaced the 'm' constraint (together with 'T') -+ while adding z10 support. */ -+ -+ /* { dg-do compile } */ -+ /* { dg-options "-O" } */ -+ -+ int boo() -+ { -+ struct { -+ unsigned char pad[4096]; -+ unsigned long long bar; -+ } *foo; -+ asm volatile( "" : "=m" (*(unsigned long long*)(foo->bar)) -+ : "a" (&foo->bar)); -+ } - +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ gcc/testsuite/gcc.target/s390/pr36822.c 2009-11-20 13:51:36.000000000 +0100 +@@ -0,0 +1,16 @@ ++/* This used to ICE on s390 due to bug in the definition of the 'R' ++ constraint which replaced the 'm' constraint (together with 'T') ++ while adding z10 support. */ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O" } */ ++ ++int boo() ++{ ++ struct { ++ unsigned char pad[4096]; ++ unsigned long long bar; ++ } *foo; ++ asm volatile( "" : "=m" (*(unsigned long long*)(foo->bar)) ++ : "a" (&foo->bar)); ++} ++++++ pr40141.diff ++++++ ++++ 1453 lines (skipped) ++++ between gcc43/pr40141.diff ++++ and /mounts/work_src_done/STABLE/gcc43/pr40141.diff ++++++ program-transform-name.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,6 +1,8 @@ ---- gcc/ada/Make-lang.in -+++ gcc/ada/Make-lang.in -@@ -436,6 +436,24 @@ +Index: gcc/ada/Make-lang.in +=================================================================== +--- gcc/ada/Make-lang.in.orig 2009-09-21 11:42:18.000000000 +0200 ++++ gcc/ada/Make-lang.in 2009-09-21 11:42:49.000000000 +0200 +@@ -491,6 +491,24 @@ doc/gnat-style.pdf: ada/gnat-style.texi # likewise for gnatf, gnatchop, and gnatlink, gnatkr, gnatmake, gnat, # gnatprep, gnatbl, gnatls, gnatxref, gnatfind, gnatname, gnatclean, # gnatsym, gprmake @@ -25,7 +27,7 @@ ada.install-common: $(MKDIR) $(DESTDIR)$(bindir) -if [ -f gnat1$(exeext) ] ; \ -@@ -449,8 +467,8 @@ +@@ -504,8 +522,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatbind-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatbind$(exeext); \ fi; \ else \ @@ -36,7 +38,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -464,8 +482,8 @@ +@@ -519,8 +537,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatbl-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatbl$(exeext); \ fi; \ else \ @@ -47,9 +49,9 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -479,8 +497,8 @@ +@@ -534,8 +552,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatchop-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatchop$(exeext); \ - fi; \ + fi ; \ else \ - $(RM) $(DESTDIR)$(bindir)/gnatchop$(exeext); \ - $(INSTALL_PROGRAM) gnatchop$(exeext) $(DESTDIR)$(bindir)/gnatchop$(exeext); \ @@ -58,7 +60,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -494,8 +512,8 @@ +@@ -549,8 +567,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnat-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnat$(exeext); \ fi; \ else \ @@ -69,7 +71,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -509,8 +527,8 @@ +@@ -564,8 +582,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatkr-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatkr$(exeext); \ fi; \ else \ @@ -80,7 +82,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -524,8 +542,8 @@ +@@ -579,8 +597,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatlink-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatlink$(exeext); \ fi; \ else \ @@ -91,7 +93,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -539,8 +557,8 @@ +@@ -594,8 +612,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatls-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatls$(exeext); \ fi; \ else \ @@ -102,7 +104,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -554,8 +572,8 @@ +@@ -609,8 +627,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatmake-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatmake$(exeext); \ fi; \ else \ @@ -113,7 +115,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -565,8 +583,8 @@ +@@ -620,8 +638,8 @@ ada.install-common: $(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatname$(exeext); \ $(INSTALL_PROGRAM) gnatname-cross$(exeext) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatname$(exeext); \ else \ @@ -124,7 +126,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -580,8 +598,8 @@ +@@ -635,8 +653,8 @@ ada.install-common: $(INSTALL_PROGRAM) gnatprep-cross$(exeext) $(DESTDIR)$(tooldir)/bin/gnatprep$(exeext); \ fi; \ else \ @@ -135,7 +137,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -591,8 +609,8 @@ +@@ -646,8 +664,8 @@ ada.install-common: $(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatxref$(exeext); \ $(INSTALL_PROGRAM) gnatxref-cross$(exeext) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatxref$(exeext); \ else \ @@ -146,7 +148,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -602,8 +620,8 @@ +@@ -657,8 +675,8 @@ ada.install-common: $(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatfind$(exeext); \ $(INSTALL_PROGRAM) gnatfind-cross$(exeext) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatfind$(exeext); \ else \ @@ -157,7 +159,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -613,8 +631,8 @@ +@@ -668,8 +686,8 @@ ada.install-common: $(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatclean$(exeext); \ $(INSTALL_PROGRAM) gnatclean-cross$(exeext) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatclean$(exeext); \ else \ @@ -168,7 +170,7 @@ fi ; \ fi -if [ -f gnat1$(exeext) ] ; \ -@@ -624,8 +642,8 @@ +@@ -679,8 +697,8 @@ ada.install-common: $(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gprmake$(exeext); \ $(INSTALL_PROGRAM) gprmake-cross$(exeext) $(DESTDIR)$(bindir)/$(target_noncanonical)-gprmake$(exeext); \ else \ @@ -179,7 +181,7 @@ fi ; \ fi # -@@ -635,8 +653,8 @@ +@@ -690,8 +708,8 @@ ada.install-common: then \ if [ -f gnatsym$(exeext) ] ; \ then \ @@ -190,7 +192,7 @@ fi ; \ fi # -@@ -646,8 +664,8 @@ +@@ -701,8 +719,8 @@ ada.install-common: then \ if [ -f gnatlbr$(exeext) ] ; \ then \ @@ -201,7 +203,7 @@ fi ; \ fi # -@@ -655,8 +673,8 @@ +@@ -710,8 +728,8 @@ ada.install-common: # -if [ -f gnat1$(exeext) ] ; \ then \ @@ -212,7 +214,7 @@ fi # # vxaddr2line is only used for cross ports (it calls the underlying cross -@@ -666,8 +684,8 @@ +@@ -721,8 +739,8 @@ ada.install-common: then \ if [ -f vxaddr2line$(exeext) ] ; \ then \ @@ -223,7 +225,7 @@ fi ; \ fi -@@ -688,22 +706,22 @@ +@@ -743,22 +761,22 @@ install-gnatlib-obj: ada.install-man: ada.uninstall: @@ -262,7 +264,7 @@ -$(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatbind$(exeext) -$(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatbl$(exeext) -$(RM) $(DESTDIR)$(bindir)/$(target_noncanonical)-gnatchop$(exeext) -@@ -736,8 +754,6 @@ +@@ -791,8 +809,6 @@ ada.uninstall: -$(RM) $(DESTDIR)$(tooldir)/bin/gnatxref$(exeext) -$(RM) $(DESTDIR)$(tooldir)/bin/gnatclean$(exeext) -$(RM) $(DESTDIR)$(tooldir)/bin/gnatsym$(exeext) ++++++ s390-address-constraints ++++++ Index: gcc/config/s390/constraints.md =================================================================== --- gcc/config/s390/constraints.md.orig 2009-11-20 13:52:23.000000000 +0100 +++ gcc/config/s390/constraints.md 2009-11-20 13:52:33.000000000 +0100 @@ -66,9 +66,14 @@ ;; B -- Multiple letter constraint followed by Q, R, S, or T: ;; Memory reference of the type specified by second letter that ;; does *not* refer to a literal pool entry. -;; U -- Pointer with short displacement. -;; W -- Pointer with long displacement. +;; U -- Pointer with short displacement. (deprecated - use ZQZR) +;; W -- Pointer with long displacement. (deprecated - use ZSZT) ;; Y -- Shift count operand. +;; ZQ -- Pointer without index register and with short displacement. +;; ZR -- Pointer with index register and short displacement. +;; ZS -- Pointer without index register but with long displacement. +;; ZT -- Pointer with index register and long displacement. +;; ;; @@ -462,11 +467,26 @@ constraint." (define_address_constraint "U" - "Pointer with short displacement" + "Pointer with short displacement. (deprecated - use ZQZR)" (match_test "s390_mem_constraint (\"U\", op)")) - - (define_address_constraint "W" - "Pointer with long displacement" + "Pointer with long displacement. (deprecated - use ZSZT)" (match_test "s390_mem_constraint (\"W\", op)")) + + +(define_address_constraint "ZQ" + "Pointer without index register and with short displacement." + (match_test "s390_mem_constraint (\"ZQ\", op)")) + +(define_address_constraint "ZR" + "Pointer with index register and short displacement." + (match_test "s390_mem_constraint (\"ZR\", op)")) + +(define_address_constraint "ZS" + "Pointer without index register but with long displacement." + (match_test "s390_mem_constraint (\"ZS\", op)")) + +(define_address_constraint "ZT" + "Pointer with index register and long displacement." + (match_test "s390_mem_constraint (\"ZT\", op)")) Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:31.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:33.000000000 +0100 @@ -1468,7 +1468,7 @@ (define_insn "*la_64" [(set (match_operand:DI 0 "register_operand" "=d,d") - (match_operand:QI 1 "address_operand" "U,W"))] + (match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))] "TARGET_64BIT" "@ la\t%0,%a1 @@ -1651,7 +1651,7 @@ (define_insn "*la_31" [(set (match_operand:SI 0 "register_operand" "=d,d") - (match_operand:QI 1 "address_operand" "U,W"))] + (match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))] "!TARGET_64BIT && legitimate_la_operand_p (operands[1])" "@ la\t%0,%a1 @@ -1686,7 +1686,7 @@ (define_insn "*la_31_and" [(set (match_operand:SI 0 "register_operand" "=d,d") - (and:SI (match_operand:QI 1 "address_operand" "U,W") + (and:SI (match_operand:QI 1 "address_operand" "ZQZR,ZSZT") (const_int 2147483647)))] "!TARGET_64BIT" "@ @@ -1712,7 +1712,7 @@ (define_insn "force_la_31" [(set (match_operand:SI 0 "register_operand" "=d,d") - (match_operand:QI 1 "address_operand" "U,W")) + (match_operand:QI 1 "address_operand" "ZQZR,ZSZT")) (use (const_int 0))] "!TARGET_64BIT" "@ @@ -7405,7 +7405,7 @@ [(set (pc) (if_then_else (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)]) - (match_operand 0 "address_operand" "U") + (match_operand 0 "address_operand" "ZQZR") (pc)))] "" { @@ -7469,7 +7469,7 @@ (if_then_else (match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)]) (pc) - (match_operand 0 "address_operand" "U")))] + (match_operand 0 "address_operand" "ZQZR")))] "" { if (get_attr_op_type (insn) == OP_TYPE_RR) @@ -7658,7 +7658,7 @@ (if_then_else (ne (match_operand:SI 1 "register_operand" "d") (const_int 1)) - (match_operand 0 "address_operand" "U") + (match_operand 0 "address_operand" "ZQZR") (pc))) (set (match_operand:SI 2 "register_operand" "=1") (plus:SI (match_dup 1) (const_int -1))) @@ -7769,7 +7769,7 @@ ; (define_insn "indirect_jump" - [(set (pc) (match_operand 0 "address_operand" "U"))] + [(set (pc) (match_operand 0 "address_operand" "ZQZR"))] "" { if (get_attr_op_type (insn) == OP_TYPE_RR) @@ -7788,7 +7788,7 @@ ; (define_insn "casesi_jump" - [(set (pc) (match_operand 0 "address_operand" "U")) + [(set (pc) (match_operand 0 "address_operand" "ZQZR")) (use (label_ref (match_operand 1 "" "")))] "" { @@ -8010,7 +8010,7 @@ (set_attr "type" "jsr")]) (define_insn "*basr" - [(call (mem:QI (match_operand 0 "address_operand" "U")) + [(call (mem:QI (match_operand 0 "address_operand" "ZQZR")) (match_operand 1 "const_int_operand" "n")) (clobber (match_operand 2 "register_operand" "=r"))] "!SIBLING_CALL_P (insn) && GET_MODE (operands[2]) == Pmode" @@ -8068,7 +8068,7 @@ (define_insn "*basr_r" [(set (match_operand 0 "" "") - (call (mem:QI (match_operand 1 "address_operand" "U")) + (call (mem:QI (match_operand 1 "address_operand" "ZQZR")) (match_operand 2 "const_int_operand" "n"))) (clobber (match_operand 3 "register_operand" "=r"))] "!SIBLING_CALL_P (insn) && GET_MODE (operands[3]) == Pmode" @@ -8168,7 +8168,7 @@ (define_insn "*basr_tls" [(set (match_operand 0 "" "") - (call (mem:QI (match_operand 1 "address_operand" "U")) + (call (mem:QI (match_operand 1 "address_operand" "ZQZR")) (match_operand 2 "const_int_operand" "n"))) (clobber (match_operand 3 "register_operand" "=r")) (use (match_operand 4 "" ""))] @@ -8717,24 +8717,29 @@ ; (define_insn "prefetch" - [(prefetch (match_operand 0 "address_operand" "UW,X") - (match_operand:SI 1 "const_int_operand" "n,n") - (match_operand:SI 2 "const_int_operand" "n,n"))] - "TARGET_Z10" + [(prefetch (match_operand 0 "address_operand" "ZQZS,ZRZT,X") + (match_operand:SI 1 "const_int_operand" " n, n,n") + (match_operand:SI 2 "const_int_operand" " n, n,n"))] + "TARGET_ZARCH && s390_tune == PROCESSOR_2097_Z10" { - if (larl_operand (operands[0], Pmode)) - return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0"; + switch (which_alternative) + { + case 0: + return INTVAL (operands[1]) == 1 ? "stcmh\t2,0,%a0" : "stcmh\t1,0,%a0"; + case 1: + return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0"; + case 2: + if (larl_operand (operands[0], Pmode)) + return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0"; + default: - if (s390_mem_constraint ("W", operands[0]) - || s390_mem_constraint ("U", operands[0])) - return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0"; - - /* This point might be reached if op0 is a larl operand with an - uneven addend. In this case we simply omit issuing a prefetch - instruction. */ + /* This might be reached for symbolic operands with an odd + addend. We simply omit the prefetch for such rare cases. */ - return ""; + return ""; + } } - [(set_attr "type" "load,larl") - (set_attr "op_type" "RXY,RIL") - (set_attr "z10prop" "z10_super")]) + [(set_attr "type" "store,load,larl") + (set_attr "op_type" "RSY,RXY,RIL") + (set_attr "z10prop" "z10_super") + (set_attr "cpu_facility" "*,z10,z10")]) Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-11-20 13:52:31.000000000 +0100 +++ gcc/config/s390/s390.c 2009-11-20 13:52:33.000000000 +0100 @@ -1681,6 +1681,11 @@ s390_short_displacement (rtx disp) if (!disp) return true; + /* Without the long displacement facility we don't need to + distingiush between long and short displacement. */ + if (!TARGET_LONG_DISPLACEMENT) + return true; + /* Integer displacement in range. */ if (GET_CODE (disp) == CONST_INT) return INTVAL (disp) >= 0 && INTVAL (disp) < 4096; @@ -2054,79 +2059,93 @@ s390_legitimate_address_without_index_p } -/* Evaluates constraint strings described by the regular expression - ([A|B](Q|R|S|T))|U|W and returns 1 if OP is a valid operand for the - constraint given in STR, or 0 else. */ +/* Return true if ADDR is of kind symbol_ref or symbol_ref + const_int + and return these parts in SYMREF and ADDEND. You can pass NULL in + SYMREF and/or ADDEND if you are not interested in these values. */ -int -s390_mem_constraint (const char *str, rtx op) +static bool +s390_symref_operand_p (rtx addr, rtx *symref, HOST_WIDE_INT *addend) { - struct s390_address addr; - char c = str[0]; + HOST_WIDE_INT tmpaddend = 0; - /* Check for offsettable variants of memory constraints. */ - if (c == 'A') + if (GET_CODE (addr) == CONST) + addr = XEXP (addr, 0); + + if (GET_CODE (addr) == PLUS) { - /* Only accept non-volatile MEMs. */ - if (!MEM_P (op) || MEM_VOLATILE_P (op)) - return 0; + if (GET_CODE (XEXP (addr, 0)) == SYMBOL_REF + && CONST_INT_P (XEXP (addr, 1))) + { + tmpaddend = INTVAL (XEXP (addr, 1)); + addr = XEXP (addr, 0); + } + else + return false; + } + else + if (GET_CODE (addr) != SYMBOL_REF) + return false; - if ((reload_completed || reload_in_progress) - ? !offsettable_memref_p (op) : !offsettable_nonstrict_memref_p (op)) - return 0; + if (symref) + *symref = addr; + if (addend) + *addend = tmpaddend; - c = str[1]; - } + return true; +} + + +/* Return true if the address in OP is valid for constraint letter C + if wrapped in a MEM rtx. Set LIT_POOL_OK to true if it literal + pool MEMs should be accepted. Only the Q, R, S, T constraint + letters are allowed for C. */ - /* Check for non-literal-pool variants of memory constraints. */ - else if (c == 'B') +static int +s390_check_qrst_address (char c, rtx op, bool lit_pool_ok) +{ + struct s390_address addr; + bool decomposed = false; + + /* This check makes sure that no symbolic address (except literal + pool references) are accepted by the R or T constraints. */ + if (s390_symref_operand_p (op, NULL, NULL)) { - if (GET_CODE (op) != MEM) + if (!lit_pool_ok) return 0; - if (!s390_decompose_address (XEXP (op, 0), &addr)) + if (!s390_decompose_address (op, &addr)) return 0; - if (addr.literal_pool) + if (!addr.literal_pool) return 0; - - c = str[1]; + decomposed = true; } switch (c) { - case 'Q': - if (GET_CODE (op) != MEM) - return 0; - if (!s390_decompose_address (XEXP (op, 0), &addr)) + case 'Q': /* no index short displacement */ + if (!decomposed && !s390_decompose_address (op, &addr)) return 0; if (addr.indx) return 0; - - if (TARGET_LONG_DISPLACEMENT) - { - if (!s390_short_displacement (addr.disp)) - return 0; - } - break; - - case 'R': - if (GET_CODE (op) != MEM) + if (!s390_short_displacement (addr.disp)) return 0; + break; + case 'R': /* with index short displacement */ if (TARGET_LONG_DISPLACEMENT) { - if (!s390_decompose_address (XEXP (op, 0), &addr)) + if (!decomposed && !s390_decompose_address (op, &addr)) return 0; if (!s390_short_displacement (addr.disp)) return 0; } + /* Any invalid address here will be fixed up by reload, + so accept it for the most generic constraint. */ break; - case 'S': + case 'S': /* no index long displacement */ if (!TARGET_LONG_DISPLACEMENT) return 0; - if (GET_CODE (op) != MEM) - return 0; - if (!s390_decompose_address (XEXP (op, 0), &addr)) + if (!decomposed && !s390_decompose_address (op, &addr)) return 0; if (addr.indx) return 0; @@ -2134,52 +2153,74 @@ s390_mem_constraint (const char *str, rt return 0; break; - case 'T': + case 'T': /* with index long displacement */ if (!TARGET_LONG_DISPLACEMENT) return 0; - if (GET_CODE (op) != MEM) - return 0; - if (!s390_decompose_address (XEXP (op, 0), &addr)) - return 0; - if (s390_short_displacement (addr.disp)) + /* Any invalid address here will be fixed up by reload, + so accept it for the most generic constraint. */ + if ((decomposed || s390_decompose_address (op, &addr)) + && s390_short_displacement (addr.disp)) return 0; break; + default: + return 0; + } + return 1; +} - case 'U': - if (TARGET_LONG_DISPLACEMENT) - { - if (!s390_decompose_address (op, &addr)) - return 0; - if (!s390_short_displacement (addr.disp)) - return 0; - } - break; - case 'W': - if (!TARGET_LONG_DISPLACEMENT) +/* Evaluates constraint strings described by the regular expression + ([A|B|Z](Q|R|S|T))|U|W|Y and returns 1 if OP is a valid operand for + the constraint given in STR, or 0 else. */ + +int +s390_mem_constraint (const char *str, rtx op) +{ + char c = str[0]; + + switch (c) + { + case 'A': + /* Check for offsettable variants of memory constraints. */ + if (!MEM_P (op) || MEM_VOLATILE_P (op)) return 0; - if (!s390_decompose_address (op, &addr)) + if ((reload_completed || reload_in_progress) + ? !offsettable_memref_p (op) : !offsettable_nonstrict_memref_p (op)) return 0; - if (s390_short_displacement (addr.disp)) + return s390_check_qrst_address (str[1], XEXP (op, 0), true); + case 'B': + /* Check for non-literal-pool variants of memory constraints. */ + if (!MEM_P (op)) return 0; - break; - + return s390_check_qrst_address (str[1], XEXP (op, 0), false); + case 'Q': + case 'R': + case 'S': + case 'T': + if (GET_CODE (op) != MEM) + return 0; + return s390_check_qrst_address (c, XEXP (op, 0), true); + case 'U': + return (s390_check_qrst_address ('Q', op, true) + || s390_check_qrst_address ('R', op, true)); + case 'W': + return (s390_check_qrst_address ('S', op, true) + || s390_check_qrst_address ('T', op, true)); case 'Y': /* Simply check for the basic form of a shift count. Reload will take care of making sure we have a proper base register. */ if (!s390_decompose_shift_count (op, NULL, NULL)) return 0; break; - + case 'Z': + return s390_check_qrst_address (str[1], op, true); default: return 0; } - return 1; } - /* Evaluates constraint strings starting with letter O. Input parameter C is the second letter following the "O" in the constraint string. Returns 1 if VALUE meets the respective constraint and 0 @@ -2796,41 +2837,6 @@ s390_preferred_reload_class (rtx op, enu return class; } -/* Return true if ADDR is of kind symbol_ref or symbol_ref + const_int - and return these parts in SYMREF and ADDEND. You can pass NULL in - SYMREF and/or ADDEND if you are not interested in these values. */ - -static bool -s390_symref_operand_p (rtx addr, rtx *symref, HOST_WIDE_INT *addend) -{ - HOST_WIDE_INT tmpaddend = 0; - - if (GET_CODE (addr) == CONST) - addr = XEXP (addr, 0); - - if (GET_CODE (addr) == PLUS) - { - if (GET_CODE (XEXP (addr, 0)) == SYMBOL_REF - && CONST_INT_P (XEXP (addr, 1))) - { - tmpaddend = INTVAL (XEXP (addr, 1)); - addr = XEXP (addr, 0); - } - else - return false; - } - else - if (GET_CODE (addr) != SYMBOL_REF) - return false; - - if (symref) - *symref = addr; - if (addend) - *addend = tmpaddend; - - return true; -} - /* Return true if ADDR is SYMBOL_REF + addend with addend being a multiple of ALIGNMENT and the SYMBOL_REF being naturally aligned. */ ++++++ s390-long-loop-prediction-1 ++++++ Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-11-20 13:52:36.000000000 +0100 +++ gcc/config/s390/s390.c 2009-11-20 13:52:37.000000000 +0100 @@ -356,6 +356,10 @@ struct machine_function GTY(()) #define REGNO_PAIR_OK(REGNO, MODE) \ (HARD_REGNO_NREGS ((REGNO), (MODE)) == 1 || !((REGNO) & 1)) +/* That's the read ahead of the dynamic branch prediction unit in + bytes on a z10 CPU. */ +#define Z10_PREDICT_DISTANCE 384 + static enum machine_mode s390_libgcc_cmp_return_mode (void) { @@ -9599,6 +9603,66 @@ s390_optimize_prologue (void) } } +/* On z10 the dynamic branch prediction must see the backward jump in + a window of 384 bytes. If not it falls back to the static + prediction. This function rearranges the loop backward branch in a + way which makes the static prediction always correct. The function + returns true if it added an instruction. */ +static bool +s390_z10_fix_long_loop_prediction (rtx insn) +{ + rtx set = single_set (insn); + rtx code_label, label_ref, new_label; + rtx uncond_jump; + rtx cur_insn; + rtx tmp; + int distance; + + /* This will exclude branch on count and branch on index patterns + since these are correctly statically predicted. */ + if (!set + || SET_DEST (set) != pc_rtx + || GET_CODE (SET_SRC(set)) != IF_THEN_ELSE) + return false; + + label_ref = (GET_CODE (XEXP (SET_SRC (set), 1)) == LABEL_REF ? + XEXP (SET_SRC (set), 1) : XEXP (SET_SRC (set), 2)); + + gcc_assert (GET_CODE (label_ref) == LABEL_REF); + + code_label = XEXP (label_ref, 0); + + if (INSN_ADDRESSES (INSN_UID (code_label)) == -1 + || INSN_ADDRESSES (INSN_UID (insn)) == -1 + || (INSN_ADDRESSES (INSN_UID (insn)) + - INSN_ADDRESSES (INSN_UID (code_label)) < Z10_PREDICT_DISTANCE)) + return false; + + for (distance = 0, cur_insn = PREV_INSN (insn); + distance < Z10_PREDICT_DISTANCE - 6; + distance += get_attr_length (cur_insn), cur_insn = PREV_INSN (cur_insn)) + if (!cur_insn || JUMP_P (cur_insn) || LABEL_P (cur_insn)) + return false; + + new_label = gen_label_rtx (); + uncond_jump = emit_jump_insn_after ( + gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, code_label)), + insn); + emit_label_after (new_label, uncond_jump); + + tmp = XEXP (SET_SRC (set), 1); + XEXP (SET_SRC (set), 1) = XEXP (SET_SRC (set), 2); + XEXP (SET_SRC (set), 2) = tmp; + INSN_CODE (insn) = -1; + + XEXP (label_ref, 0) = new_label; + JUMP_LABEL (insn) = new_label; + JUMP_LABEL (uncond_jump) = code_label; + + return true; +} + /* Returns 1 if INSN reads the value of REG for purposes not related to addressing of memory, and 0 otherwise. */ static int @@ -9681,97 +9745,87 @@ s390_swap_cmp (rtx cond, rtx *op0, rtx * if that register's value is delivered via a bypass, then the pipeline recycles, thereby causing significant performance decline. This function locates such situations and exchanges the two - operands of the compare. */ -static void -s390_z10_optimize_cmp (void) + operands of the compare. The function return true whenever it + added an insn. */ +static bool +s390_z10_optimize_cmp (rtx insn) { - rtx insn, prev_insn, next_insn; - int added_NOPs = 0; + rtx prev_insn, next_insn; + bool insn_added_p = false; + rtx cond, *op0, *op1; - for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + if (GET_CODE (PATTERN (insn)) == PARALLEL) { - rtx cond, *op0, *op1; - - if (!INSN_P (insn) || INSN_CODE (insn) <= 0) - continue; - - if (GET_CODE (PATTERN (insn)) == PARALLEL) - { - /* Handle compare and branch and branch on count - instructions. */ - rtx pattern = single_set (insn); - - if (!pattern - || SET_DEST (pattern) != pc_rtx - || GET_CODE (SET_SRC (pattern)) != IF_THEN_ELSE) - continue; + /* Handle compare and branch and branch on count + instructions. */ + rtx pattern = single_set (insn); + + if (!pattern + || SET_DEST (pattern) != pc_rtx + || GET_CODE (SET_SRC (pattern)) != IF_THEN_ELSE) + return false; - cond = XEXP (SET_SRC (pattern), 0); - op0 = &XEXP (cond, 0); - op1 = &XEXP (cond, 1); - } - else if (GET_CODE (PATTERN (insn)) == SET) - { - rtx src, dest; + cond = XEXP (SET_SRC (pattern), 0); + op0 = &XEXP (cond, 0); + op1 = &XEXP (cond, 1); + } + else if (GET_CODE (PATTERN (insn)) == SET) + { + rtx src, dest; - /* Handle normal compare instructions. */ - src = SET_SRC (PATTERN (insn)); - dest = SET_DEST (PATTERN (insn)); + /* Handle normal compare instructions. */ + src = SET_SRC (PATTERN (insn)); + dest = SET_DEST (PATTERN (insn)); - if (!REG_P (dest) - || !CC_REGNO_P (REGNO (dest)) - || GET_CODE (src) != COMPARE) - continue; + if (!REG_P (dest) + || !CC_REGNO_P (REGNO (dest)) + || GET_CODE (src) != COMPARE) + return false; - /* s390_swap_cmp will try to find the conditional - jump when passing NULL_RTX as condition. */ - cond = NULL_RTX; - op0 = &XEXP (src, 0); - op1 = &XEXP (src, 1); - } - else - continue; + /* s390_swap_cmp will try to find the conditional + jump when passing NULL_RTX as condition. */ + cond = NULL_RTX; + op0 = &XEXP (src, 0); + op1 = &XEXP (src, 1); + } + else + return false; - if (!REG_P (*op0) || !REG_P (*op1)) - continue; + if (!REG_P (*op0) || !REG_P (*op1)) + return false; - /* Swap the COMPARE arguments and its mask if there is a - conflicting access in the previous insn. */ - prev_insn = PREV_INSN (insn); + /* Swap the COMPARE arguments and its mask if there is a + conflicting access in the previous insn. */ + prev_insn = PREV_INSN (insn); + if (prev_insn != NULL_RTX && INSN_P (prev_insn) + && reg_referenced_p (*op1, PATTERN (prev_insn))) + s390_swap_cmp (cond, op0, op1, insn); + + /* Check if there is a conflict with the next insn. If there + was no conflict with the previous insn, then swap the + COMPARE arguments and its mask. If we already swapped + the operands, or if swapping them would cause a conflict + with the previous insn, issue a NOP after the COMPARE in + order to separate the two instuctions. */ + next_insn = NEXT_INSN (insn); + if (next_insn != NULL_RTX && INSN_P (next_insn) + && s390_non_addr_reg_read_p (*op1, next_insn)) + { if (prev_insn != NULL_RTX && INSN_P (prev_insn) - && reg_referenced_p (*op1, PATTERN (prev_insn))) - s390_swap_cmp (cond, op0, op1, insn); - - /* Check if there is a conflict with the next insn. If there - was no conflict with the previous insn, then swap the - COMPARE arguments and its mask. If we already swapped - the operands, or if swapping them would cause a conflict - with the previous insn, issue a NOP after the COMPARE in - order to separate the two instuctions. */ - next_insn = NEXT_INSN (insn); - if (next_insn != NULL_RTX && INSN_P (next_insn) - && s390_non_addr_reg_read_p (*op1, next_insn)) + && s390_non_addr_reg_read_p (*op0, prev_insn)) { - if (prev_insn != NULL_RTX && INSN_P (prev_insn) - && s390_non_addr_reg_read_p (*op0, prev_insn)) - { - if (REGNO (*op1) == 0) - emit_insn_after (gen_nop1 (), insn); - else - emit_insn_after (gen_nop (), insn); - added_NOPs = 1; - } + if (REGNO (*op1) == 0) + emit_insn_after (gen_nop1 (), insn); else - s390_swap_cmp (cond, op0, op1, insn); + emit_insn_after (gen_nop (), insn); + insn_added_p = true; } + else + s390_swap_cmp (cond, op0, op1, insn); } - - /* Adjust branches if we added new instructions. */ - if (added_NOPs) - shorten_branches (get_insns ()); + return insn_added_p; } - /* Perform machine-dependent processing. */ static void @@ -9885,10 +9939,33 @@ s390_reorg (void) /* Try to optimize prologue and epilogue further. */ s390_optimize_prologue (); - /* Eliminate z10-specific pipeline recycles related to some compare - instructions. */ + /* Walk over the insns and do some z10 specific changes. */ if (s390_tune == PROCESSOR_2097_Z10) - s390_z10_optimize_cmp (); + { + rtx insn; + bool insn_added_p = false; + + /* The insn lengths and addresses have to be up to date for the + following manipulations. */ + shorten_branches (get_insns ()); + + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { + if (!INSN_P (insn) || INSN_CODE (insn) <= 0) + continue; + + if (JUMP_P (insn)) + insn_added_p |= s390_z10_fix_long_loop_prediction (insn); + + if (GET_CODE (PATTERN (insn)) == PARALLEL + || GET_CODE (PATTERN (insn)) == SET) + insn_added_p |= s390_z10_optimize_cmp (insn); + } + + /* Adjust branches if we added new instructions. */ + if (insn_added_p) + shorten_branches (get_insns ()); + } } Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:34.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:37.000000000 +0100 @@ -1073,6 +1073,64 @@ (const_int 6) (const_int 12)))]) ; 8 byte for clr/jg ; 10 byte for clgr/jg +; And now the same two patterns as above but with a negated CC mask. + +; cij, cgij, crj, cgrj, cfi, cgfi, cr, cgr +; The following instructions do a complementary access of their second +; operand (z01 only): crj_c, cgrjc, cr, cgr +(define_insn "*icmp_and_br_signed_<mode>" + [(set (pc) + (if_then_else (match_operator 0 "s390_signed_integer_comparison" + [(match_operand:GPR 1 "register_operand" "d,d") + (match_operand:GPR 2 "nonmemory_operand" "d,C")]) + (pc) + (label_ref (match_operand 3 "" "")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_Z10" +{ + if (get_attr_length (insn) == 6) + return which_alternative ? + "c<g>ij%D0\t%1,%c2,%l3" : "c<g>rj%D0\t%1,%2,%l3"; + else + return which_alternative ? + "c<g>fi\t%1,%c2\;jg%D0\t%l3" : "c<g>r\t%1,%2\;jg%D0\t%l3"; +} + [(set_attr "op_type" "RIE") + (set_attr "type" "branch") + (set_attr "z10prop" "z10_super_c,z10_super") + (set (attr "length") + (if_then_else (lt (abs (minus (pc) (match_dup 3))) (const_int 60000)) + (const_int 6) (const_int 12)))]) ; 8 byte for cr/jg + ; 10 byte for cgr/jg + +; clij, clgij, clrj, clgrj, clfi, clgfi, clr, clgr +; The following instructions do a complementary access of their second +; operand (z10 only): clrj, clgrj, clr, clgr +(define_insn "*icmp_and_br_unsigned_<mode>" + [(set (pc) + (if_then_else (match_operator 0 "s390_unsigned_integer_comparison" + [(match_operand:GPR 1 "register_operand" "d,d") + (match_operand:GPR 2 "nonmemory_operand" "d,I")]) + (pc) + (label_ref (match_operand 3 "" "")))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_Z10" +{ + if (get_attr_length (insn) == 6) + return which_alternative ? + "cl<g>ij%D0\t%1,%b2,%l3" : "cl<g>rj%D0\t%1,%2,%l3"; + else + return which_alternative ? + "cl<g>fi\t%1,%b2\;jg%D0\t%l3" : "cl<g>r\t%1,%2\;jg%D0\t%l3"; +} + [(set_attr "op_type" "RIE") + (set_attr "type" "branch") + (set_attr "z10prop" "z10_super_c,z10_super") + (set (attr "length") + (if_then_else (lt (abs (minus (pc) (match_dup 3))) (const_int 60000)) + (const_int 6) (const_int 12)))]) ; 8 byte for clr/jg + ; 10 byte for clgr/jg + ;; ;;- Move instructions. ;; ++++++ s390-max-unroll-insn-default ++++++ Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-09-24 17:56:46.000000000 +0200 +++ gcc/config/s390/s390.c 2009-09-24 17:57:12.000000000 +0200 @@ -52,6 +52,7 @@ along with GCC; see the file COPYING3. #include "optabs.h" #include "tree-gimple.h" #include "df.h" +#include "params.h" /* Define the specific costs for a given cpu. */ @@ -1644,6 +1645,10 @@ override_options (void) if (!(target_flags_explicit & MASK_LONG_DOUBLE_128)) target_flags |= MASK_LONG_DOUBLE_128; #endif + + if (s390_tune == PROCESSOR_2097_Z10 + && !PARAM_SET_P (PARAM_MAX_UNROLLED_INSNS)) + set_param_value ("max-unrolled-insns", 100); } /* Map for smallest class containing reg regno. */ ++++++ s390-mvc-mov ++++++ Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:07.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:24.000000000 +0100 @@ -1080,17 +1080,16 @@ ; (define_insn "movti" - [(set (match_operand:TI 0 "nonimmediate_operand" "=d,QS,d,o,Q") - (match_operand:TI 1 "general_operand" "QS,d,dPRT,d,Q"))] + [(set (match_operand:TI 0 "nonimmediate_operand" "=d,QS,d,o") + (match_operand:TI 1 "general_operand" "QS,d,dPRT,d"))] "TARGET_64BIT" "@ lmg\t%0,%N0,%S1 stmg\t%1,%N1,%S0 # - # #" - [(set_attr "op_type" "RSY,RSY,*,*,SS") - (set_attr "type" "lm,stm,*,*,*")]) + [(set_attr "op_type" "RSY,RSY,*,*") + (set_attr "type" "lm,stm,*,*")]) (define_split [(set (match_operand:TI 0 "nonimmediate_operand" "") @@ -1272,10 +1271,10 @@ (define_insn "*movdi_64" [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,d,d,d,d,d,f,d,d,d,d,d, - RT,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t,?Q") + RT,!*f,!*f,!*f,!R,!T,b,Q,d,t,Q,t") (match_operand:DI 1 "general_operand" "K,N0HD0,N1HD0,N2HD0,N3HD0,Os,N0SD0,N1SD0,d,f,L,b,d,RT, - d,*f,R,T,*f,*f,d,K,t,d,t,Q,?Q"))] + d,*f,R,T,*f,*f,d,K,t,d,t,Q"))] "TARGET_64BIT" "@ lghi\t%0,%h1 @@ -1303,16 +1302,15 @@ # # stam\t%1,%N1,%S0 - lam\t%0,%N0,%S1 - #" + lam\t%0,%N0,%S1" [(set_attr "op_type" "RI,RI,RI,RI,RI,RIL,RIL,RIL,RRE,RRE,RXY,RIL,RRE,RXY, - RXY,RR,RX,RXY,RX,RXY,RIL,SIL,*,*,RS,RS,SS") + RXY,RR,RX,RXY,RX,RXY,RIL,SIL,*,*,RS,RS") (set_attr "type" "*,*,*,*,*,*,*,*,floaddf,floaddf,la,larl,lr,load,store, floaddf,floaddf,floaddf,fstoredf,fstoredf,larl,*,*,*, - *,*,*") + *,*") (set_attr "cpu_facility" "*,*,*,*,*,extimm,extimm,extimm,dfp,dfp,longdisp, z10,*,*,*,*,*,longdisp,*,longdisp, - z10,z10,*,*,*,*,*") + z10,z10,*,*,*,*") (set_attr "z10prop" "z10_fwd_A1, z10_fwd_E1, z10_fwd_E1, @@ -1338,7 +1336,6 @@ *, *, *, - *, *") ]) @@ -1377,9 +1374,9 @@ (define_insn "*movdi_31" [(set (match_operand:DI 0 "nonimmediate_operand" - "=d,d,Q,S,d ,o,!*f,!*f,!*f,!R,!T,Q,d") + "=d,d,Q,S,d ,o,!*f,!*f,!*f,!R,!T,d") (match_operand:DI 1 "general_operand" - " Q,S,d,d,dPRT,d, *f, R, T,*f,*f,Q,b"))] + " Q,S,d,d,dPRT,d, *f, R, T,*f,*f,b"))] "!TARGET_64BIT" "@ lm\t%0,%N0,%S1 @@ -1393,11 +1390,10 @@ ldy\t%0,%1 std\t%1,%0 stdy\t%1,%0 - # #" - [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,SS,*") - (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*,*") - (set_attr "cpu_facility" "*,*,*,*,*,*,*,*,*,*,*,*,z10")]) + [(set_attr "op_type" "RS,RSY,RS,RSY,*,*,RR,RX,RXY,RX,RXY,*") + (set_attr "type" "lm,lm,stm,stm,*,*,floaddf,floaddf,floaddf,fstoredf,fstoredf,*") + (set_attr "cpu_facility" "*,*,*,*,*,*,*,*,*,*,*,z10")]) ; For a load from a symbol ref we can use one of the target registers ; together with larl to load the address. @@ -1532,9 +1528,9 @@ (define_insn "*movsi_zarch" [(set (match_operand:SI 0 "nonimmediate_operand" - "=d,d,d,d,d,d,d,d,d,R,T,!*f,!*f,!*f,!R,!T,d,t,Q,b,Q,t,?Q") + "=d,d,d,d,d,d,d,d,d,R,T,!*f,!*f,!*f,!R,!T,d,t,Q,b,Q,t") (match_operand:SI 1 "general_operand" - "K,N0HS0,N1HS0,Os,L,b,d,R,T,d,d,*f,R,T,*f,*f,t,d,t,d,K,Q,?Q"))] + "K,N0HS0,N1HS0,Os,L,b,d,R,T,d,d,*f,R,T,*f,*f,t,d,t,d,K,Q"))] "TARGET_ZARCH" "@ lhi\t%0,%h1 @@ -1558,10 +1554,9 @@ stam\t%1,%1,%S0 strl\t%1,%0 mvhi\t%0,%1 - lam\t%0,%0,%S1 - #" + lam\t%0,%0,%S1" [(set_attr "op_type" "RI,RI,RI,RIL,RXY,RIL,RR,RX,RXY,RX,RXY, - RR,RX,RXY,RX,RXY,RRE,RRE,RS,RIL,SIL,RS,SS") + RR,RX,RXY,RX,RXY,RRE,RRE,RS,RIL,SIL,RS") (set_attr "type" "*, *, *, @@ -1583,10 +1578,9 @@ *, larl, *, - *, *") (set_attr "cpu_facility" "*,*,*,extimm,longdisp,z10,*,*,longdisp,*,longdisp, - *,*,longdisp,*,longdisp,*,*,*,z10,z10,*,*") + *,*,longdisp,*,longdisp,*,*,*,z10,z10,*") (set_attr "z10prop" "z10_fwd_A1, z10_fwd_E1, z10_fwd_E1, @@ -1608,12 +1602,11 @@ *, z10_rec, z10_super, - *, *")]) (define_insn "*movsi_esa" - [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,R,!*f,!*f,!R,d,t,Q,t,?Q") - (match_operand:SI 1 "general_operand" "K,d,R,d,*f,R,*f,t,d,t,Q,?Q"))] + [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,d,R,!*f,!*f,!R,d,t,Q,t") + (match_operand:SI 1 "general_operand" "K,d,R,d,*f,R,*f,t,d,t,Q"))] "!TARGET_ZARCH" "@ lhi\t%0,%h1 @@ -1626,10 +1619,9 @@ ear\t%0,%1 sar\t%0,%1 stam\t%1,%1,%S0 - lam\t%0,%0,%S1 - #" - [(set_attr "op_type" "RI,RR,RX,RX,RR,RX,RX,RRE,RRE,RS,RS,SS") - (set_attr "type" "*,lr,load,store,floadsf,floadsf,fstoresf,*,*,*,*,*") + lam\t%0,%0,%S1" + [(set_attr "op_type" "RI,RR,RX,RX,RR,RX,RX,RRE,RRE,RS,RS") + (set_attr "type" "*,lr,load,store,floadsf,floadsf,fstoresf,*,*,*,*") (set_attr "z10prop" "z10_fwd_A1, z10_fr_E1, z10_fwd_A3, @@ -1640,7 +1632,6 @@ z10_super_E1, z10_super, *, - *, *") ]) @@ -1751,8 +1742,8 @@ }) (define_insn "*movhi" - [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,d,R,T,b,Q,?Q") - (match_operand:HI 1 "general_operand" " d,n,R,T,b,d,d,d,K,?Q"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,d,d,R,T,b,Q") + (match_operand:HI 1 "general_operand" " d,n,R,T,b,d,d,d,K"))] "" "@ lr\t%0,%1 @@ -1763,11 +1754,10 @@ sth\t%1,%0 sthy\t%1,%0 sthrl\t%1,%0 - mvhhi\t%0,%1 - #" - [(set_attr "op_type" "RR,RI,RX,RXY,RIL,RX,RXY,RIL,SIL,SS") - (set_attr "type" "lr,*,*,*,larl,store,store,store,*,*") - (set_attr "cpu_facility" "*,*,*,*,z10,*,*,z10,z10,*") + mvhhi\t%0,%1" + [(set_attr "op_type" "RR,RI,RX,RXY,RIL,RX,RXY,RIL,SIL") + (set_attr "type" "lr,*,*,*,larl,store,store,store,*") + (set_attr "cpu_facility" "*,*,*,*,z10,*,*,z10,z10") (set_attr "z10prop" "z10_fr_E1, z10_fwd_A1, z10_super_E1, @@ -1776,8 +1766,7 @@ z10_super, z10_rec, z10_rec, - z10_super, - *")]) + z10_super")]) (define_peephole2 [(set (match_operand:HI 0 "register_operand" "") @@ -1812,8 +1801,8 @@ }) (define_insn "*movqi" - [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,T,Q,S,?Q") - (match_operand:QI 1 "general_operand" "d,n,R,T,d,d,n,n,?Q"))] + [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,T,Q,S") + (match_operand:QI 1 "general_operand" "d,n,R,T,d,d,n,n"))] "" "@ lr\t%0,%1 @@ -1823,10 +1812,9 @@ stc\t%1,%0 stcy\t%1,%0 mvi\t%S0,%b1 - mviy\t%S0,%b1 - #" - [(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY,SS") - (set_attr "type" "lr,*,*,*,store,store,store,store,*") + mviy\t%S0,%b1" + [(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY") + (set_attr "type" "lr,*,*,*,store,store,store,store") (set_attr "z10prop" "z10_fr_E1, z10_fwd_A1, z10_super_E1, @@ -1834,8 +1822,7 @@ z10_super, z10_rec, z10_super, - z10_super, - *")]) + z10_super")]) (define_peephole2 [(set (match_operand:QI 0 "nonimmediate_operand" "") @@ -1904,8 +1891,8 @@ "") (define_insn "*mov<mode>_64" - [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o, d,QS, d,o,Q") - (match_operand:TD_TF 1 "general_operand" " G,f,o,f,QS, d,dRT,d,Q"))] + [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o, d,QS, d,o") + (match_operand:TD_TF 1 "general_operand" " G,f,o,f,QS, d,dRT,d"))] "TARGET_64BIT" "@ lzxr\t%0 @@ -1915,23 +1902,21 @@ lmg\t%0,%N0,%S1 stmg\t%1,%N1,%S0 # - # #" - [(set_attr "op_type" "RRE,RRE,*,*,RSY,RSY,*,*,*") - (set_attr "type" "fsimptf,fsimptf,*,*,lm,stm,*,*,*")]) + [(set_attr "op_type" "RRE,RRE,*,*,RSY,RSY,*,*") + (set_attr "type" "fsimptf,fsimptf,*,*,lm,stm,*,*")]) (define_insn "*mov<mode>_31" - [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o,Q") - (match_operand:TD_TF 1 "general_operand" " G,f,o,f,Q"))] + [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o") + (match_operand:TD_TF 1 "general_operand" " G,f,o,f"))] "!TARGET_64BIT" "@ lzxr\t%0 lxr\t%0,%1 # - # #" - [(set_attr "op_type" "RRE,RRE,*,*,*") - (set_attr "type" "fsimptf,fsimptf,*,*,*")]) + [(set_attr "op_type" "RRE,RRE,*,*") + (set_attr "type" "fsimptf,fsimptf,*,*")]) ; TFmode in GPRs splitters @@ -2022,9 +2007,9 @@ (define_insn "*mov<mode>_64dfp" [(set (match_operand:DD_DF 0 "nonimmediate_operand" - "=f,f,f,d,f,f,R,T,d,d,RT,?Q") + "=f,f,f,d,f,f,R,T,d, d,RT") (match_operand:DD_DF 1 "general_operand" - "G,f,d,f,R,T,f,f,d,RT,d,?Q"))] + " G,f,d,f,R,T,f,f,d,RT, d"))] "TARGET_64BIT && TARGET_DFP" "@ lzdr\t%0 @@ -2037,11 +2022,10 @@ stdy\t%1,%0 lgr\t%0,%1 lg\t%0,%1 - stg\t%1,%0 - #" - [(set_attr "op_type" "RRE,RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY,SS") + stg\t%1,%0" + [(set_attr "op_type" "RRE,RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY") (set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,floaddf,floaddf, - fstoredf,fstoredf,lr,load,store,*") + fstoredf,fstoredf,lr,load,store") (set_attr "z10prop" "*, *, *, @@ -2052,13 +2036,12 @@ *, z10_fr_E1, z10_fwd_A3, - z10_rec, - *") + z10_rec") ]) (define_insn "*mov<mode>_64" - [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d, d,RT,?Q") - (match_operand:DD_DF 1 "general_operand" "G,f,R,T,f,f,d,RT, d,?Q"))] + [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d, d,RT") + (match_operand:DD_DF 1 "general_operand" "G,f,R,T,f,f,d,RT, d"))] "TARGET_64BIT" "@ lzdr\t%0 @@ -2069,11 +2052,10 @@ stdy\t%1,%0 lgr\t%0,%1 lg\t%0,%1 - stg\t%1,%0 - #" - [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY,SS") + stg\t%1,%0" + [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY") (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>, - fstore<mode>,fstore<mode>,lr,load,store,*") + fstore<mode>,fstore<mode>,lr,load,store") (set_attr "z10prop" "*, *, *, @@ -2082,14 +2064,13 @@ *, z10_fr_E1, z10_fwd_A3, - z10_rec, - *")]) + z10_rec")]) (define_insn "*mov<mode>_31" [(set (match_operand:DD_DF 0 "nonimmediate_operand" - "=f,f,f,f,R,T,d,d,Q,S, d,o,Q") + "=f,f,f,f,R,T,d,d,Q,S, d,o") (match_operand:DD_DF 1 "general_operand" - " G,f,R,T,f,f,Q,S,d,d,dPRT,d,Q"))] + " G,f,R,T,f,f,Q,S,d,d,dPRT,d"))] "!TARGET_64BIT" "@ lzdr\t%0 @@ -2103,11 +2084,10 @@ stm\t%1,%N1,%S0 stmy\t%1,%N1,%S0 # - # #" - [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*,SS") + [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*") (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>, - fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*,*")]) + fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")]) (define_split [(set (match_operand:DD_DF 0 "nonimmediate_operand" "") @@ -2156,9 +2136,9 @@ (define_insn "mov<mode>" [(set (match_operand:SD_SF 0 "nonimmediate_operand" - "=f,f,f,f,R,T,d,d,d,R,T,?Q") + "=f,f,f,f,R,T,d,d,d,R,T") (match_operand:SD_SF 1 "general_operand" - " G,f,R,T,f,f,d,R,T,d,d,?Q"))] + " G,f,R,T,f,f,d,R,T,d,d"))] "" "@ lzer\t%0 @@ -2171,11 +2151,10 @@ l\t%0,%1 ly\t%0,%1 st\t%1,%0 - sty\t%1,%0 - #" - [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY,SS") + sty\t%1,%0" + [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY") (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>, - fstore<mode>,fstore<mode>,lr,load,load,store,store,*") + fstore<mode>,fstore<mode>,lr,load,load,store,store") (set_attr "z10prop" "*, *, *, @@ -2186,8 +2165,7 @@ z10_fwd_A3, z10_fwd_A3, z10_super, - z10_rec, - *")]) + z10_rec")]) ; ; movcc instruction pattern @@ -2221,21 +2199,6 @@ "mvc\t%O0(%2,%R0),%S1" [(set_attr "op_type" "SS")]) -(define_split - [(set (match_operand 0 "memory_operand" "") - (match_operand 1 "memory_operand" ""))] - "reload_completed - && GET_MODE (operands[0]) == GET_MODE (operands[1]) - && GET_MODE_SIZE (GET_MODE (operands[0])) > 0" - [(parallel - [(set (match_dup 0) (match_dup 1)) - (use (match_dup 2))])] -{ - operands[2] = GEN_INT (GET_MODE_SIZE (GET_MODE (operands[0]))); - operands[0] = adjust_address (operands[0], BLKmode, 0); - operands[1] = adjust_address (operands[1], BLKmode, 0); -}) - (define_peephole2 [(parallel [(set (match_operand:BLK 0 "memory_operand" "") ++++++ sap303956-utf16-1.diff ++++++ ++++ 5583 lines (skipped) ++++ between gcc43/sap303956-utf16-1.diff ++++ and /mounts/work_src_done/STABLE/gcc43/sap303956-utf16-1.diff ++++++ sap303956-utf16-3.diff ++++++ ++++ 1318 lines (skipped) ++++ between gcc43/sap303956-utf16-3.diff ++++ and /mounts/work_src_done/STABLE/gcc43/sap303956-utf16-3.diff ++++++ stcmh-fix ++++++ Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:38.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:40.000000000 +0100 @@ -8774,18 +8774,16 @@ ; (define_insn "prefetch" - [(prefetch (match_operand 0 "address_operand" "ZQZS,ZRZT,X") - (match_operand:SI 1 "const_int_operand" " n, n,n") - (match_operand:SI 2 "const_int_operand" " n, n,n"))] - "TARGET_ZARCH && s390_tune == PROCESSOR_2097_Z10" + [(prefetch (match_operand 0 "address_operand" "ZQZRZSZT,X") + (match_operand:SI 1 "const_int_operand" " n,n") + (match_operand:SI 2 "const_int_operand" " n,n"))] + "TARGET_Z10" { switch (which_alternative) { case 0: - return INTVAL (operands[1]) == 1 ? "stcmh\t2,0,%a0" : "stcmh\t1,0,%a0"; - case 1: return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0"; - case 2: + case 1: if (larl_operand (operands[0], Pmode)) return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0"; default: @@ -8796,7 +8794,6 @@ return ""; } } - [(set_attr "type" "store,load,larl") - (set_attr "op_type" "RSY,RXY,RIL") - (set_attr "z10prop" "z10_super") - (set_attr "cpu_facility" "*,z10,z10")]) + [(set_attr "type" "load,larl") + (set_attr "op_type" "RXY,RIL") + (set_attr "z10prop" "z10_super")]) ++++++ suse-record-gcc-opts.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,6 +1,8 @@ ---- gcc/varasm.c -+++ gcc/varasm.c -@@ -6304,6 +6304,35 @@ file_end_indicate_exec_stack (void) +Index: gcc/varasm.c +=================================================================== +--- gcc/varasm.c.orig 2009-01-12 11:01:05.000000000 +0100 ++++ gcc/varasm.c 2009-11-20 13:50:12.000000000 +0100 +@@ -6332,6 +6332,35 @@ file_end_indicate_exec_stack (void) switch_to_section (get_section (".note.GNU-stack", flags, NULL)); } @@ -36,8 +38,10 @@ /* Output DIRECTIVE (a C string) followed by a newline. This is used as a get_unnamed_section callback. */ ---- gcc/output.h -+++ gcc/output.h +Index: gcc/output.h +=================================================================== +--- gcc/output.h.orig 2008-09-17 16:13:10.000000000 +0200 ++++ gcc/output.h 2009-11-20 13:50:12.000000000 +0100 @@ -612,6 +612,7 @@ extern void default_emit_except_table_la extern void default_internal_label (FILE *, const char *, unsigned long); extern void default_file_start (void); @@ -48,16 +52,14 @@ extern void default_elf_asm_output_external (FILE *file, tree, Index: gcc/toplev.c =================================================================== -*** gcc/toplev.c (revision 140371) ---- gcc/toplev.c (working copy) -*************** compile_file (void) -*** 1112,1117 **** ---- 1112,1119 ---- - } - #endif - -+ suse_file_end_indicate_optflags (); -+ - /* This must be at the end. Some target ports emit end of file directives - into the assembly file here, and hence we can not output anything to the - assembly file after this point. */ +--- gcc/toplev.c.orig 2009-05-08 13:55:18.000000000 +0200 ++++ gcc/toplev.c 2009-11-20 13:50:12.000000000 +0100 +@@ -1112,6 +1112,8 @@ compile_file (void) + } + #endif + ++ suse_file_end_indicate_optflags (); ++ + /* This must be at the end. Some target ports emit end of file directives + into the assembly file here, and hence we can not output anything to the + assembly file after this point. */ ++++++ tls-no-direct.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,6 +1,8 @@ ---- gcc/config/i386/linux.h -+++ gcc/config/i386/linux.h -@@ -33,8 +33,13 @@ +Index: gcc/config/i386/linux.h +=================================================================== +--- gcc/config/i386/linux.h.orig 2009-05-26 12:15:16.000000000 +0200 ++++ gcc/config/i386/linux.h 2009-11-20 13:50:20.000000000 +0100 +@@ -32,8 +32,13 @@ along with GCC; see the file COPYING3. #define DEFAULT_PCC_STRUCT_RETURN 1 /* We arrange for the whole %gs segment to map the tls area. */ @@ -14,4 +16,3 @@ #undef ASM_COMMENT_START #define ASM_COMMENT_START "#" - ++++++ true-comp-z10 ++++++ Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-11-20 13:52:33.000000000 +0100 +++ gcc/config/s390/s390.c 2009-11-20 13:52:34.000000000 +0100 @@ -9594,21 +9594,6 @@ s390_optimize_prologue (void) } } - -/* Exchange the two operands of COND, and swap its mask so that the - semantics does not change. */ -static void -s390_swap_cmp (rtx cond) -{ - enum rtx_code code = swap_condition (GET_CODE (cond)); - rtx tmp = XEXP (cond, 0); - - XEXP (cond, 0) = XEXP (cond, 1); - XEXP (cond, 1) = tmp; - PUT_CODE (cond, code); -} - - /* Returns 1 if INSN reads the value of REG for purposes not related to addressing of memory, and 0 otherwise. */ static int @@ -9618,6 +9603,71 @@ s390_non_addr_reg_read_p (rtx reg, rtx i && !reg_used_in_mem_p (REGNO (reg), PATTERN (insn)); } +/* Starting from INSN find_cond_jump looks downwards in the insn + stream for a single jump insn which is the last user of the + condition code set in INSN. */ +static rtx +find_cond_jump (rtx insn) +{ + for (; insn; insn = NEXT_INSN (insn)) + { + rtx ite, cc; + + if (LABEL_P (insn)) + break; + + if (!JUMP_P (insn)) + { + if (reg_mentioned_p (gen_rtx_REG (CCmode, CC_REGNUM), insn)) + break; + continue; + } + + /* This will be triggered by a return. */ + if (GET_CODE (PATTERN (insn)) != SET) + break; + + gcc_assert (SET_DEST (PATTERN (insn)) == pc_rtx); + ite = SET_SRC (PATTERN (insn)); + + if (GET_CODE (ite) != IF_THEN_ELSE) + break; + + cc = XEXP (XEXP (ite, 0), 0); + if (!REG_P (cc) || !CC_REGNO_P (REGNO (cc))) + break; + + if (find_reg_note (insn, REG_DEAD, cc)) + return insn; + break; + } + + return NULL_RTX; +} + +/* Swap the condition in COND and the operands in OP0 and OP1 so that + the semantics does not change. If NULL_RTX is passed as COND the + function tries to find the conditional jump starting with INSN. */ +static void +s390_swap_cmp (rtx cond, rtx *op0, rtx *op1, rtx insn) +{ + rtx tmp = *op0; + + if (cond == NULL_RTX) + { + rtx jump = find_cond_jump (NEXT_INSN (insn)); + jump = jump ? single_set (jump) : NULL_RTX; + + if (jump == NULL_RTX) + return; + + cond = XEXP (XEXP (jump, 1), 0); + } + + *op0 = *op1; + *op1 = tmp; + PUT_CODE (cond, swap_condition (GET_CODE (cond))); +} /* On z10, instructions of the compare-and-branch family have the property to access the register occurring as second operand with @@ -9635,54 +9685,79 @@ s390_z10_optimize_cmp (void) for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) { + rtx cond, *op0, *op1; + if (!INSN_P (insn) || INSN_CODE (insn) <= 0) continue; - if (get_attr_z10prop (insn) == Z10PROP_Z10_COBRA) + if (GET_CODE (PATTERN (insn)) == PARALLEL) { - rtx op0, op1, pattern, jump_expr, cond; + /* Handle compare and branch and branch on count + instructions. */ + rtx pattern = single_set (insn); + + if (!pattern + || SET_DEST (pattern) != pc_rtx + || GET_CODE (SET_SRC (pattern)) != IF_THEN_ELSE) + continue; - /* Extract the comparison�s condition and its operands. */ - pattern = single_set (insn); - gcc_assert (GET_CODE (pattern) == SET); - jump_expr = XEXP (pattern, 1); - gcc_assert (GET_CODE (jump_expr) == IF_THEN_ELSE); - cond = XEXP (jump_expr, 0); - op0 = XEXP (cond, 0); - op1 = XEXP (cond, 1); - - /* Swap the COMPARE�s arguments and its mask if there is a - conflicting access in the previous insn. */ - prev_insn = PREV_INSN (insn); - if (prev_insn != NULL_RTX && INSN_P (prev_insn) - && reg_referenced_p (op1, PATTERN (prev_insn))) - { - s390_swap_cmp (cond); - op0 = XEXP (cond, 0); - op1 = XEXP (cond, 1); - } + cond = XEXP (SET_SRC (pattern), 0); + op0 = &XEXP (cond, 0); + op1 = &XEXP (cond, 1); + } + else if (GET_CODE (PATTERN (insn)) == SET) + { + rtx src, dest; - /* Check if there is a conflict with the next insn. If there - was no conflict with the previous insn, then swap the - COMPARE´s arguments and its mask. If we already swapped - the operands, or if swapping them would cause a conflict - with the previous insn, issue a NOP after the COMPARE in - order to separate the two instuctions. */ - next_insn = NEXT_INSN (insn); - if (next_insn != NULL_RTX && INSN_P (next_insn) - && s390_non_addr_reg_read_p (op1, next_insn)) - { - if (s390_non_addr_reg_read_p (op0, prev_insn)) - { - if (REGNO(op1) == 0) - emit_insn_after (gen_nop1 (), insn); - else - emit_insn_after (gen_nop (), insn); - added_NOPs = 1; - } + /* Handle normal compare instructions. */ + src = SET_SRC (PATTERN (insn)); + dest = SET_DEST (PATTERN (insn)); + + if (!REG_P (dest) + || !CC_REGNO_P (REGNO (dest)) + || GET_CODE (src) != COMPARE) + continue; + + /* s390_swap_cmp will try to find the conditional + jump when passing NULL_RTX as condition. */ + cond = NULL_RTX; + op0 = &XEXP (src, 0); + op1 = &XEXP (src, 1); + } + else + continue; + + if (!REG_P (*op0) || !REG_P (*op1)) + continue; + + /* Swap the COMPARE arguments and its mask if there is a + conflicting access in the previous insn. */ + prev_insn = PREV_INSN (insn); + if (prev_insn != NULL_RTX && INSN_P (prev_insn) + && reg_referenced_p (*op1, PATTERN (prev_insn))) + s390_swap_cmp (cond, op0, op1, insn); + + /* Check if there is a conflict with the next insn. If there + was no conflict with the previous insn, then swap the + COMPARE arguments and its mask. If we already swapped + the operands, or if swapping them would cause a conflict + with the previous insn, issue a NOP after the COMPARE in + order to separate the two instuctions. */ + next_insn = NEXT_INSN (insn); + if (next_insn != NULL_RTX && INSN_P (next_insn) + && s390_non_addr_reg_read_p (*op1, next_insn)) + { + if (prev_insn != NULL_RTX && INSN_P (prev_insn) + && s390_non_addr_reg_read_p (*op0, prev_insn)) + { + if (REGNO (*op1) == 0) + emit_insn_after (gen_nop1 (), insn); else - s390_swap_cmp (cond); + emit_insn_after (gen_nop (), insn); + added_NOPs = 1; } + else + s390_swap_cmp (cond, op0, op1, insn); } } @@ -9807,7 +9882,7 @@ s390_reorg (void) /* Eliminate z10-specific pipeline recycles related to some compare instructions. */ - if (TARGET_Z10) + if (s390_tune == PROCESSOR_2097_Z10) s390_z10_optimize_cmp (); } Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:33.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:34.000000000 +0100 @@ -232,7 +232,6 @@ ;; can immediately read the new value. ;; z10_fr: union of Z10_fwd and z10_rec. ;; z10_c: second operand of instruction is a register and read with complemented bits. -;; z10_cobra: its a compare and branch instruction ;; ;; An additional suffix A1, A3, or E1 indicates the respective AGI bypass. @@ -242,7 +241,7 @@ z10_fwd, z10_fwd_A1, z10_fwd_A3, z10_fwd_E1, z10_rec, z10_fr, z10_fr_A3, z10_fr_E1, - z10_c, z10_cobra" + z10_c" (const_string "none")) @@ -771,7 +770,7 @@ cy\t%0,%1 #" [(set_attr "op_type" "RR,RI,RIL,RX,RXY,SS") - (set_attr "z10prop" "z10_super,z10_super,z10_super,z10_super,z10_super,*")]) + (set_attr "z10prop" "z10_super_c,z10_super,z10_super,z10_super,z10_super,*")]) ; Compare (signed) instructions @@ -1040,7 +1039,7 @@ } [(set_attr "op_type" "RIE") (set_attr "type" "branch") - (set_attr "z10prop" "z10_cobra,z10_super") + (set_attr "z10prop" "z10_super_c,z10_super") (set (attr "length") (if_then_else (lt (abs (minus (pc) (match_dup 3))) (const_int 60000)) (const_int 6) (const_int 12)))]) ; 8 byte for cr/jg @@ -1068,7 +1067,7 @@ } [(set_attr "op_type" "RIE") (set_attr "type" "branch") - (set_attr "z10prop" "z10_cobra,z10_super") + (set_attr "z10prop" "z10_super_c,z10_super") (set (attr "length") (if_then_else (lt (abs (minus (pc) (match_dup 3))) (const_int 60000)) (const_int 6) (const_int 12)))]) ; 8 byte for clr/jg @@ -7676,7 +7675,7 @@ (const_string "RR") (const_string "RX"))) (set_attr "type" "branch") (set_attr "atype" "agen") - (set_attr "z10prop" "z10_cobra")]) + (set_attr "z10prop" "z10_c")]) (define_insn_and_split "doloop_di" [(set (pc) ++++++ Wunprototyped-calls.diff ++++++ --- /var/tmp/diff_new_pack.BS5b00/_old 2009-11-23 14:35:50.000000000 +0100 +++ /var/tmp/diff_new_pack.BS5b00/_new 2009-11-23 14:35:50.000000000 +0100 @@ -1,108 +1,80 @@ Index: gcc/c.opt =================================================================== -*** gcc/c.opt (revision 131759) ---- gcc/c.opt (working copy) -*************** Wunknown-pragmas -*** 457,462 **** ---- 457,466 ---- - C ObjC C++ ObjC++ Warning - Warn about unrecognized pragmas - -+ Wunprototyped-calls -+ C Var(warn_unprototyped_calls) Warning -+ Warn about calls to unprototyped functions with at least one argument -+ - Wunused-macros - C ObjC C++ ObjC++ Warning - Warn about macros defined in the main file that are not used +--- gcc/c.opt.orig 2008-02-19 10:56:00.000000000 +0100 ++++ gcc/c.opt 2009-11-20 13:50:25.000000000 +0100 +@@ -457,6 +457,10 @@ Wunknown-pragmas + C ObjC C++ ObjC++ Warning + Warn about unrecognized pragmas + ++Wunprototyped-calls ++C Var(warn_unprototyped_calls) Warning ++Warn about calls to unprototyped functions with at least one argument ++ + Wunused-macros + C ObjC C++ ObjC++ Warning + Warn about macros defined in the main file that are not used Index: gcc/c-opts.c =================================================================== -*** gcc/c-opts.c (revision 131759) ---- gcc/c-opts.c (working copy) -*************** c_common_handle_option (size_t scode, co -*** 419,427 **** - warn_uninitialized = (value ? 2 : 0); - - if (!c_dialect_cxx ()) -! /* We set this to 2 here, but 1 in -Wmain, so -ffreestanding -! can turn it off only if it's not explicit. */ -! warn_main = value * 2; - else - { - /* C++-specific warnings. */ ---- 419,430 ---- - warn_uninitialized = (value ? 2 : 0); - - if (!c_dialect_cxx ()) -! { -! /* We set this to 2 here, but 1 in -Wmain, so -ffreestanding -! can turn it off only if it's not explicit. */ -! warn_main = value * 2; -! warn_unprototyped_calls = 1; -! } - else - { - /* C++-specific warnings. */ +--- gcc/c-opts.c.orig 2008-02-19 10:56:00.000000000 +0100 ++++ gcc/c-opts.c 2009-11-20 13:50:25.000000000 +0100 +@@ -419,9 +419,12 @@ c_common_handle_option (size_t scode, co + warn_uninitialized = (value ? 2 : 0); + + if (!c_dialect_cxx ()) +- /* We set this to 2 here, but 1 in -Wmain, so -ffreestanding +- can turn it off only if it's not explicit. */ +- warn_main = value * 2; ++ { ++ /* We set this to 2 here, but 1 in -Wmain, so -ffreestanding ++ can turn it off only if it's not explicit. */ ++ warn_main = value * 2; ++ warn_unprototyped_calls = 1; ++ } + else + { + /* C++-specific warnings. */ Index: gcc/testsuite/gcc.dg/cleanup-1.c =================================================================== -*** gcc/testsuite/gcc.dg/cleanup-1.c (revision 131821) ---- gcc/testsuite/gcc.dg/cleanup-1.c (working copy) -*************** -*** 6,12 **** - #define C(x) __attribute__((cleanup(x))) - - static int f1(void *x U) { return 0; } -! static void f2() { } - static void f3(void) { } - static void f4(void *x U) { } - static void f5(int *x U) { } ---- 6,12 ---- - #define C(x) __attribute__((cleanup(x))) - - static int f1(void *x U) { return 0; } -! static void f2() { } /* { dg-message "declared here" "" } */ - static void f3(void) { } - static void f4(void *x U) { } - static void f5(int *x U) { } -*************** static void f9(int x U) { } -*** 18,24 **** - void test(void) - { - int o1 C(f1); -! int o2 C(f2); - int o3 C(f3); /* { dg-error "too many arguments" } */ - int o4 C(f4); - int o5 C(f5); ---- 18,24 ---- - void test(void) - { - int o1 C(f1); -! int o2 C(f2); /* { dg-warning "without a real prototype" } */ - int o3 C(f3); /* { dg-error "too many arguments" } */ - int o4 C(f4); - int o5 C(f5); +--- gcc/testsuite/gcc.dg/cleanup-1.c.orig 2008-02-19 10:53:29.000000000 +0100 ++++ gcc/testsuite/gcc.dg/cleanup-1.c 2009-11-20 13:50:25.000000000 +0100 +@@ -6,7 +6,7 @@ + #define C(x) __attribute__((cleanup(x))) + + static int f1(void *x U) { return 0; } +-static void f2() { } ++static void f2() { } /* { dg-message "declared here" "" } */ + static void f3(void) { } + static void f4(void *x U) { } + static void f5(int *x U) { } +@@ -18,7 +18,7 @@ static void f9(int x U) { } + void test(void) + { + int o1 C(f1); +- int o2 C(f2); ++ int o2 C(f2); /* { dg-warning "without a real prototype" } */ + int o3 C(f3); /* { dg-error "too many arguments" } */ + int o4 C(f4); + int o5 C(f5); Index: gcc/c-typeck.c =================================================================== -*** gcc/c-typeck.c (revision 133807) ---- gcc/c-typeck.c (working copy) -*************** build_function_call (tree function, tree -*** 2444,2449 **** ---- 2444,2461 ---- - if (nargs < 0) - return error_mark_node; - -+ /* If we cannot check function arguments because a prototype is -+ missing for the callee, warn here. */ -+ if (warn_unprototyped_calls -+ && nargs > 0 && !TYPE_ARG_TYPES (fntype) -+ && fundecl && !DECL_BUILT_IN (fundecl) && !C_DECL_IMPLICIT (fundecl) -+ && !DECL_ARGUMENTS (fundecl)) -+ { -+ warning (OPT_Wunprototyped_calls, -+ "call to function %qD without a real prototype", fundecl); -+ inform ("%J%qD was declared here", fundecl, fundecl); -+ } -+ - /* Check that the arguments to the function are valid. */ - - check_function_arguments (TYPE_ATTRIBUTES (fntype), nargs, argarray, +--- gcc/c-typeck.c.orig 2009-10-19 13:18:20.000000000 +0200 ++++ gcc/c-typeck.c 2009-11-20 13:50:25.000000000 +0100 +@@ -2457,6 +2457,18 @@ build_function_call (tree function, tree + if (nargs < 0) + return error_mark_node; + ++ /* If we cannot check function arguments because a prototype is ++ missing for the callee, warn here. */ ++ if (warn_unprototyped_calls ++ && nargs > 0 && !TYPE_ARG_TYPES (fntype) ++ && fundecl && !DECL_BUILT_IN (fundecl) && !C_DECL_IMPLICIT (fundecl) ++ && !DECL_ARGUMENTS (fundecl)) ++ { ++ warning (OPT_Wunprototyped_calls, ++ "call to function %qD without a real prototype", fundecl); ++ inform ("%J%qD was declared here", fundecl, fundecl); ++ } ++ + /* Check that the arguments to the function are valid. */ + + check_function_arguments (TYPE_ATTRIBUTES (fntype), nargs, argarray, ++++++ z10-cost ++++++ Index: gcc/config/s390/2097.md =================================================================== --- gcc/config/s390/2097.md.orig 2009-11-20 13:51:41.000000000 +0100 +++ gcc/config/s390/2097.md 2009-11-20 13:52:38.000000000 +0100 @@ -463,29 +463,34 @@ ; BFP multiplication and general instructions -(define_insn_reservation "z10_fsimpdf" 12 +(define_insn_reservation "z10_fsimpdf" 6 (and (eq_attr "cpu" "z10") (eq_attr "type" "fsimpdf,fmuldf")) "z10_e1_BOTH, z10_Gate_FP") -; Wg "z10_e1_T, z10_Gate_FP") -(define_insn_reservation "z10_fsimpsf" 12 +; LOAD ZERO produces a hex value but we need bin. Using the stage 7 +; bypass causes an exception for format conversion which is very +; expensive. So, make sure subsequent instructions only get the zero +; in the normal way. +(define_insn_reservation "z10_fhex" 12 + (and (eq_attr "cpu" "z10") + (eq_attr "type" "fhex")) + "z10_e1_BOTH, z10_Gate_FP") + +(define_insn_reservation "z10_fsimpsf" 6 (and (eq_attr "cpu" "z10") (eq_attr "type" "fsimpsf,fmulsf")) "z10_e1_BOTH, z10_Gate_FP") -; Wg "z10_e1_T, z10_Gate_FP") (define_insn_reservation "z10_fmultf" 52 (and (eq_attr "cpu" "z10") (eq_attr "type" "fmultf")) "z10_e1_BOTH*4, z10_Gate_FP") -; Wg "z10_e1_T*4, z10_Gate_FP") (define_insn_reservation "z10_fsimptf" 14 (and (eq_attr "cpu" "z10") (eq_attr "type" "fsimptf")) "z10_e1_BOTH*2, z10_Gate_FP") -; Wg "z10_e1_T*2, z10_Gate_FP") ; BFP division @@ -531,12 +536,12 @@ (eq_attr "type" "floadtf")) "z10_e1_T, z10_Gate_FP") -(define_insn_reservation "z10_floaddf" 12 +(define_insn_reservation "z10_floaddf" 1 (and (eq_attr "cpu" "z10") (eq_attr "type" "floaddf")) "z10_e1_T, z10_Gate_FP") -(define_insn_reservation "z10_floadsf" 12 +(define_insn_reservation "z10_floadsf" 1 (and (eq_attr "cpu" "z10") (eq_attr "type" "floadsf")) "z10_e1_T, z10_Gate_FP") @@ -553,12 +558,12 @@ ; BFP truncate -(define_insn_reservation "z10_ftrunctf" 12 +(define_insn_reservation "z10_ftrunctf" 16 (and (eq_attr "cpu" "z10") (eq_attr "type" "ftrunctf")) "z10_e1_T, z10_Gate_FP") -(define_insn_reservation "z10_ftruncdf" 16 +(define_insn_reservation "z10_ftruncdf" 12 (and (eq_attr "cpu" "z10") (eq_attr "type" "ftruncdf")) "z10_e1_T, z10_Gate_FP") @@ -585,8 +590,8 @@ ; BFP-related bypasses. There is no bypass for extended mode. (define_bypass 1 "z10_fsimpdf" "z10_fstoredf") (define_bypass 1 "z10_fsimpsf" "z10_fstoresf") -(define_bypass 1 "z10_floaddf" "z10_fsimpdf, z10_fstoredf, z10_floaddf") -(define_bypass 1 "z10_floadsf" "z10_fsimpsf, z10_fstoresf, z10_floadsf") +(define_bypass 1 "z10_floaddf" "z10_fsimpdf, z10_fstoredf") +(define_bypass 1 "z10_floadsf" "z10_fsimpsf, z10_fstoresf") ; Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c.orig 2009-11-20 13:52:37.000000000 +0100 +++ gcc/config/s390/s390.c 2009-11-20 13:52:38.000000000 +0100 @@ -205,13 +205,13 @@ struct processor_costs z10_cost = COSTS_N_INSNS (10), /* MSGFR */ COSTS_N_INSNS (10), /* MSGR */ COSTS_N_INSNS (10), /* MSR */ - COSTS_N_INSNS (10), /* multiplication in DFmode */ + COSTS_N_INSNS (1) , /* multiplication in DFmode */ COSTS_N_INSNS (50), /* MXBR */ COSTS_N_INSNS (120), /* SQXBR */ COSTS_N_INSNS (52), /* SQDBR */ COSTS_N_INSNS (38), /* SQEBR */ - COSTS_N_INSNS (10), /* MADBR */ - COSTS_N_INSNS (10), /* MAEBR */ + COSTS_N_INSNS (1), /* MADBR */ + COSTS_N_INSNS (1), /* MAEBR */ COSTS_N_INSNS (111), /* DXBR */ COSTS_N_INSNS (39), /* DDBR */ COSTS_N_INSNS (32), /* DEBR */ @@ -5290,6 +5290,7 @@ s390_agen_dep_p (rtx dep_insn, rtx insn) A STD instruction should be scheduled earlier, in order to use the bypass. */ + static int s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority) { @@ -5297,7 +5298,8 @@ s390_adjust_priority (rtx insn ATTRIBUTE return priority; if (s390_tune != PROCESSOR_2084_Z990 - && s390_tune != PROCESSOR_2094_Z9_109) + && s390_tune != PROCESSOR_2094_Z9_109 + && s390_tune != PROCESSOR_2097_Z10) return priority; switch (s390_safe_attr_type (insn)) @@ -5316,6 +5318,7 @@ s390_adjust_priority (rtx insn ATTRIBUTE return priority; } + /* The number of instructions that can be issued per cycle. */ static int Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:37.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:38.000000000 +0100 @@ -199,7 +199,7 @@ (define_attr "type" "none,integer,load,lr,la,larl,lm,stm, cs,vs,store,sem,idiv, imulhi,imulsi,imuldi, - branch,jsr,fsimptf,fsimpdf,fsimpsf, + branch,jsr,fsimptf,fsimpdf,fsimpsf,fhex, floadtf,floaddf,floadsf,fstoredf,fstoresf, fmultf,fmuldf,fmulsf,fdivtf,fdivdf,fdivsf, ftoi,fsqrttf,fsqrtdf,fsqrtsf, @@ -1964,7 +1964,7 @@ # #" [(set_attr "op_type" "RRE,RRE,*,*,RSY,RSY,*,*") - (set_attr "type" "fsimptf,fsimptf,*,*,lm,stm,*,*")]) + (set_attr "type" "fhex,fsimptf,*,*,lm,stm,*,*")]) (define_insn "*mov<mode>_31" [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o") @@ -1976,7 +1976,7 @@ # #" [(set_attr "op_type" "RRE,RRE,*,*") - (set_attr "type" "fsimptf,fsimptf,*,*")]) + (set_attr "type" "fhex,fsimptf,*,*")]) ; TFmode in GPRs splitters @@ -2084,7 +2084,7 @@ lg\t%0,%1 stg\t%1,%0" [(set_attr "op_type" "RRE,RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY") - (set_attr "type" "fsimpdf,floaddf,floaddf,floaddf,floaddf,floaddf, + (set_attr "type" "fhex,floaddf,floaddf,floaddf,floaddf,floaddf, fstoredf,fstoredf,lr,load,store") (set_attr "z10prop" "*, *, @@ -2114,7 +2114,7 @@ lg\t%0,%1 stg\t%1,%0" [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY") - (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>, + (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>, fstore<mode>,fstore<mode>,lr,load,store") (set_attr "z10prop" "*, *, @@ -2146,7 +2146,7 @@ # #" [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*") - (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>, + (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>, fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")]) (define_split @@ -2213,7 +2213,7 @@ st\t%1,%0 sty\t%1,%0" [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY") - (set_attr "type" "fsimp<mode>,fload<mode>,fload<mode>,fload<mode>, + (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>, fstore<mode>,fstore<mode>,lr,load,load,store,store") (set_attr "z10prop" "*, *, Index: gcc/config/s390/2084.md =================================================================== --- gcc/config/s390/2084.md.orig 2009-11-20 13:51:41.000000000 +0100 +++ gcc/config/s390/2084.md 2009-11-20 13:52:38.000000000 +0100 @@ -160,19 +160,19 @@ ;; Floating point insns ;; -(define_insn_reservation "x_fsimptf" 7 +(define_insn_reservation "x_fsimptf" 7 (and (eq_attr "cpu" "z990,z9_109") - (eq_attr "type" "fsimptf")) - "x_e1_t*2,x-wr-fp") + (eq_attr "type" "fsimptf,fhex")) + "x_e1_t*2,x-wr-fp") -(define_insn_reservation "x_fsimpdf" 6 +(define_insn_reservation "x_fsimpdf" 6 (and (eq_attr "cpu" "z990,z9_109") - (eq_attr "type" "fsimpdf,fmuldf")) + (eq_attr "type" "fsimpdf,fmuldf,fhex")) "x_e1_t,x-wr-fp") -(define_insn_reservation "x_fsimpsf" 6 +(define_insn_reservation "x_fsimpsf" 6 (and (eq_attr "cpu" "z990,z9_109") - (eq_attr "type" "fsimpsf,fmulsf")) + (eq_attr "type" "fsimpsf,fmulsf,fhex")) "x_e1_t,x-wr-fp") ++++++ z10-IJ-constraints ++++++ Index: gcc/gcc/config/s390/constraints.md =================================================================== --- gcc.orig/gcc/config/s390/constraints.md +++ gcc/gcc/config/s390/constraints.md @@ -129,13 +129,13 @@ (define_constraint "I" "An 8-bit constant (0..255)" (and (match_code "const_int") - (match_test "(unsigned int) ival <= 255"))) + (match_test "(unsigned HOST_WIDE_INT) ival <= 255"))) (define_constraint "J" "A 12-bit constant (0..4095)" (and (match_code "const_int") - (match_test "(unsigned int) ival <= 4095"))) + (match_test "(unsigned HOST_WIDE_INT) ival <= 4095"))) (define_constraint "K" ++++++ z10-sched-fixes1 ++++++ Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:24.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:26.000000000 +0100 @@ -555,7 +555,8 @@ "@ tmh\t%0,%i1 tml\t%0,%i1" - [(set_attr "op_type" "RI")]) + [(set_attr "op_type" "RI") + (set_attr "z10prop" "z10_super,z10_super")]) (define_insn "*tm<mode>_full" [(set (reg CC_REGNUM) @@ -563,7 +564,8 @@ (match_operand:HQI 1 "immediate_operand" "n")))] "s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], true))" "tml\t%0,<max_uint>" - [(set_attr "op_type" "RI")]) + [(set_attr "op_type" "RI") + (set_attr "z10prop" "z10_super")]) ; @@ -601,7 +603,7 @@ lt<g>r\t%2,%0 lt<g>\t%2,%0" [(set_attr "op_type" "RR<E>,RXY") - (set_attr "z10prop" "z10_fr_E1,z10_fr_A3") ]) + (set_attr "z10prop" "z10_fr_E1,z10_fwd_A3") ]) ; ltr, lt, ltgr, ltg (define_insn "*tst<mode>_cconly_extimm" @@ -614,7 +616,7 @@ lt<g>r\t%0,%0 lt<g>\t%2,%0" [(set_attr "op_type" "RR<E>,RXY") - (set_attr "z10prop" "z10_fr_E1,z10_fr_A3")]) + (set_attr "z10prop" "z10_fr_E1,z10_fwd_A3")]) (define_insn "*tstdi" [(set (reg CC_REGNUM) @@ -712,7 +714,7 @@ cliy\t%S0,0 tml\t%0,255" [(set_attr "op_type" "SI,SIY,RI") - (set_attr "z10prop" "z10_super,z10_super,*")]) + (set_attr "z10prop" "z10_super,z10_super,z10_super")]) (define_insn "*tst<mode>" [(set (reg CC_REGNUM) @@ -853,7 +855,8 @@ "s390_match_ccmode(insn, CCURmode) && TARGET_Z10" "clhrl\t%0,%1" [(set_attr "op_type" "RIL") - (set_attr "type" "larl")]) + (set_attr "type" "larl") + (set_attr "z10prop" "z10_super")]) ; clhrl, clghrl (define_insn "*cmp<GPR:mode>_ccu_zerohi_rldi" @@ -1524,7 +1527,7 @@ "larl\t%0,%1" [(set_attr "op_type" "RIL") (set_attr "type" "larl") - (set_attr "z10prop" "z10_super_A1")]) + (set_attr "z10prop" "z10_fwd_A1")]) (define_insn "*movsi_zarch" [(set (match_operand:SI 0 "nonimmediate_operand" @@ -1590,7 +1593,7 @@ z10_fr_E1, z10_fwd_A3, z10_fwd_A3, - z10_super, + z10_rec, z10_rec, *, *, @@ -1625,7 +1628,7 @@ (set_attr "z10prop" "z10_fwd_A1, z10_fr_E1, z10_fwd_A3, - z10_super, + z10_rec, *, *, *, @@ -1763,7 +1766,7 @@ z10_super_E1, z10_super_E1, z10_super_E1, - z10_super, + z10_rec, z10_rec, z10_rec, z10_super")]) @@ -1819,7 +1822,7 @@ z10_fwd_A1, z10_super_E1, z10_super_E1, - z10_super, + z10_rec, z10_rec, z10_super, z10_super")]) @@ -1846,7 +1849,7 @@ ic\t%0,%1 icy\t%0,%1" [(set_attr "op_type" "RX,RXY") - (set_attr "z10prop" "z10_super_E1,z10_super")]) + (set_attr "z10prop" "z10_super_E1,z10_super_E1")]) ; ; movstricthi instruction pattern(s). @@ -2164,7 +2167,7 @@ z10_fr_E1, z10_fwd_A3, z10_fwd_A3, - z10_super, + z10_rec, z10_rec")]) ; @@ -2185,7 +2188,7 @@ ly\t%1,%0" [(set_attr "op_type" "RR,RI,RRE,RX,RXY,RX,RXY") (set_attr "type" "lr,*,*,store,store,load,load") - (set_attr "z10prop" "z10_fr_E1,*,*,z10_super,z10_rec,z10_fwd_A3,z10_fwd_A3")]) + (set_attr "z10prop" "z10_fr_E1,z10_super,*,z10_rec,z10_rec,z10_fwd_A3,z10_fwd_A3")]) ; ; Block move (MVC) patterns. @@ -3150,7 +3153,8 @@ (clobber (reg:CC CC_REGNUM))] "TARGET_64BIT" "icmh\t%0,%2,%S1" - [(set_attr "op_type" "RSY")]) + [(set_attr "op_type" "RSY") + (set_attr "z10prop" "z10_super")]) (define_insn "*sethighpartdi_31" [(set (match_operand:DI 0 "register_operand" "=d,d") @@ -3693,7 +3697,7 @@ [(set_attr "op_type" "RXY,RRE,RIL") (set_attr "type" "*,*,larl") (set_attr "cpu_facility" "*,*,z10") - (set_attr "z10prop" "z10_fwd_A3")]) + (set_attr "z10prop" "z10_super_E1,z10_fwd_A3,z10_fwd_A3")]) ; llhr, llcr, llghr, llgcr, llh, llc, llgh, llgc (define_insn "*zero_extend<HQI:mode><GPR:mode>2_extimm" @@ -6627,7 +6631,8 @@ (neg:DI (sign_extend:DI (match_dup 1))))] "TARGET_64BIT && s390_match_ccmode (insn, CCAmode)" "lcgfr\t%0,%1" - [(set_attr "op_type" "RRE")]) + [(set_attr "op_type" "RRE") + (set_attr "z10prop" "z10_c")]) (define_insn "*negdi2_sign" [(set (match_operand:DI 0 "register_operand" "=d") @@ -6635,7 +6640,8 @@ (clobber (reg:CC CC_REGNUM))] "TARGET_64BIT" "lcgfr\t%0,%1" - [(set_attr "op_type" "RRE")]) + [(set_attr "op_type" "RRE") + (set_attr "z10prop" "z10_c")]) ; lcr, lcgr (define_insn "*neg<mode>2_cc" @@ -6771,7 +6777,8 @@ (abs:DI (sign_extend:DI (match_dup 1))))] "TARGET_64BIT && s390_match_ccmode (insn, CCAmode)" "lpgfr\t%0,%1" - [(set_attr "op_type" "RRE")]) + [(set_attr "op_type" "RRE") + (set_attr "z10prop" "z10_c")]) (define_insn "*absdi2_sign" [(set (match_operand:DI 0 "register_operand" "=d") @@ -6779,7 +6786,8 @@ (clobber (reg:CC CC_REGNUM))] "TARGET_64BIT" "lpgfr\t%0,%1" - [(set_attr "op_type" "RRE")]) + [(set_attr "op_type" "RRE") + (set_attr "z10prop" "z10_c")]) ; lpr, lpgr (define_insn "*abs<mode>2_cc" @@ -6887,7 +6895,8 @@ (neg:DI (abs:DI (sign_extend:DI (match_dup 1)))))] "TARGET_64BIT && s390_match_ccmode (insn, CCAmode)" "lngfr\t%0,%1" - [(set_attr "op_type" "RRE")]) + [(set_attr "op_type" "RRE") + (set_attr "z10prop" "z10_c")]) (define_insn "*negabsdi2_sign" [(set (match_operand:DI 0 "register_operand" "=d") @@ -6896,7 +6905,8 @@ (clobber (reg:CC CC_REGNUM))] "TARGET_64BIT" "lngfr\t%0,%1" - [(set_attr "op_type" "RRE")]) + [(set_attr "op_type" "RRE") + (set_attr "z10prop" "z10_c")]) ; lnr, lngr (define_insn "*negabs<mode>2_cc" @@ -7513,7 +7523,7 @@ c<g>it%C0\t%1,%h2" [(set_attr "op_type" "RRF,RIE") (set_attr "type" "branch") - (set_attr "z10prop" "z10_c,*")]) + (set_attr "z10prop" "z10_super_c,z10_super")]) ; clrt, clgrt, clfit, clgit (define_insn "*cmp_and_trap_unsigned_int<mode>" @@ -7527,7 +7537,7 @@ cl<gf>it%C0\t%1,%x2" [(set_attr "op_type" "RRF,RIE") (set_attr "type" "branch") - (set_attr "z10prop" "z10_c,*")]) + (set_attr "z10prop" "z10_super_c,z10_super")]) ;; ;;- Loop instructions. @@ -7591,7 +7601,7 @@ [(set_attr "op_type" "RI") ; Strictly speaking, the z10 properties are valid for brct only, however, it does not ; hurt us in the (rare) case of ahi. - (set_attr "z10prop" "z10_super") + (set_attr "z10prop" "z10_super_E1") (set_attr "type" "branch") (set (attr "length") (if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000)) @@ -7633,7 +7643,7 @@ [(set_attr "op_type" "RI") ; Strictly speaking, the z10 properties are valid for brct only, however, it does not ; hurt us in the (rare) case of ahi. - (set_attr "z10prop" "z10_super") + (set_attr "z10prop" "z10_super_E1") (set_attr "type" "branch") (set (attr "length") (if_then_else (eq (symbol_ref "flag_pic") (const_int 0)) @@ -7664,7 +7674,8 @@ (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) (set_attr "type" "branch") - (set_attr "atype" "agen")]) + (set_attr "atype" "agen") + (set_attr "z10prop" "z10_cobra")]) (define_insn_and_split "doloop_di" [(set (pc) @@ -7702,7 +7713,7 @@ [(set_attr "op_type" "RI") ; Strictly speaking, the z10 properties are valid for brct only, however, it does not ; hurt us in the (rare) case of ahi. - (set_attr "z10prop" "z10_super") + (set_attr "z10prop" "z10_super_E1") (set_attr "type" "branch") (set (attr "length") (if_then_else (lt (abs (minus (pc) (match_dup 0))) (const_int 60000)) @@ -7769,8 +7780,7 @@ (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) (set_attr "type" "branch") - (set_attr "atype" "agen") - (set_attr "z10prop" "z10_super")]) + (set_attr "atype" "agen")]) ; ; casesi instruction pattern(s). @@ -8464,7 +8474,8 @@ [(const_int 0)] "" "lr\t0,0" - [(set_attr "op_type" "RR")]) + [(set_attr "op_type" "RR") + (set_attr "z10prop" "z10_fr_E1")]) ; @@ -8526,7 +8537,7 @@ "larl\t%0,%1" [(set_attr "op_type" "RIL") (set_attr "type" "larl") - (set_attr "z10prop" "z10_super_A1")]) + (set_attr "z10prop" "z10_fwd_A1")]) (define_insn "main_pool" [(set (match_operand 0 "register_operand" "=a") @@ -8554,7 +8565,7 @@ "larl\t%0,%1" [(set_attr "op_type" "RIL") (set_attr "type" "larl") - (set_attr "z10prop" "z10_super_A1")]) + (set_attr "z10prop" "z10_fwd_A1")]) (define_insn "pool" [(unspec_volatile [(match_operand 0 "const_int_operand" "n")] UNSPECV_POOL)] ++++++ z10-sched-fixes3 ++++++ Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:26.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:28.000000000 +0100 @@ -3375,27 +3375,28 @@ [(set_attr "op_type" "RI") (set_attr "z10prop" "z10_super_E1")]) +; Update the left-most 32 bit of a DI. +(define_insn "*insv_h_di_reg_extimm" + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+d") + (const_int 32) + (const_int 0)) + (match_operand:DI 1 "const_int_operand" "n"))] + "TARGET_EXTIMM" + "iihf\t%0,%o1" + [(set_attr "op_type" "RIL") + (set_attr "z10prop" "z10_fwd_E1")]) -(define_insn "*insv<mode>_reg_extimm" +; Update the right-most 32 bit of a DI, or the whole of a SI. +(define_insn "*insv_l<mode>_reg_extimm" [(set (zero_extract:P (match_operand:P 0 "register_operand" "+d") (const_int 32) (match_operand 1 "const_int_operand" "n")) (match_operand:P 2 "const_int_operand" "n"))] "TARGET_EXTIMM - && INTVAL (operands[1]) >= 0 - && INTVAL (operands[1]) < BITS_PER_WORD - && INTVAL (operands[1]) % 32 == 0" -{ - switch (BITS_PER_WORD - INTVAL (operands[1])) - { - case 64: return "iihf\t%0,%o2"; break; - case 32: return "iilf\t%0,%o2"; break; - default: gcc_unreachable(); - } -} + && BITS_PER_WORD - INTVAL (operands[1]) == 32" + "iilf\t%0,%o2" [(set_attr "op_type" "RIL") - (set_attr "z10prop" "z10_fwd_E1")]) - + (set_attr "z10prop" "z10_fwd_A1")]) ; ; extendsidi2 instruction pattern(s). ++++++ z10-sched-fixes4 ++++++ Index: gcc/config/s390/s390.md =================================================================== --- gcc/config/s390/s390.md.orig 2009-11-20 13:52:28.000000000 +0100 +++ gcc/config/s390/s390.md 2009-11-20 13:52:30.000000000 +0100 @@ -8137,6 +8137,7 @@ l\t%0,%1%J2 ly\t%0,%1%J2" [(set_attr "op_type" "RX,RXY") + (set_attr "type" "load") (set_attr "z10prop" "z10_fwd_A3,z10_fwd_A3")]) (define_insn "*bras_tls" ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Remember to have fun... -- To unsubscribe, e-mail: opensuse-commit+unsubscribe@opensuse.org For additional commands, e-mail: opensuse-commit+help@opensuse.org