Hello community, here is the log from the commit of package xorg-x11-driver-video checked in at Wed Mar 21 16:06:43 CET 2007. -------- --- xorg-x11-driver-video/xorg-x11-driver-video.changes 2007-03-20 15:42:13.000000000 +0100 +++ /mounts/work_src_done/STABLE/xorg-x11-driver-video/xorg-x11-driver-video.changes 2007-03-21 12:03:11.000000000 +0100 @@ -1,0 +2,11 @@ +Wed Mar 21 12:00:08 CET 2007 - sndirsch@suse.de + +- added a bunch of intel driver patches (xf86-video-intel-[1-5].diff) + from git (master branch): + * Move vendor ID check in the utils to after pci_device_probe. + * Make i830_sdvo_write_sdvox write everything twice. + * Add debug output for ADPA. + * Print the mode actually being set per pipe. + * Attempt to fix single/dual-channel issues on i9xx LVDS panels. + +------------------------------------------------------------------- New: ---- xf86-video-intel-1.diff xf86-video-intel-2.diff xf86-video-intel-3.diff xf86-video-intel-4.diff xf86-video-intel-5.diff ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ xorg-x11-driver-video.spec ++++++ --- /var/tmp/diff_new_pack.OX1716/_old 2007-03-21 16:06:23.000000000 +0100 +++ /var/tmp/diff_new_pack.OX1716/_new 2007-03-21 16:06:23.000000000 +0100 @@ -14,7 +14,7 @@ BuildRequires: Mesa-devel libdrm-devel pkgconfig xorg-x11-proto-devel xorg-x11-server-sdk URL: http://xorg.freedesktop.org/ Version: 7.2 -Release: 70 +Release: 71 License: X11/MIT BuildRoot: %{_tmppath}/%{name}-%{version}-build Group: System/X11/Servers/XF86_4 @@ -88,6 +88,11 @@ Patch28: xf86-video-ati.randr12.diff Patch29: xf86-video-nv.randr12.diff Patch30: xf86-video-mga.randr12.diff +Patch31: xf86-video-intel-1.diff +Patch32: xf86-video-intel-2.diff +Patch33: xf86-video-intel-3.diff +Patch34: xf86-video-intel-4.diff +Patch35: xf86-video-intel-5.diff %description This package contains X.Org video drivers. @@ -107,6 +112,11 @@ %patch30 pushd xf86-video-intel-* %patch -p0 +%patch31 -p1 +%patch32 -p1 +%patch33 -p1 +%patch34 -p1 +%patch35 -p1 popd pushd xf86-video-ati-*/src %patch1 -p1 @@ -254,6 +264,14 @@ %{_mandir}/man4/* %changelog +* Wed Mar 21 2007 - sndirsch@suse.de +- added a bunch of intel driver patches (xf86-video-intel-[1-5].diff) + from git (master branch): + * Move vendor ID check in the utils to after pci_device_probe. + * Make i830_sdvo_write_sdvox write everything twice. + * Add debug output for ADPA. + * Print the mode actually being set per pipe. + * Attempt to fix single/dual-channel issues on i9xx LVDS panels. * Tue Mar 20 2007 - sndirsch@suse.de - xf86-video-nv-NVSync.diff: * NVSync hangs in EnterVT, so don't call it there. ++++++ xf86-video-intel-1.diff ++++++ commit 9d6d9ace4bd3180a4484321c3b96a83bc4adaf84 Author: Eric Anholt Date: Fri Mar 16 19:41:54 2007 -0700 Move vendor ID check in the utils to after pci_device_probe. Even current libpciaccess seems to require this. diff --git a/src/bios_reader/bios_dumper.c b/src/bios_reader/bios_dumper.c index 071419b..c0dbdcf 100644 --- a/src/bios_reader/bios_dumper.c +++ b/src/bios_reader/bios_dumper.c @@ -60,15 +60,15 @@ int main(int argc, char **argv) if (dev == NULL) errx(1, "Couldn't find graphics card"); - if (dev->vendor_id != 0x8086) - errx(1, "Graphics card is non-intel"); - err = pci_device_probe(dev); if (err != 0) { fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err)); exit(1); } + if (dev->vendor_id != 0x8086) + errx(1, "Graphics card is non-intel"); + bios = malloc(dev->rom_size); if (bios == NULL) errx(1, "Couldn't allocate memory for BIOS data\n"); diff --git a/src/reg_dumper/main.c b/src/reg_dumper/main.c index 50c7923..b3c50de 100644 --- a/src/reg_dumper/main.c +++ b/src/reg_dumper/main.c @@ -52,15 +52,15 @@ int main(int argc, char **argv) if (dev == NULL) errx(1, "Couldn't find graphics card"); - if (dev->vendor_id != 0x8086) - errx(1, "Graphics card is non-intel"); - err = pci_device_probe(dev); if (err != 0) { fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err)); exit(1); } + if (dev->vendor_id != 0x8086) + errx(1, "Graphics card is non-intel"); + i830.PciInfo = &i830.pci_info_rec; i830.PciInfo->chipType = dev->device_id; ++++++ xf86-video-intel-2.diff ++++++ commit 991719c21a6cc1b5d9b7cbe30d4b333718b3e686 Author: Keith Packard Date: Sun Mar 18 23:05:33 2007 -0700 Make i830_sdvo_write_sdvox write everything twice. For some reason, certain chips don't correctly enable the SDVO hardware when this register is written only once. We're following what the BIOS code does and writing it twice now, but with extra posting reads to boot. Yes, this is cult-and-paste, but it fixes problems found on deployed hardware. diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c index fb6a7c8..b67ecbc 100644 --- a/src/i830_sdvo.c +++ b/src/i830_sdvo.c @@ -90,12 +90,26 @@ static void i830_sdvo_write_sdvox(xf86Ou I830OutputPrivatePtr intel_output = output->driver_private; struct i830_sdvo_priv *dev_priv = intel_output->dev_priv; I830Ptr pI830 = I830PTR(pScrn); + CARD32 bval = val, cval = val; + int i; - if (dev_priv->output_device == SDVOC) - OUTREG(SDVOB, INREG(SDVOB)); - OUTREG(dev_priv->output_device, val); if (dev_priv->output_device == SDVOB) - OUTREG(SDVOC, INREG(SDVOC)); + cval = INREG(SDVOC); + else + bval = INREG(SDVOB); + + /* + * Write the registers twice for luck. Sometimes, + * writing them only once doesn't appear to 'stick'. + * The BIOS does this too. Yay, magic + */ + for (i = 0; i < 2; i++) + { + OUTREG(SDVOB, bval); + POSTING_READ(SDVOB); + OUTREG(SDVOC, cval); + POSTING_READ(SDVOC); + } } /** Read a single byte from the given address on the SDVO device. */ @@ -740,7 +754,6 @@ i830_sdvo_dpms(xf86OutputPtr output, int temp = INREG(dev_priv->output_device); if ((temp & SDVO_ENABLE) != 0) { i830_sdvo_write_sdvox(output, temp & ~SDVO_ENABLE); - POSTING_READ(dev_priv->output_device); } } } else { @@ -750,19 +763,7 @@ i830_sdvo_dpms(xf86OutputPtr output, int temp = INREG(dev_priv->output_device); if ((temp & SDVO_ENABLE) == 0) - { i830_sdvo_write_sdvox(output, temp | SDVO_ENABLE); - POSTING_READ(dev_priv->output_device); -#if 0 - /* Do it again! If we remove this below register write, or the - * exact same one 2 lines up, the mac mini SDVO output doesn't - * turn on. - */ - i830_sdvo_write_sdvox(output, INREG(dev_priv->output_device) | - SDVO_ENABLE); - POSTING_READ(dev_priv->output_device); -#endif - } for (i = 0; i < 2; i++) i830WaitForVblank(pScrn); ++++++ xf86-video-intel-3.diff ++++++ commit 3ce802414a20ca8af128a00e6925a099dd90ceb4 Author: Eric Anholt Date: Mon Mar 19 11:35:11 2007 -0700 Add debug output for ADPA. diff --git a/src/i830_debug.c b/src/i830_debug.c index 7fd9441..c746d35 100644 --- a/src/i830_debug.c +++ b/src/i830_debug.c @@ -254,6 +254,17 @@ DEBUGSTRING(i830_debug_dpll_test) dpllbndiv, dpllbmdiv, dpllbinput); } +DEBUGSTRING(i830_debug_adpa) +{ + char pipe = (val & ADPA_PIPE_B_SELECT) ? 'B' : 'A'; + char *enable = (val & ADPA_DAC_ENABLE) ? "enabled" : "disabled"; + char hsync = (val & ADPA_HSYNC_ACTIVE_HIGH) ? '+' : '-'; + char vsync = (val & ADPA_VSYNC_ACTIVE_HIGH) ? '+' : '-'; + + return XNFprintf("%s, pipe %c, %chsync, %cvsync", + enable, pipe, hsync, vsync); +} + DEBUGSTRING(i830_debug_lvds) { char pipe = val & LVDS_PIPEB_SELECT ? 'B' : 'A'; @@ -313,7 +324,7 @@ static struct i830SnapshotRec { DEFINEREG(DSPFW2), DEFINEREG(DSPFW3), - DEFINEREG(ADPA), + DEFINEREG2(ADPA, i830_debug_adpa), DEFINEREG2(LVDS, i830_debug_lvds), DEFINEREG(DVOA), DEFINEREG(DVOB), ++++++ xf86-video-intel-4.diff ++++++ commit 64c14204453bea3f98d19861c450612e718e6c69 Author: Eric Anholt Date: Mon Mar 19 13:35:43 2007 -0700 Print the mode actually being set per pipe. diff --git a/src/i830_display.c b/src/i830_display.c index 98137a2..faa3781 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -870,8 +870,17 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, Dis if (i830_panel_fitter_pipe (pI830) == pipe) OUTREG(PFIT_CONTROL, 0); +#if 1 + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B'); + xf86PrintModeline(pScrn->scrnIndex, mode); + if (!xf86ModesEqual(mode, adjusted_mode)) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Adjusted mode for pipe %c:\n", pipe == 0 ? 'A' : 'B'); + xf86PrintModeline(pScrn->scrnIndex, mode); + } i830PrintPll("chosen", &clock); - ErrorF("clock regs: 0x%08x, 0x%08x\n", (int)dpll, (int)fp); +#endif if (dpll & DPLL_VCO_ENABLE) { ++++++ xf86-video-intel-5.diff ++++++ commit 223944878cf38f86580df5a7d3102d86cfc061b9 Author: Eric Anholt Date: Tue Mar 20 14:33:53 2007 -0700 Attempt to fix single/dual-channel issues on i9xx LVDS panels. - Use the existing single/dual-channel state when available, as changing it doesn't appear to work out. - Set the power state of the CLKB and B0-B3 pairs according to whether choose to go dual-channel or not. - Restore the LVDS register at the appropriate point (before DPLLs are re-programmed. diff --git a/src/i810_reg.h b/src/i810_reg.h index d63be02..4c6e582 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -1128,11 +1128,57 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN #define DVO_SRCDIM_HORIZONTAL_SHIFT 12 #define DVO_SRCDIM_VERTICAL_SHIFT 0 +/** @defgroup LVDS + * @{ + */ +/** + * This register controls the LVDS output enable, pipe selection, and data + * format selection. + * + * All of the clock/data pairs are force powered down by power sequencing. + */ #define LVDS 0x61180 +/** + * Enables the LVDS port. This bit must be set before DPLLs are enabled, as + * the DPLL semantics change when the LVDS is assigned to that pipe. + */ # define LVDS_PORT_EN (1 << 31) +/** Selects pipe B for LVDS data. Must be set on pre-965. */ # define LVDS_PIPEB_SELECT (1 << 30) -# define LVDS_CLKA_POWER_DOWN (0 << 8) -# define LVDS_CLKA_POWER_UP (3 << 8) + +/** + * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per + * pixel. + */ +# define LVDS_A0A2_CLKA_POWER_MASK (3 << 8) +# define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8) +# define LVDS_A0A2_CLKA_POWER_UP (3 << 8) +/** + * Controls the A3 data pair, which contains the additional LSBs for 24 bit + * mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be + * on. + */ +# define LVDS_A3_POWER_MASK (3 << 6) +# define LVDS_A3_POWER_DOWN (0 << 6) +# define LVDS_A3_POWER_UP (3 << 6) +/** + * Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP + * is set. + */ +# define LVDS_CLKB_POWER_MASK (3 << 4) +# define LVDS_CLKB_POWER_DOWN (0 << 4) +# define LVDS_CLKB_POWER_UP (3 << 4) + +/** + * Controls the B0-B3 data pairs. This must be set to match the DPLL p2 + * setting for whether we are in dual-channel mode. The B3 pair will + * additionally only be powered up when LVDS_A3_POWER_UP is set. + */ +# define LVDS_B0B3_POWER_MASK (3 << 2) +# define LVDS_B0B3_POWER_DOWN (0 << 2) +# define LVDS_B0B3_POWER_UP (3 << 2) + +/** @} */ /** @defgroup TV_CTL * @{ diff --git a/src/i830_debug.c b/src/i830_debug.c index c746d35..c0261a6 100644 --- a/src/i830_debug.c +++ b/src/i830_debug.c @@ -269,8 +269,21 @@ DEBUGSTRING(i830_debug_lvds) { char pipe = val & LVDS_PIPEB_SELECT ? 'B' : 'A'; char *enable = val & LVDS_PORT_EN ? "enabled" : "disabled"; + int depth; + char *channels; - return XNFprintf("%s, pipe %c", enable, pipe); + if ((val & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP) + depth = 24; + else + depth = 18; + if ((val & LVDS_B0B3_POWER_MASK) == LVDS_B0B3_POWER_UP) + channels = "2 channels"; + else + channels = "1 channel"; + + + return XNFprintf("%s, pipe %c, %d bit, %s", + enable, pipe, depth, channels); } DEBUGSTRING(i830_debug_sdvo) diff --git a/src/i830_display.c b/src/i830_display.c index faa3781..d55e0a6 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -298,8 +298,9 @@ i830PllIsValid(xf86CrtcPtr crtc, intel_c } /** - * Returns a set of divisors for the desired target clock with the given refclk, - * or FALSE. Divisor values are the actual divisors for + * Returns a set of divisors for the desired target clock with the given + * refclk, or FALSE. The returned values represent the clock equation: + * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2. */ static Bool i830FindBestPLL(xf86CrtcPtr crtc, int target, int refclk, intel_clock_t *best_clock) @@ -310,10 +311,23 @@ i830FindBestPLL(xf86CrtcPtr crtc, int ta const intel_limit_t *limit = intel_limit (crtc); int err = target; - if (target < limit->p2.dot_limit) - clock.p2 = limit->p2.p2_slow; - else - clock.p2 = limit->p2.p2_fast; + if (IS_I9XX(pI830) && i830PipeHasType(crtc, I830_OUTPUT_LVDS) && + (INREG(LVDS) & LVDS_PORT_EN) != 0) + { + /* For LVDS, if the panel is on, just rely on its current settings for + * dual-channel. We haven't figured out how to reliably set up + * different single/dual channel state, if we even can. + */ + if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) + clock.p2 = limit->p2.p2_fast; + else + clock.p2 = limit->p2.p2_slow; + } else { + if (target < limit->p2.dot_limit) + clock.p2 = limit->p2.p2_slow; + else + clock.p2 = limit->p2.p2_fast; + } memset (best_clock, 0, sizeof (*best_clock)); @@ -890,13 +904,29 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, Dis usleep(150); } + /* The LVDS pin pair needs to be on before the DPLLs are enabled. + * This is an exception to the general rule that mode_set doesn't turn + * things on. + */ if (is_lvds) { - /* The LVDS pin pair needs to be on before the DPLLs are enabled. - * This is an exception to the general rule that mode_set doesn't turn - * things on. + CARD32 lvds = INREG(LVDS); + + lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; + /* Set the B0-B3 data pairs corresponding to whether we're going to + * set the DPLLs for dual-channel mode or not. + */ + if (adjusted_mode->Clock >= I9XX_P2_LVDS_SLOW_LIMIT) + lvds |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; + else + lvds &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); + + /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) + * appropriately here, but we need to look more thoroughly into how + * panels behave in the two modes. */ - OUTREG(LVDS, INREG(LVDS) | LVDS_PORT_EN | LVDS_PIPEB_SELECT); + + OUTREG(LVDS, lvds); POSTING_READ(LVDS); } diff --git a/src/i830_driver.c b/src/i830_driver.c index c6aea5c..f41beb0 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -1729,6 +1729,8 @@ SaveHWState(ScrnInfoPtr pScrn) pI830->saveSWF[15] = INREG(SWF31); pI830->saveSWF[16] = INREG(SWF32); + if (IS_MOBILE(pI830) && !IS_I830(pI830)) + pI830->saveLVDS = INREG(LVDS); pI830->savePFIT_CONTROL = INREG(PFIT_CONTROL); for (i = 0; i < xf86_config->num_output; i++) { @@ -1771,6 +1773,9 @@ RestoreHWState(ScrnInfoPtr pScrn) } i830WaitForVblank(pScrn); + if (IS_MOBILE(pI830) && !IS_I830(pI830)) + OUTREG(LVDS, pI830->saveLVDS); + if (!IS_I830(pI830) && !IS_845G(pI830)) OUTREG(PFIT_CONTROL, pI830->savePFIT_CONTROL); diff --git a/src/i830_lvds.c b/src/i830_lvds.c index adfbe4f..6f7750a 100644 --- a/src/i830_lvds.c +++ b/src/i830_lvds.c @@ -98,7 +98,7 @@ i830_lvds_dpms (xf86OutputPtr output, in else i830SetLVDSPanelPower(pScrn, FALSE); - /* XXX: We never power down the LVDS pair. */ + /* XXX: We never power down the LVDS pairs. */ } static void @@ -109,7 +109,6 @@ i830_lvds_save (xf86OutputPtr output) pI830->savePP_ON = INREG(LVDSPP_ON); pI830->savePP_OFF = INREG(LVDSPP_OFF); - pI830->saveLVDS = INREG(LVDS); pI830->savePP_CONTROL = INREG(PP_CONTROL); pI830->savePP_CYCLE = INREG(PP_CYCLE); pI830->saveBLC_PWM_CTL = INREG(BLC_PWM_CTL); @@ -133,7 +132,6 @@ i830_lvds_restore(xf86OutputPtr output) OUTREG(LVDSPP_ON, pI830->savePP_ON); OUTREG(LVDSPP_OFF, pI830->savePP_OFF); OUTREG(PP_CYCLE, pI830->savePP_CYCLE); - OUTREG(LVDS, pI830->saveLVDS); OUTREG(PP_CONTROL, pI830->savePP_CONTROL); if (pI830->savePP_CONTROL & POWER_TARGET_ON) i830SetLVDSPanelPower(pScrn, TRUE); @@ -204,11 +202,6 @@ i830_lvds_mode_fixup(xf86OutputPtr outpu xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V); } - /* XXX: if we don't have BIOS fixed timings (or we have - * a preferred mode from DDC, probably), we should use the - * DDC mode as the fixed timing. - */ - /* XXX: It would be nice to support lower refresh rates on the * panels to reduce power consumption, and perhaps match the * user's requested refresh rate. ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Remember to have fun... --------------------------------------------------------------------- To unsubscribe, e-mail: opensuse-commit+unsubscribe@opensuse.org For additional commands, e-mail: opensuse-commit+help@opensuse.org