On 2/12/20 12:18 PM, Brüns, Stefan wrote:
On Mittwoch, 12. Februar 2020 16:37:28 CET ITwrx wrote:
On 2/12/20 1:49 AM, Matwey V. Kornilov wrote: Ok, i misspoke earlier. The first time i didn't extract, then run
On 2/12/20 8:59 AM, ITwrx wrote: dd_rescue per your instructions. i ran "xzcat [image].raw.xz | dd bs=4M of=/dev/sdX iflag=fullblock oflag=direct; sync" (substituting relevant info) per the wiki. This time i did use your commands. I got the same result and output in the serial console as before.
U-Boot TPL 2020.01 (Jan 30 2020 - 10:43:44) data training error col error data training error LPDDR3, 800MHz BW=16 Col=12 Bk=8 CS0 Row=16 CS=1 Die BW=8 Size=4096MB I don't know much about Arm, so i don't know what that output means. :) This is the automatic delay adjustments to balance the trace lengths.
Three possible reasons it fails:
1. bad board 2. initial timing settings too much off for the training to lock 3. unknown/new/different RAM chips which require a different setting
Obviously, your RAM configuration is different from Matweys:
U-Boot TPL 2020.01 (Jan 30 2020 - 10:43:44) LPDDR3, 800MHz BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB Kind regards,
Stefan
Interesting. Thanks for your input. -- To unsubscribe, e-mail: opensuse-arm+unsubscribe@opensuse.org To contact the owner, e-mail: opensuse-arm+owner@opensuse.org