Hello community, here is the log from the commit of package iverilog for openSUSE:Factory checked in at 2019-07-28 10:23:03 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/iverilog (Old) and /work/SRC/openSUSE:Factory/.iverilog.new.4126 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Package is "iverilog" Sun Jul 28 10:23:03 2019 rev:7 rq:719298 version:10.2 Changes: -------- --- /work/SRC/openSUSE:Factory/iverilog/iverilog.changes 2016-03-26 15:25:50.000000000 +0100 +++ /work/SRC/openSUSE:Factory/.iverilog.new.4126/iverilog.changes 2019-07-28 10:23:06.460567284 +0200 @@ -1,0 +2,14 @@ +Fri Jul 26 19:40:35 UTC 2019 - Stefan Brüns <stefan.bruens@rwth-aachen.de> + +- Update to version 10.2 + * No changelog available +- Fix build with bison 3.4.1, add + Fix-makefile-rules-for-header-files-generated-by-bison.patch +- Fix LTO type mismatch, add + fix-cfparse-include-order-causing-lto-type-mismatch.patch +- Spec cleanup: + * remove defattr, use license macro + * Update License to SPDX format + * Drop irrelevant mingw.txt from docs + +------------------------------------------------------------------- Old: ---- verilog-10.1.tar.gz New: ---- Fix-makefile-rules-for-header-files-generated-by-bison.patch fix-cfparse-include-order-causing-lto-type-mismatch.patch verilog-10.2.tar.gz ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ iverilog.spec ++++++ --- /var/tmp/diff_new_pack.fxbtRj/_old 2019-07-28 10:23:07.432567261 +0200 +++ /var/tmp/diff_new_pack.fxbtRj/_new 2019-07-28 10:23:07.436567261 +0200 @@ -1,7 +1,7 @@ # # spec file for package iverilog # -# Copyright (c) 2016 SUSE LINUX GmbH, Nuernberg, Germany. +# Copyright (c) 2019 SUSE LINUX GmbH, Nuernberg, Germany. # # All modifications and additions to the file contributed by third parties # remain the property of their copyright owners, unless otherwise agreed @@ -12,19 +12,23 @@ # license that conforms to the Open Source Definition (Version 1.9) # published by the Open Source Initiative. -# Please submit bugfixes or comments via http://bugs.opensuse.org/ +# Please submit bugfixes or comments via https://bugs.opensuse.org/ # Name: iverilog -Version: 10.1 +Version: 10.2 Release: 0 %define major_ver 10 Summary: Simulation and synthesis tool for IEEE-1364 -License: GPL-2.0+ +License: GPL-2.0-or-later Group: Productivity/Scientific/Electronics Url: http://iverilog.icarus.com/ Source: ftp://icarus.com/pub/eda/verilog/v%{major_ver}/verilog-%{version}.tar.gz +# PATCH-FIX-UPSTREAM https://github.com/steveicarus/iverilog/commit/5bb6c7f53a6ab5b44c282ba5b1189... +Patch0: Fix-makefile-rules-for-header-files-generated-by-bison.patch +# PATCH-FIX-UPSTREAM https://patch-diff.githubusercontent.com/raw/steveicarus/iverilog/pull/257.p... +Patch1: fix-cfparse-include-order-causing-lto-type-mismatch.patch BuildRequires: bison BuildRequires: fdupes BuildRequires: flex @@ -49,10 +53,14 @@ %prep %setup -q -n verilog-%{version} +%patch0 -p1 +%patch1 -p1 %build %configure -make %{?_smp_mflags} +# Can not use make_build here, as the V=1 overwrites a Makefile variable +# https://github.com/steveicarus/iverilog/issues/256 +make %{_smp_mflags} %install %make_install @@ -63,8 +71,8 @@ make check %files -%defattr(-,root,root,-) -%doc COPYING README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt mingw.txt +%license COPYING +%doc README.txt BUGS.txt QUICK_START.txt ieee1364-notes.txt %doc swift.txt netlist.txt t-dll.txt vpi.txt tgt-fpga/fpga.txt %doc cadpli/cadpli.txt xilinx-hint.txt examples %{_mandir}/man1/* @@ -72,7 +80,6 @@ %{_libdir}/ivl/ %files devel -%defattr(-,root,root) %{_includedir}/* %changelog ++++++ Fix-makefile-rules-for-header-files-generated-by-bison.patch ++++++
From 5bb6c7f53a6ab5b44c282ba5b118927fd4f17e4f Mon Sep 17 00:00:00 2001 From: Martin Whitaker <icarus@martin-whitaker.me.uk> Date: Sun, 2 Jun 2019 18:50:18 +0100 Subject: [PATCH] Fix makefile rules for header files generated by bison.
bison 3.4.1 writes the header file before the c++ file. Our makefile rules make the header files depend on the c++ files, so we need to fix the timestamps accordingly. --- Makefile.in | 1 + tgt-pcb/Makefile.in | 1 + vhdlpp/Makefile.in | 1 + vvp/Makefile.in | 1 + 4 files changed, 4 insertions(+) diff --git a/Makefile.in b/Makefile.in index 6c92581be..fff9534e5 100644 --- a/Makefile.in +++ b/Makefile.in @@ -258,6 +258,7 @@ parse.cc: $(srcdir)/parse.y $(YACC) --verbose -t -p VL -d -o $@ $< parse.h: parse.cc mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@ + touch $@ syn-rules.cc: $(srcdir)/syn-rules.y $(YACC) --verbose -t -p syn_ -o $@ $< diff --git a/tgt-pcb/Makefile.in b/tgt-pcb/Makefile.in index 9049f38fd..228ede553 100644 --- a/tgt-pcb/Makefile.in +++ b/tgt-pcb/Makefile.in @@ -91,6 +91,7 @@ fp.cc: $(srcdir)/fp.y $(YACC) --verbose -t -p fp -d -o $@ $< fp.h: fp.cc mv fp.cc.h $@ 2>/dev/null || mv fp.hh $@ + touch $@ ifeq (@WIN32@,yes) TGTLDFLAGS=-L.. -livl diff --git a/vhdlpp/Makefile.in b/vhdlpp/Makefile.in index 0a0f264d2..9bafaf100 100644 --- a/vhdlpp/Makefile.in +++ b/vhdlpp/Makefile.in @@ -120,6 +120,7 @@ parse.cc: $(srcdir)/parse.y $(YACC) --verbose -t -d -o $@ $< parse.h: parse.cc mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@ + touch $@ lexor_keyword.o: lexor_keyword.cc parse.h diff --git a/vvp/Makefile.in b/vvp/Makefile.in index 998e38969..469972fbe 100644 --- a/vvp/Makefile.in +++ b/vvp/Makefile.in @@ -169,6 +169,7 @@ parse.cc: $(srcdir)/parse.y $(YACC) --verbose -t -d -o $@ $< parse.h: parse.cc mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@ + touch $@ lexor.cc: $(srcdir)/lexor.lex $(LEX) -s -olexor.cc $(srcdir)/lexor.lex ++++++ fix-cfparse-include-order-causing-lto-type-mismatch.patch ++++++
From d58fde6f366bce4220a3cf4410d97a6bbec88a82 Mon Sep 17 00:00:00 2001 From: StefanBruens <stefan.bruens@rwth-aachen.de> Date: Fri, 26 Jul 2019 21:26:08 +0200 Subject: [PATCH] Fix redefinition of YYLTYPE struct caused by wrong include order
cfparse.h defines the YYLTYPE struct in case it has not been defined, and also declares an extern YYLTYPE cflloc which is used in cflexor. As cfparse_misc.h defines an extended YYLTYPE, the cflloc instance in cfparse.c has this extended type, i.e. there is a type mismatch. Changing the include order in cflexor causes both cflexor.c and cfparse.c to use the definition from cfparse_misc.h. This has been uncovered by GCC when using LTO: --- gcc -flto=8 main.o substit.o cflexor.o cfparse.o -o iverilog cfparse.h:105:16: warning: type of 'cflloc' does not match original declaration [-Wlto-type-mismatch] 105 | extern YYLTYPE cflloc; | ^ cfparse.c:1162:9: note: type 'struct cfltype' should match type 'struct YYLTYPE' 1162 | YYLTYPE yylloc | ^ cfparse.c:1162:9: note: 'cflloc' was previously declared here cfparse.c:1162:9: note: code may be misoptimized unless '-fno-strict-aliasing' is used --- --- driver/cflexor.lex | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/driver/cflexor.lex b/driver/cflexor.lex index c6e3eb860..5e9e2f506 100644 --- a/driver/cflexor.lex +++ b/driver/cflexor.lex @@ -22,8 +22,8 @@ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ -# include "cfparse.h" # include "cfparse_misc.h" +# include "cfparse.h" # include "globals.h" # include <string.h> ++++++ verilog-10.1.tar.gz -> verilog-10.2.tar.gz ++++++ ++++ 7039 lines of diff (skipped)