Hello community,
here is the log from the commit of package gcc
checked in at Sat Apr 22 00:45:34 CEST 2006.
--------
--- gcc/cross-alpha-gcc-icecream-backend.changes 2006-04-08 12:06:30.000000000 +0200
+++ STABLE/gcc/cross-alpha-gcc-icecream-backend.changes 2006-04-20 11:38:47.000000000 +0200
@@ -1,0 +2,27 @@
+Thu Apr 20 11:38:07 CEST 2006 - rguenther@suse.de
+
+- Add patch to fix ppc long-double varargs ABI issue. [#167932]
+
+-------------------------------------------------------------------
+Wed Apr 19 13:50:33 CEST 2006 - rguenther@suse.de
+
+- Add patch to reorder indexed load/store operands on rs6000. [#161673]
+
+-------------------------------------------------------------------
+Tue Apr 18 12:33:05 CEST 2006 - rguenther@suse.de
+
+- Add patch for PR25917, wrong assembly generated on ia64
+ for certain bitops and extensions.
+- Add patch for PR26777, std::pubseekoff throwing away buffered
+ data on error.
+- Add patch for PR26996, SCEV analysis ICEing on vector types.
+- Add patch for PR27006, wrong assembly genrated on ppc/ppc64
+ for altivec constant loading.
+- Add patch for PR27095, memset and strcmp evaluating length argument
+ twice.
+- Add patch for PR27134, ICEing on (int)floor() and other rounding
+ functions with -ffast-math.
+- Add patch for PR27162, using == instead of the binary predicate
+ specified for std::search_n.
+
+-------------------------------------------------------------------
cross-arm-gcc-icecream-backend.changes: same change
cross-avr-gcc.changes: same change
cross-hppa-gcc-icecream-backend.changes: same change
cross-i386-gcc-icecream-backend.changes: same change
cross-ia64-gcc-icecream-backend.changes: same change
cross-ppc-gcc-icecream-backend.changes: same change
cross-ppc64-gcc-icecream-backend.changes: same change
cross-s390-gcc-icecream-backend.changes: same change
cross-s390x-gcc-icecream-backend.changes: same change
cross-x86_64-gcc-icecream-backend.changes: same change
gcc.changes: same change
New:
----
nvl161673.patch
ppc-longdouble-vaarg-fix
pr25917.patch
pr26777.patch
pr26996.patch
pr27006.patch
pr27095.patch
pr27134.patch
pr27162.patch
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ cross-alpha-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.H5JLQJ/_old 2006-04-22 00:44:27.000000000 +0200
+++ /var/tmp/diff_new_pack.H5JLQJ/_new 2006-04-22 00:44:27.000000000 +0200
@@ -25,7 +25,7 @@
URL: http://gcc.gnu.org/
License: GPL, LGPL
Version: 4.1.0
-Release: 15
+Release: 19
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%if %{gcc_for_opt}
@@ -74,6 +74,15 @@
Patch83: pr26042.patch
Patch84: pr26763.patch
Patch85: pr26919.patch
+Patch86: pr25917.patch
+Patch87: pr26777.patch
+Patch88: pr26996.patch
+Patch89: pr27006.patch
+Patch90: pr27095.patch
+Patch91: pr27134.patch
+Patch92: pr27162.patch
+Patch93: nvl161673.patch
+Patch94: ppc-longdouble-vaarg-fix
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch53: gcc41-java-rmic.patch
@@ -167,6 +176,15 @@
%patch83
%patch84
%patch85
+%patch86
+%patch87
+%patch88
+%patch89
+%patch90
+%patch91
+%patch92
+%patch93
+%patch94
%patch51
%patch53
%patch55
@@ -386,6 +404,24 @@
/usr/share/icecream-envs
%changelog -n cross-alpha-gcc-icecream-backend
+* Thu Apr 20 2006 - rguenther@suse.de
+- Add patch to fix ppc long-double varargs ABI issue. [#167932]
+* Wed Apr 19 2006 - rguenther@suse.de
+- Add patch to reorder indexed load/store operands on rs6000. [#161673]
+* Tue Apr 18 2006 - rguenther@suse.de
+- Add patch for PR25917, wrong assembly generated on ia64
+ for certain bitops and extensions.
+- Add patch for PR26777, std::pubseekoff throwing away buffered
+ data on error.
+- Add patch for PR26996, SCEV analysis ICEing on vector types.
+- Add patch for PR27006, wrong assembly genrated on ppc/ppc64
+ for altivec constant loading.
+- Add patch for PR27095, memset and strcmp evaluating length argument
+ twice.
+- Add patch for PR27134, ICEing on (int)floor() and other rounding
+ functions with -ffast-math.
+- Add patch for PR27162, using == instead of the binary predicate
+ specified for std::search_n.
* Sat Apr 08 2006 - rguenther@suse.de
- Update patch for PR26919 to also collect garbage.
* Fri Apr 07 2006 - rguenther@suse.de
cross-arm-gcc-icecream-backend.spec: same change
++++++ cross-avr-gcc.spec ++++++
--- /var/tmp/diff_new_pack.H5JLQJ/_old 2006-04-22 00:44:27.000000000 +0200
+++ /var/tmp/diff_new_pack.H5JLQJ/_new 2006-04-22 00:44:27.000000000 +0200
@@ -24,7 +24,7 @@
URL: http://gcc.gnu.org/
License: GPL, LGPL
Version: 4.1.0
-Release: 15
+Release: 19
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%if %{gcc_for_opt}
@@ -73,6 +73,15 @@
Patch83: pr26042.patch
Patch84: pr26763.patch
Patch85: pr26919.patch
+Patch86: pr25917.patch
+Patch87: pr26777.patch
+Patch88: pr26996.patch
+Patch89: pr27006.patch
+Patch90: pr27095.patch
+Patch91: pr27134.patch
+Patch92: pr27162.patch
+Patch93: nvl161673.patch
+Patch94: ppc-longdouble-vaarg-fix
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch53: gcc41-java-rmic.patch
@@ -163,6 +172,15 @@
%patch83
%patch84
%patch85
+%patch86
+%patch87
+%patch88
+%patch89
+%patch90
+%patch91
+%patch92
+%patch93
+%patch94
%patch51
%patch53
%patch55
@@ -349,6 +367,24 @@
%{_prefix}
%changelog -n cross-avr-gcc
+* Thu Apr 20 2006 - rguenther@suse.de
+- Add patch to fix ppc long-double varargs ABI issue. [#167932]
+* Wed Apr 19 2006 - rguenther@suse.de
+- Add patch to reorder indexed load/store operands on rs6000. [#161673]
+* Tue Apr 18 2006 - rguenther@suse.de
+- Add patch for PR25917, wrong assembly generated on ia64
+ for certain bitops and extensions.
+- Add patch for PR26777, std::pubseekoff throwing away buffered
+ data on error.
+- Add patch for PR26996, SCEV analysis ICEing on vector types.
+- Add patch for PR27006, wrong assembly genrated on ppc/ppc64
+ for altivec constant loading.
+- Add patch for PR27095, memset and strcmp evaluating length argument
+ twice.
+- Add patch for PR27134, ICEing on (int)floor() and other rounding
+ functions with -ffast-math.
+- Add patch for PR27162, using == instead of the binary predicate
+ specified for std::search_n.
* Sat Apr 08 2006 - rguenther@suse.de
- Update patch for PR26919 to also collect garbage.
* Fri Apr 07 2006 - rguenther@suse.de
++++++ cross-hppa-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.H5JLQJ/_old 2006-04-22 00:44:27.000000000 +0200
+++ /var/tmp/diff_new_pack.H5JLQJ/_new 2006-04-22 00:44:27.000000000 +0200
@@ -25,7 +25,7 @@
URL: http://gcc.gnu.org/
License: GPL, LGPL
Version: 4.1.0
-Release: 15
+Release: 19
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%if %{gcc_for_opt}
@@ -74,6 +74,15 @@
Patch83: pr26042.patch
Patch84: pr26763.patch
Patch85: pr26919.patch
+Patch86: pr25917.patch
+Patch87: pr26777.patch
+Patch88: pr26996.patch
+Patch89: pr27006.patch
+Patch90: pr27095.patch
+Patch91: pr27134.patch
+Patch92: pr27162.patch
+Patch93: nvl161673.patch
+Patch94: ppc-longdouble-vaarg-fix
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch53: gcc41-java-rmic.patch
@@ -167,6 +176,15 @@
%patch83
%patch84
%patch85
+%patch86
+%patch87
+%patch88
+%patch89
+%patch90
+%patch91
+%patch92
+%patch93
+%patch94
%patch51
%patch53
%patch55
@@ -386,6 +404,24 @@
/usr/share/icecream-envs
%changelog -n cross-hppa-gcc-icecream-backend
+* Thu Apr 20 2006 - rguenther@suse.de
+- Add patch to fix ppc long-double varargs ABI issue. [#167932]
+* Wed Apr 19 2006 - rguenther@suse.de
+- Add patch to reorder indexed load/store operands on rs6000. [#161673]
+* Tue Apr 18 2006 - rguenther@suse.de
+- Add patch for PR25917, wrong assembly generated on ia64
+ for certain bitops and extensions.
+- Add patch for PR26777, std::pubseekoff throwing away buffered
+ data on error.
+- Add patch for PR26996, SCEV analysis ICEing on vector types.
+- Add patch for PR27006, wrong assembly genrated on ppc/ppc64
+ for altivec constant loading.
+- Add patch for PR27095, memset and strcmp evaluating length argument
+ twice.
+- Add patch for PR27134, ICEing on (int)floor() and other rounding
+ functions with -ffast-math.
+- Add patch for PR27162, using == instead of the binary predicate
+ specified for std::search_n.
* Sat Apr 08 2006 - rguenther@suse.de
- Update patch for PR26919 to also collect garbage.
* Fri Apr 07 2006 - rguenther@suse.de
cross-i386-gcc-icecream-backend.spec: same change
cross-ia64-gcc-icecream-backend.spec: same change
cross-ppc-gcc-icecream-backend.spec: same change
cross-ppc64-gcc-icecream-backend.spec: same change
cross-s390-gcc-icecream-backend.spec: same change
cross-s390x-gcc-icecream-backend.spec: same change
cross-x86_64-gcc-icecream-backend.spec: same change
++++++ gcc.spec ++++++
--- /var/tmp/diff_new_pack.H5JLQJ/_old 2006-04-22 00:44:27.000000000 +0200
+++ /var/tmp/diff_new_pack.H5JLQJ/_new 2006-04-22 00:44:27.000000000 +0200
@@ -85,7 +85,7 @@
URL: http://gcc.gnu.org/
License: GPL
Version: 4.1.0
-Release: 15
+Release: 19
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%if %{gcc_for_opt}
@@ -136,6 +136,15 @@
Patch83: pr26042.patch
Patch84: pr26763.patch
Patch85: pr26919.patch
+Patch86: pr25917.patch
+Patch87: pr26777.patch
+Patch88: pr26996.patch
+Patch89: pr27006.patch
+Patch90: pr27095.patch
+Patch91: pr27134.patch
+Patch92: pr27162.patch
+Patch93: nvl161673.patch
+Patch94: ppc-longdouble-vaarg-fix
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch53: gcc41-java-rmic.patch
@@ -590,6 +599,15 @@
%patch83
%patch84
%patch85
+%patch86
+%patch87
+%patch88
+%patch89
+%patch90
+%patch91
+%patch92
+%patch93
+%patch94
%patch51
%patch53
%patch55
@@ -1722,6 +1740,24 @@
%endif
%changelog -n gcc
+* Thu Apr 20 2006 - rguenther@suse.de
+- Add patch to fix ppc long-double varargs ABI issue. [#167932]
+* Wed Apr 19 2006 - rguenther@suse.de
+- Add patch to reorder indexed load/store operands on rs6000. [#161673]
+* Tue Apr 18 2006 - rguenther@suse.de
+- Add patch for PR25917, wrong assembly generated on ia64
+ for certain bitops and extensions.
+- Add patch for PR26777, std::pubseekoff throwing away buffered
+ data on error.
+- Add patch for PR26996, SCEV analysis ICEing on vector types.
+- Add patch for PR27006, wrong assembly genrated on ppc/ppc64
+ for altivec constant loading.
+- Add patch for PR27095, memset and strcmp evaluating length argument
+ twice.
+- Add patch for PR27134, ICEing on (int)floor() and other rounding
+ functions with -ffast-math.
+- Add patch for PR27162, using == instead of the binary predicate
+ specified for std::search_n.
* Sat Apr 08 2006 - rguenther@suse.de
- Update patch for PR26919 to also collect garbage.
* Fri Apr 07 2006 - rguenther@suse.de
++++++ gcc.spec.in ++++++
--- gcc/gcc.spec.in 2006-04-07 10:44:55.000000000 +0200
+++ STABLE/gcc/gcc.spec.in 2006-04-20 11:37:57.000000000 +0200
@@ -154,6 +154,15 @@
Patch83: pr26042.patch
Patch84: pr26763.patch
Patch85: pr26919.patch
+Patch86: pr25917.patch
+Patch87: pr26777.patch
+Patch88: pr26996.patch
+Patch89: pr27006.patch
+Patch90: pr27095.patch
+Patch91: pr27134.patch
+Patch92: pr27162.patch
+Patch93: nvl161673.patch
+Patch94: ppc-longdouble-vaarg-fix
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
Patch53: gcc41-java-rmic.patch
@@ -524,6 +533,15 @@
%patch83
%patch84
%patch85
+%patch86
+%patch87
+%patch88
+%patch89
+%patch90
+%patch91
+%patch92
+%patch93
+%patch94
%patch51
%patch53
%patch55
++++++ nvl161673.patch ++++++
You asked whether there was a smaller patch that only reordered
operands in the backend to "fix" the indexed load/store problem.
David Edelsohn does have one which I'm attaching here for you.
I just applied the patch to the latest GCC 4.1 branch and
bootstrapped it and regtested it with no problems.
* config/rs6000/rs6000.c (print_operand, 'y'): Swap position of
registers in index addresses.
(print_operand_address): Same.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 113054)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -10717,12 +10717,14 @@
&& REG_P (XEXP (tmp, 0))
&& REG_P (XEXP (tmp, 1)));
- if (REGNO (XEXP (tmp, 0)) == 0)
+ /* Second index register frequently contains base address,
+ preferentially place it in rA position unless it is r0. */
+ if (REGNO (XEXP (tmp, 1)) == 0)
+ fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (tmp, 0)) ],
+ reg_names[ REGNO (XEXP (tmp, 1)) ]);
+ else
fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (tmp, 1)) ],
reg_names[ REGNO (XEXP (tmp, 0)) ]);
- else
- fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (tmp, 0)) ],
- reg_names[ REGNO (XEXP (tmp, 1)) ]);
}
break;
}
@@ -10776,12 +10778,15 @@
else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
{
gcc_assert (REG_P (XEXP (x, 0)));
- if (REGNO (XEXP (x, 0)) == 0)
+
+ /* Second index register frequently contains base address,
+ preferentially place it in rA position unless it is r0. */
+ if (REGNO (XEXP (x, 1)) == 0)
+ fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
+ reg_names[ REGNO (XEXP (x, 1)) ]);
+ else
fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
reg_names[ REGNO (XEXP (x, 0)) ]);
- else
- fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
- reg_names[ REGNO (XEXP (x, 1)) ]);
}
else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
fprintf (file, HOST_WIDE_INT_PRINT_DEC "(%s)",
++++++ ppc-longdouble-vaarg-fix ++++++
This patch fixes a bug in the new ppc long double support. On
powerpc-linux, a long double function arg is not passed split between
the last fpr and stack: If there is only one fpr available, the long
double is passed entirely on the stack, and all following fp args are
passed on the stack. rs6000_gimplify_va_arg needs to be taught that
all the following fp args are stack based.
I'll apply this as obvious to mainline and 4.1 after performing
regression tests.
* config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Consume all
fp regs if the last fp arg doesn't fit in regs.
Index: gcc/config/rs6000/rs6000.c
===================================================================
*** gcc/config/rs6000/rs6000.c (revision 113111)
--- gcc/config/rs6000/rs6000.c (working copy)
*************** rs6000_gimplify_va_arg (tree valist, tre
*** 5892,5901 ****
t = build1 (LABEL_EXPR, void_type_node, lab_false);
append_to_statement_list (t, pre_p);
! if (n_reg > 2)
{
/* Ensure that we don't find any more args in regs.
! Alignment has taken care of the n_reg == 2 case. */
t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, size_int (8));
gimplify_and_add (t, pre_p);
}
--- 5892,5901 ----
t = build1 (LABEL_EXPR, void_type_node, lab_false);
append_to_statement_list (t, pre_p);
! if ((n_reg == 2 && reg != gpr) || n_reg > 2)
{
/* Ensure that we don't find any more args in regs.
! Alignment has taken care of the n_reg == 2 gpr case. */
t = build (MODIFY_EXPR, TREE_TYPE (reg), reg, size_int (8));
gimplify_and_add (t, pre_p);
}
++++++ pr25917.patch ++++++
2006-03-16 Steve Ellcey
PR target/25917
Backport from mainline.
* config/ia64/predicates.md (extr_len_operand): New predicate.
* config/ia64/ia64.md (extv): Tighten constraints.
(extzv): Ditto.
(*tbit_and_2): Ditto.
(*tbit_and_3): Ditto.
(*tbit_or_2): Ditto.
(*tbit_or_3): Ditto.
(*bit_zero): Ditto.
(*bit_one): Ditto.
Index: gcc/config/ia64/predicates.md
===================================================================
*** gcc/config/ia64/predicates.md (revision 112139)
--- gcc/config/ia64/predicates.md (revision 112140)
*************** (define_predicate "shift_count_operand"
*** 486,491 ****
--- 486,496 ----
(and (match_code "const_int")
(match_test "CONST_OK_FOR_M (INTVAL (op))")))
+ ;; True if OP-1 is a 6 bit immediate operand, used in extr instruction.
+ (define_predicate "extr_len_operand"
+ (and (match_code "const_int")
+ (match_test "CONST_OK_FOR_M (INTVAL (op) - 1)")))
+
;; True if OP is a 5 bit immediate operand.
(define_predicate "shift_32bit_count_operand"
(and (match_code "const_int")
Index: gcc/config/ia64/ia64.md
===================================================================
*** gcc/config/ia64/ia64.md (revision 112139)
--- gcc/config/ia64/ia64.md (revision 112140)
*************** (define_insn "fixuns_truncxfdi2_alts"
*** 1023,1030 ****
(define_insn "extv"
[(set (match_operand:DI 0 "gr_register_operand" "=r")
(sign_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
! (match_operand:DI 2 "const_int_operand" "n")
! (match_operand:DI 3 "const_int_operand" "n")))]
""
"extr %0 = %1, %3, %2"
[(set_attr "itanium_class" "ishf")])
--- 1023,1030 ----
(define_insn "extv"
[(set (match_operand:DI 0 "gr_register_operand" "=r")
(sign_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
! (match_operand:DI 2 "extr_len_operand" "n")
! (match_operand:DI 3 "shift_count_operand" "M")))]
""
"extr %0 = %1, %3, %2"
[(set_attr "itanium_class" "ishf")])
*************** (define_insn "extv"
*** 1032,1039 ****
(define_insn "extzv"
[(set (match_operand:DI 0 "gr_register_operand" "=r")
(zero_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
! (match_operand:DI 2 "const_int_operand" "n")
! (match_operand:DI 3 "const_int_operand" "n")))]
""
"extr.u %0 = %1, %3, %2"
[(set_attr "itanium_class" "ishf")])
--- 1032,1039 ----
(define_insn "extzv"
[(set (match_operand:DI 0 "gr_register_operand" "=r")
(zero_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
! (match_operand:DI 2 "extr_len_operand" "n")
! (match_operand:DI 3 "shift_count_operand" "M")))]
""
"extr.u %0 = %1, %3, %2"
[(set_attr "itanium_class" "ishf")])
*************** (define_insn "*tbit_and_2"
*** 1429,1435 ****
(and:BI (ne:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "const_int_operand" "n"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
--- 1429,1435 ----
(and:BI (ne:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "shift_count_operand" "M"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
*************** (define_insn "*tbit_and_3"
*** 1441,1447 ****
(and:BI (eq:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "const_int_operand" "n"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
--- 1441,1447 ----
(and:BI (eq:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "shift_count_operand" "M"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
*************** (define_insn "*tbit_or_2"
*** 1553,1559 ****
(ior:BI (ne:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "const_int_operand" "n"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
--- 1553,1559 ----
(ior:BI (ne:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "shift_count_operand" "M"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
*************** (define_insn "*tbit_or_3"
*** 1565,1571 ****
(ior:BI (eq:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "const_int_operand" "n"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
--- 1565,1571 ----
(ior:BI (eq:BI (zero_extract:DI
(match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "shift_count_operand" "M"))
(const_int 0))
(match_operand:BI 3 "register_operand" "0")))]
""
*************** (define_insn "*bit_zero"
*** 5008,5014 ****
[(set (match_operand:BI 0 "register_operand" "=c")
(eq:BI (zero_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "immediate_operand" "n"))
(const_int 0)))]
""
"tbit.z %0, %I0 = %1, %2"
--- 5008,5014 ----
[(set (match_operand:BI 0 "register_operand" "=c")
(eq:BI (zero_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "shift_count_operand" "M"))
(const_int 0)))]
""
"tbit.z %0, %I0 = %1, %2"
*************** (define_insn "*bit_one"
*** 5018,5024 ****
[(set (match_operand:BI 0 "register_operand" "=c")
(ne:BI (zero_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "immediate_operand" "n"))
(const_int 0)))]
""
"tbit.nz %0, %I0 = %1, %2"
--- 5018,5024 ----
[(set (match_operand:BI 0 "register_operand" "=c")
(ne:BI (zero_extract:DI (match_operand:DI 1 "gr_register_operand" "r")
(const_int 1)
! (match_operand:DI 2 "shift_count_operand" "M"))
(const_int 0)))]
""
"tbit.nz %0, %I0 = %1, %2"
++++++ pr26777.patch ++++++
2006-03-28 Paolo Carlini
PR libstdc++/26777
* include/bits/fstream.tcc (basic_filebuf<>::_M_seek): Check
the return value of _M_file.seekoff.
* testsuite/27_io/basic_filebuf/seekoff/char/26777.cc: New.
Index: libstdc++-v3/include/bits/fstream.tcc
===================================================================
*** libstdc++-v3/include/bits/fstream.tcc (revision 112476)
--- libstdc++-v3/include/bits/fstream.tcc (revision 112477)
***************
*** 1,6 ****
// File based streams -*- C++ -*-
! // Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
// Free Software Foundation, Inc.
//
// This file is part of the GNU ISO C++ Library. This library is free
--- 1,6 ----
// File based streams -*- C++ -*-
! // Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
// Free Software Foundation, Inc.
//
// This file is part of the GNU ISO C++ Library. This library is free
*************** namespace std
*** 740,751 ****
{
// Returns pos_type(off_type(-1)) in case of failure.
__ret = pos_type(_M_file.seekoff(__off, __way));
! _M_reading = false;
! _M_writing = false;
! _M_ext_next = _M_ext_end = _M_ext_buf;
! _M_set_buffer(-1);
! _M_state_cur = __state;
! __ret.state(_M_state_cur);
}
return __ret;
}
--- 740,754 ----
{
// Returns pos_type(off_type(-1)) in case of failure.
__ret = pos_type(_M_file.seekoff(__off, __way));
! if (__ret != pos_type(off_type(-1)))
! {
! _M_reading = false;
! _M_writing = false;
! _M_ext_next = _M_ext_end = _M_ext_buf;
! _M_set_buffer(-1);
! _M_state_cur = __state;
! __ret.state(_M_state_cur);
! }
}
return __ret;
}
Index: libstdc++-v3/testsuite/27_io/basic_filebuf/seekoff/char/26777.cc
===================================================================
*** libstdc++-v3/testsuite/27_io/basic_filebuf/seekoff/char/26777.cc (revision 0)
--- libstdc++-v3/testsuite/27_io/basic_filebuf/seekoff/char/26777.cc (revision 112477)
***************
*** 0 ****
--- 1,86 ----
+ // { dg-require-fork "" }
+ // { dg-require-mkfifo "" }
+
+ // 2006-03-22 Paolo Carlini
+
+ // Copyright (C) 2006 Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library. This library is free
+ // software; you can redistribute it and/or modify it under the
+ // terms of the GNU General Public License as published by the
+ // Free Software Foundation; either version 2, or (at your option)
+ // any later version.
+
+ // This library is distributed in the hope that it will be useful,
+ // but WITHOUT ANY WARRANTY; without even the implied warranty of
+ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ // GNU General Public License for more details.
+
+ // You should have received a copy of the GNU General Public License along
+ // with this library; see the file COPYING. If not, write to the Free
+ // Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
+ // USA.
+
+ #include
+ #include <fstream>
+ #include <sstream>
+ #include
+ #include
+ #include
+ #include
+ #include
+
+ // libstdc++/26777
+ void test01()
+ {
+ using namespace std;
+ using namespace __gnu_test;
+
+ bool test __attribute__((unused)) = true;
+
+ const char* name = "tmp_fifo6";
+
+ signal(SIGPIPE, SIG_IGN);
+
+ unlink(name);
+ mkfifo(name, S_IRWXU);
+ semaphore s1, s2;
+
+ int child = fork();
+ VERIFY( child != -1 );
+
+ if (child == 0)
+ {
+ filebuf fbout;
+ fbout.open(name, ios_base::in | ios_base::out);
+ VERIFY( fbout.is_open() );
+ fbout.sputn("Whatever", 8);
+ fbout.pubsync();
+ s1.signal();
+ s2.wait();
+ fbout.close();
+ s1.signal();
+ exit(0);
+ }
+
+ filebuf fbin;
+ fbin.open(name, ios::in);
+ s1.wait();
+
+ fbin.sgetc();
+ fbin.pubseekoff(0, ios::cur, ios::in);
+ s2.signal();
+ s1.wait();
+
+ ostringstream oss;
+ oss << &fbin;
+ fbin.close();
+
+ VERIFY( oss.str() == "Whatever" );
+ }
+
+ int main()
+ {
+ test01();
+ return 0;
+ }
++++++ pr26996.patch ++++++
2006-04-05 Sebastian Pop
PR tree-optimization/26996
* tree-scalar-evolution.c (analyze_scalar_evolution_1): Don't analyze
VECTOR_TYPE variables.
===================================================================
*** gcc/tree-scalar-evolution.c (revision 112710)
--- gcc/tree-scalar-evolution.c (revision 112711)
*************** analyze_scalar_evolution_1 (struct loop
*** 1723,1729 ****
basic_block bb;
struct loop *def_loop;
! if (loop == NULL)
return chrec_dont_know;
if (TREE_CODE (var) != SSA_NAME)
--- 1723,1729 ----
basic_block bb;
struct loop *def_loop;
! if (loop == NULL || TREE_CODE (type) == VECTOR_TYPE)
return chrec_dont_know;
if (TREE_CODE (var) != SSA_NAME)
++++++ pr27006.patch ++++++
2006-04-13 Paolo Bonzini
Ulrich Weigand
PR target/27006
* config/rs6000/rs6000.h (EASY_VECTOR_15_ADD_SELF): Require n
to be even.
Index: gcc/testsuite/gcc.dg/vmx/pr27006.c
===================================================================
*** gcc/testsuite/gcc.dg/vmx/pr27006.c (revision 0)
--- gcc/testsuite/gcc.dg/vmx/pr27006.c (revision 112924)
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do run */
+ /* { dg-options "-maltivec" } */
+
+ extern void abort ();
+
+ typedef union
+ {
+ int i[4];
+ __attribute__((altivec(vector__))) int v;
+ } vec_int4;
+
+ int main (void)
+ {
+ vec_int4 i1;
+
+ i1.v = (__attribute__((altivec(vector__))) int){31, 31, 31, 31};
+
+ if (i1.i[0] != 31)
+ abort ();
+
+ return 0;
+ }
+
Index: gcc/config/rs6000/rs6000.h
===================================================================
*** gcc/config/rs6000/rs6000.h (revision 112923)
--- gcc/config/rs6000/rs6000.h (revision 112924)
*************** typedef struct rs6000_args
*** 1699,1705 ****
#define EASY_VECTOR_15(n) ((n) >= -16 && (n) <= 15)
#define EASY_VECTOR_15_ADD_SELF(n) (!EASY_VECTOR_15((n)) \
! && EASY_VECTOR_15((n) >> 1))
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
--- 1699,1706 ----
#define EASY_VECTOR_15(n) ((n) >= -16 && (n) <= 15)
#define EASY_VECTOR_15_ADD_SELF(n) (!EASY_VECTOR_15((n)) \
! && EASY_VECTOR_15((n) >> 1) \
! && ((n) & 1) == 0)
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
and check its validity for a certain class.
++++++ pr27095.patch ++++++
2006-04-14 Alan Modra
PR middle-end/27095
* builtins.c: (expand_builtin_memset): Stabilize args before expansion
and emit libcall here in case the builtin fails.
(expand_builtin_strcmp): Always emit the libcall here on failure.
Index: gcc/builtins.c
===================================================================
*** gcc/builtins.c (revision 113003)
--- gcc/builtins.c (working copy)
*************** expand_builtin_memset (tree arglist, rtx
*** 3413,3424 ****
tree dest = TREE_VALUE (arglist);
tree val = TREE_VALUE (TREE_CHAIN (arglist));
tree len = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
char c;
!
! unsigned int dest_align
! = get_pointer_alignment (dest, BIGGEST_ALIGNMENT);
rtx dest_mem, dest_addr, len_rtx;
/* If DEST is not a pointer type, don't do this
operation in-line. */
if (dest_align == 0)
--- 3413,3426 ----
tree dest = TREE_VALUE (arglist);
tree val = TREE_VALUE (TREE_CHAIN (arglist));
tree len = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+ tree fndecl, fn;
+ enum built_in_function fcode;
char c;
! unsigned int dest_align;
rtx dest_mem, dest_addr, len_rtx;
+ dest_align = get_pointer_alignment (dest, BIGGEST_ALIGNMENT);
+
/* If DEST is not a pointer type, don't do this
operation in-line. */
if (dest_align == 0)
*************** expand_builtin_memset (tree arglist, rtx
*** 3432,3446 ****
return expand_expr (dest, target, mode, EXPAND_NORMAL);
}
len_rtx = expand_expr (len, NULL_RTX, VOIDmode, 0);
dest_mem = get_memory_rtx (dest, len);
if (TREE_CODE (val) != INTEGER_CST)
{
rtx val_rtx;
! val = fold_build1 (CONVERT_EXPR, unsigned_char_type_node, val);
! val_rtx = expand_expr (val, NULL_RTX, VOIDmode, 0);
/* Assume that we can memset by pieces if we can store the
* the coefficients by pieces (in the required modes).
--- 3434,3454 ----
return expand_expr (dest, target, mode, EXPAND_NORMAL);
}
+ /* Stabilize the arguments in case we fail. */
+ dest = builtin_save_expr (dest);
+ val = builtin_save_expr (val);
+ len = builtin_save_expr (len);
+
len_rtx = expand_expr (len, NULL_RTX, VOIDmode, 0);
dest_mem = get_memory_rtx (dest, len);
if (TREE_CODE (val) != INTEGER_CST)
{
+ tree cval;
rtx val_rtx;
! cval = fold_build1 (CONVERT_EXPR, unsigned_char_type_node, val);
! val_rtx = expand_expr (cval, NULL_RTX, VOIDmode, 0);
/* Assume that we can memset by pieces if we can store the
* the coefficients by pieces (in the required modes).
*************** expand_builtin_memset (tree arglist, rtx
*** 3456,3464 ****
store_by_pieces (dest_mem, tree_low_cst (len, 1),
builtin_memset_gen_str, val_rtx, dest_align, 0);
}
! else if (!set_storage_via_setmem(dest_mem, len_rtx, val_rtx,
! dest_align))
! return 0;
dest_mem = force_operand (XEXP (dest_mem, 0), NULL_RTX);
dest_mem = convert_memory_address (ptr_mode, dest_mem);
--- 3464,3472 ----
store_by_pieces (dest_mem, tree_low_cst (len, 1),
builtin_memset_gen_str, val_rtx, dest_align, 0);
}
! else if (!set_storage_via_setmem (dest_mem, len_rtx, val_rtx,
! dest_align))
! goto do_libcall;
dest_mem = force_operand (XEXP (dest_mem, 0), NULL_RTX);
dest_mem = convert_memory_address (ptr_mode, dest_mem);
*************** expand_builtin_memset (tree arglist, rtx
*** 3466,3472 ****
}
if (target_char_cast (val, &c))
! return 0;
if (c)
{
--- 3474,3480 ----
}
if (target_char_cast (val, &c))
! goto do_libcall;
if (c)
{
*************** expand_builtin_memset (tree arglist, rtx
*** 3478,3484 ****
builtin_memset_read_str, &c, dest_align, 0);
else if (!set_storage_via_setmem (dest_mem, len_rtx, GEN_INT (c),
dest_align))
! return 0;
dest_mem = force_operand (XEXP (dest_mem, 0), NULL_RTX);
dest_mem = convert_memory_address (ptr_mode, dest_mem);
--- 3486,3492 ----
builtin_memset_read_str, &c, dest_align, 0);
else if (!set_storage_via_setmem (dest_mem, len_rtx, GEN_INT (c),
dest_align))
! goto do_libcall;
dest_mem = force_operand (XEXP (dest_mem, 0), NULL_RTX);
dest_mem = convert_memory_address (ptr_mode, dest_mem);
*************** expand_builtin_memset (tree arglist, rtx
*** 3497,3502 ****
--- 3505,3523 ----
}
return dest_addr;
+
+ do_libcall:
+ fndecl = get_callee_fndecl (orig_exp);
+ fcode = DECL_FUNCTION_CODE (fndecl);
+ gcc_assert (fcode == BUILT_IN_MEMSET || fcode == BUILT_IN_BZERO);
+ arglist = build_tree_list (NULL_TREE, len);
+ if (fcode == BUILT_IN_MEMSET)
+ arglist = tree_cons (NULL_TREE, val, arglist);
+ arglist = tree_cons (NULL_TREE, dest, arglist);
+ fn = build_function_call_expr (fndecl, arglist);
+ if (TREE_CODE (fn) == CALL_EXPR)
+ CALL_EXPR_TAILCALL (fn) = CALL_EXPR_TAILCALL (orig_exp);
+ return expand_call (fn, target, target == const0_rtx);
}
}
*************** expand_builtin_strcmp (tree exp, rtx tar
*** 3742,3750 ****
/* If both arguments have side effects, we cannot optimize. */
if (!len || TREE_SIDE_EFFECTS (len))
! return 0;
- /* Stabilize the arguments in case gen_cmpstrnsi fails. */
arg3_rtx = expand_expr (len, NULL_RTX, VOIDmode, 0);
/* Make a place to write the result of the instruction. */
--- 3763,3770 ----
/* If both arguments have side effects, we cannot optimize. */
if (!len || TREE_SIDE_EFFECTS (len))
! goto do_libcall;
arg3_rtx = expand_expr (len, NULL_RTX, VOIDmode, 0);
/* Make a place to write the result of the instruction. */
*************** expand_builtin_strcmp (tree exp, rtx tar
*** 3775,3780 ****
--- 3795,3801 ----
/* Expand the library call ourselves using a stabilized argument
list to avoid re-evaluating the function's arguments twice. */
+ do_libcall:
arglist = build_tree_list (NULL_TREE, arg2);
arglist = tree_cons (NULL_TREE, arg1, arglist);
fndecl = get_callee_fndecl (exp);
++++++ pr27134.patch ++++++
2005-04-16 Uros Bizjak
PR middle-end/27134
* builtins.c (expand_builtin_int_roundingfn): Use expand_expr()
to expand fallback builtin function call.
Index: gcc/builtins.c
===================================================================
*** gcc/builtins.c (revision 112983)
--- gcc/builtins.c (revision 112984)
*************** expand_builtin_int_roundingfn (tree exp,
*** 2335,2341 ****
gcc_assert (fallback_fndecl != NULL_TREE);
exp = build_function_call_expr (fallback_fndecl, arglist);
! tmp = expand_builtin_mathfn (exp, NULL_RTX, NULL_RTX);
/* Truncate the result of floating point optab to integer
via expand_fix (). */
--- 2335,2341 ----
gcc_assert (fallback_fndecl != NULL_TREE);
exp = build_function_call_expr (fallback_fndecl, arglist);
! tmp = expand_expr (exp, NULL_RTX, VOIDmode, EXPAND_NORMAL);
/* Truncate the result of floating point optab to integer
via expand_fix (). */
Index: gcc/testsuite/gcc.dg/pr27314.c
===================================================================
*** gcc/testsuite/gcc.dg/pr27314.c (revision 0)
--- gcc/testsuite/gcc.dg/pr27314.c (revision 112984)
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -ffast-math" } */
+
+ extern double floor (double);
+
+ inline int bar (double x)
+ {
+ return (int) floor (x);
+ }
+
+ int foo (int i)
+ {
+ return bar (i);
+ }
++++++ pr27162.patch ++++++
2006-04-14 Douglas Gregor
PR libstdc++/27162
* include/bits/stl_algo.h (__search_n(,,,, _BinaryPredicate,
std::forward_iterator_tag)): Use __binary_pred, not ==.
Index: libstdc++-v3/include/bits/stl_algo.h
===================================================================
*** libstdc++-v3/include/bits/stl_algo.h (revision 112957)
--- libstdc++-v3/include/bits/stl_algo.h (revision 112958)
***************
*** 1,6 ****
// Algorithm implementation -*- C++ -*-
! // Copyright (C) 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
//
// This file is part of the GNU ISO C++ Library. This library is free
// software; you can redistribute it and/or modify it under the
--- 1,7 ----
// Algorithm implementation -*- C++ -*-
! // Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006
! // Free Software Foundation, Inc.
//
// This file is part of the GNU ISO C++ Library. This library is free
// software; you can redistribute it and/or modify it under the
*************** namespace std
*** 748,754 ****
__n = __count;
_ForwardIterator __i = __first;
++__i;
! while (__i != __last && __n != 1 && *__i == __val)
{
++__i;
--__n;
--- 749,755 ----
__n = __count;
_ForwardIterator __i = __first;
++__i;
! while (__i != __last && __n != 1 && __binary_pred(*__i, __val))
{
++__i;
--__n;
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Remember to have fun...