Common subdirectories: ../radeonhd/xf86-video-radeonhd/src/.deps and xf86-video-radeonhd/src/.deps
Common subdirectories: ../radeonhd/xf86-video-radeonhd/src/AtomBios and xf86-video-radeonhd/src/AtomBios
diff -u ../radeonhd/xf86-video-radeonhd/src/r5xx_accel.c xf86-video-radeonhd/src/r5xx_accel.c
--- ../radeonhd/xf86-video-radeonhd/src/r5xx_accel.c	2008-10-13 11:07:53.000000000 -0700
+++ xf86-video-radeonhd/src/r5xx_accel.c	2008-10-27 08:53:01.000000000 -0700
@@ -131,7 +131,7 @@
     for (i = 0; i < R5XX_LOOP_COUNT; i++)
 	/* Radeon code:
 	   & R5XX_RB2D_DC_BUSY */
-	if (!(_RHDRegRead(scrnIndex, R5XX_DSTCACHE_CTLSTAT) & R5XX_DSTCACHE_BUSY))
+	if (!(_RHDRegReadx(scrnIndex, R5XX_DSTCACHE_CTLSTAT) & R5XX_DSTCACHE_BUSY))
 	    return TRUE;
 
     xf86DrvMsg(scrnIndex, X_ERROR, "%s: Timeout 0x%08x.\n", __func__,
diff -u ../radeonhd/xf86-video-radeonhd/src/rhd.h xf86-video-radeonhd/src/rhd.h
--- ../radeonhd/xf86-video-radeonhd/src/rhd.h	2008-10-27 08:26:18.000000000 -0700
+++ xf86-video-radeonhd/src/rhd.h	2008-10-27 09:00:51.000000000 -0700
@@ -343,12 +343,30 @@
 extern void RHDAllIdle(ScrnInfoPtr pScrn);
 extern Bool RHDUseAtom(RHDPtr rhdPtr, enum RHD_CHIPSETS *BlackList, enum atomSubSystem subsys);
 
+
+
+
+#define  _RHDRegReadx( scrnIndex, offset) *(volatile CARD32 *)((CARD8 *) RHDPTR(xf86Screens[scrnIndex])->MMIOBase + offset)
+
 extern CARD32 _RHDRegRead(int scrnIndex, CARD16 offset);
-#define RHDRegRead(ptr, offset) _RHDRegRead((ptr)->scrnIndex, (offset))
+#define RHDRegRead(ptr, offset) _RHDRegReadx((ptr)->scrnIndex, (offset))
+
+#define _RHDRegWritex(scrnIndex, offset, value)  *(volatile CARD32 *)((CARD8 *) RHDPTR(xf86Screens[scrnIndex])->MMIOBase + offset) = value
+
 extern void _RHDRegWrite(int scrnIndex, CARD16 offset, CARD32 value);
-#define RHDRegWrite(ptr, offset, value) _RHDRegWrite((ptr)->scrnIndex, (offset), (value))
+#define RHDRegWrite(ptr, offset, value) _RHDRegWritex((ptr)->scrnIndex, (offset), (value))
+
+#define _RHDRegMaskx(scrnIndex, offset, value, mask) \
+do { \
+  *(volatile CARD32 *)((CARD8 *) RHDPTR(xf86Screens[scrnIndex])->MMIOBase + offset) = \
+  (*(volatile CARD32 *)((CARD8 *) RHDPTR(xf86Screens[scrnIndex])->MMIOBase + offset) & ~mask) | (value & mask) ;\
+} while(0)
+
 extern void _RHDRegMask(int scrnIndex, CARD16 offset, CARD32 value, CARD32 mask);
-#define RHDRegMask(ptr, offset, value, mask) _RHDRegMask((ptr)->scrnIndex, (offset), (value), (mask))
+#define RHDRegMask(ptr, offset, value, mask) _RHDRegMaskx((ptr)->scrnIndex, (offset), (value), (mask))
+
+
+
 extern CARD32 _RHDReadMC(int scrnIndex, CARD32 addr);
 #define RHDReadMC(ptr,addr) _RHDReadMC((ptr)->scrnIndex,(addr))
 extern void _RHDWriteMC(int scrnIndex, CARD32 addr, CARD32 data);
Only in xf86-video-radeonhd/src: rhd.h_keep
diff -u ../radeonhd/xf86-video-radeonhd/src/rhd_driver.c xf86-video-radeonhd/src/rhd_driver.c
--- ../radeonhd/xf86-video-radeonhd/src/rhd_driver.c	2008-10-27 08:26:18.000000000 -0700
+++ xf86-video-radeonhd/src/rhd_driver.c	2008-10-27 08:55:53.000000000 -0700
@@ -2480,11 +2480,11 @@
     CARD32 ret;
 
     if (rhdPtr->ChipSet < RHD_RS600) {
-	_RHDRegWrite(scrnIndex, MC_IND_INDEX, addr);
-	ret = _RHDRegRead(scrnIndex, MC_IND_DATA);
+	_RHDRegWritex(scrnIndex, MC_IND_INDEX, addr);
+	ret = _RHDRegReadx(scrnIndex, MC_IND_DATA);
     } else if (rhdPtr->ChipSet == RHD_RS600) {
-	_RHDRegWrite(scrnIndex, RS60_MC_NB_MC_INDEX, addr);
-	ret = _RHDRegRead(scrnIndex, RS60_MC_NB_MC_DATA);
+	_RHDRegWritex(scrnIndex, RS60_MC_NB_MC_INDEX, addr);
+	ret = _RHDRegReadx(scrnIndex, RS60_MC_NB_MC_DATA);
     } else if (rhdPtr->ChipSet == RHD_RS690 || rhdPtr->ChipSet == RHD_RS740) {
 #ifdef XSERVER_LIBPCIACCESS
 	CARD32 data = addr & ~RS69_MC_IND_WR_EN;
@@ -2519,11 +2519,11 @@
 	     (unsigned int)data);
 
     if (rhdPtr->ChipSet < RHD_RS600) {
-	_RHDRegWrite(scrnIndex, MC_IND_INDEX, addr | MC_IND_WR_EN);
-	_RHDRegWrite(scrnIndex, MC_IND_DATA, data);
+	_RHDRegWritex(scrnIndex, MC_IND_INDEX, addr | MC_IND_WR_EN);
+	_RHDRegWritex(scrnIndex, MC_IND_DATA, data);
     } else if (rhdPtr->ChipSet == RHD_RS600) {
-	_RHDRegWrite(scrnIndex, RS60_MC_NB_MC_INDEX, addr | RS60_NB_MC_IND_WR_EN);
-	_RHDRegWrite(scrnIndex, RS60_MC_NB_MC_DATA, data);
+	_RHDRegWritex(scrnIndex, RS60_MC_NB_MC_INDEX, addr | RS60_NB_MC_IND_WR_EN);
+	_RHDRegWritex(scrnIndex, RS60_MC_NB_MC_DATA, data);
     } else if (rhdPtr->ChipSet == RHD_RS690 || rhdPtr->ChipSet == RHD_RS740) {
 #ifdef XSERVER_LIBPCIACCESS
 	CARD32 tmp = addr | RS69_MC_IND_WR_EN;
@@ -2550,15 +2550,15 @@
 CARD32
 _RHDReadPLL(int scrnIndex, CARD16 offset)
 {
-    _RHDRegWrite(scrnIndex, CLOCK_CNTL_INDEX, (offset & PLL_ADDR));
-    return _RHDRegRead(scrnIndex, CLOCK_CNTL_DATA);
+    _RHDRegWritex(scrnIndex, CLOCK_CNTL_INDEX, (offset & PLL_ADDR));
+    return _RHDRegReadx(scrnIndex, CLOCK_CNTL_DATA);
 }
 
 void
 _RHDWritePLL(int scrnIndex, CARD16 offset, CARD32 data)
 {
-    _RHDRegWrite(scrnIndex, CLOCK_CNTL_INDEX, (offset & PLL_ADDR) | PLL_WR_EN);
-    _RHDRegWrite(scrnIndex, CLOCK_CNTL_DATA, data);
+    _RHDRegWritex(scrnIndex, CLOCK_CNTL_INDEX, (offset & PLL_ADDR) | PLL_WR_EN);
+    _RHDRegWritex(scrnIndex, CLOCK_CNTL_DATA, data);
 }
 
 #ifdef ATOM_BIOS
