The ahci crash happens doing the readl in: > static void ahci_enable_ahci(void __iomem *mmio) > { > int i; > u32 tmp; > > /* turn on AHCI_EN */ > tmp = readl(mmio + HOST_CTL); > if (tmp & HOST_AHCI_EN) > return; > > /* Some controllers need AHCI_EN to be written multiple times. > * Try a few times before giving up. > */ > for (i = 0; i < 5; i++) { > tmp |= HOST_AHCI_EN; > writel(tmp, mmio + HOST_CTL); > tmp = readl(mmio + HOST_CTL); /* flush && sanity check */ > if (tmp & HOST_AHCI_EN) > return; > msleep(10); > } > > WARN_ON(1); > } The ath10k crash happens doing a ioread32 in: > static bool ath10k_pci_is_awake(struct ath10k *ar) > { > struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); > u32 val = ioread32(ar_pci->mem + PCIE_LOCAL_BASE_ADDRESS + > RTC_STATE_ADDRESS); > > return RTC_STATE_V_GET(val) == RTC_STATE_V_ON; > }