Comment # 21 on bug 1187701 from Daniel Wagner

D13.2.37 ESR_EL1, Exception Syndrome Register (EL1)

EC, bits [31:26]

EC == 0b100101
Data Abort taken without a change in Exception level.
Used for MMU faults generated by data accesses, alignment faults other than
those
caused by Stack Pointer misalignment, and synchronous External aborts,
including
synchronous parity or ECC errors. Not used for debug-related exceptions.


IL, bit [25]
0b1
 32-bit instruction trapped. This value is also used when the exception is one
of the
following:
  An SError interrupt.
  [...]

ISS, bits [24:0]

Instruction Specific Syndrome. Architecturally, this field can be defined
independently for each
defined Exception class. However, in practice, some ISS encodings are used for
more than one
Exception class.


ISS encoding for an SError interrupt

EA, bit [9] 
  External abort type
DFSC, bits [5:0] 
  0b000000 Uncategorized error.
  0b010001 Asynchronous SError interrupt. 

I couldn't find a 0b010000 value but I don't expect a lot to figure out.


crash> dis ahci_enable_ahci+32
0xffffb4715d00ae88 <ahci_enable_ahci+32>:       ldr     w19, [x20]