Greetings I'm working on a driver for a PCI card. During the installation, I read the BAR0 and BAR1 registers two different ways and I get two different results for BAR1. pci_resource_start(0) = A pci_read_config_dword(0x10) = A pci_resource_start(1) = B pci_read_config_dword(0x14) = B+8 Any ideas anyone? I've tried this on two systems, same hardware. Kernels 2.6.5-7.155 and 2.6.11.xxx. x86_64 flavo(u)rs. TIA & cheers -- To unsubscribe, email: suse-programming-e-unsubscribe@suse.com For additional commands, email: suse-programming-e-help@suse.com Archives can be found at: http://lists.suse.com/archive/suse-programming-e
Pierre Patino pierre-at-cruzio.com |suse-amd64| wrote:
Greetings
I'm working on a driver for a PCI card. During the installation, I read the BAR0 and BAR1 registers two different ways and I get two different results for BAR1.
pci_resource_start(0) = A pci_read_config_dword(0x10) = A
pci_resource_start(1) = B pci_read_config_dword(0x14) = B+8
Any ideas anyone?
This is not AMD64 specific... Think for a minute about what you are doing. In one case you are getting from the kernel an interpretation of an address, and in the other case you are reading a bit-field that includes an address and a few other bits as well. To cut to the chase, BAR1 contains more then just the base address. Look at your datasheet for a description of the "prefetchable" flag in the BARs. -- Steve Williams "The woods are lovely, dark and deep. steve at .......... But I have promises to keep, http://www........... and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep."
Stephen Williams wrote:
Pierre Patino pierre-at-cruzio.com |suse-amd64| wrote:
Greetings
I'm working on a driver for a PCI card. During the installation, I read the BAR0 and BAR1 registers two different ways and I get two different results for BAR1.
pci_resource_start(0) = A pci_read_config_dword(0x10) = A
pci_resource_start(1) = B pci_read_config_dword(0x14) = B+8
Any ideas anyone?
This is not AMD64 specific...
Think for a minute about what you are doing. In one case you are getting from the kernel an interpretation of an address, and in the other case you are reading a bit-field that includes an address and a few other bits as well.
To cut to the chase, BAR1 contains more then just the base address. Look at your datasheet for a description of the "prefetchable" flag in the BARs.
Thanks for the info. I'm not an expert on the PCI standard and it shows. Now if I could only figure out why hwinfo gives me a different interrupt number that what's in address 0x3c in the configuration space.....
participants (2)
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Pierre Patino -
Stephen Williams