Mailinglist Archive: radeonhd (212 mails)

[Alex Deucher <alexdeucher@xxxxxxxxx>]

On Tue, Aug 4, 2009 at 6:11 AM, Matthias Hopf<mhopf@xxxxxxx> wrote:
> On Aug 03, 09 21:34:54 +0200, Frieder Ferlemann wrote:
> > >     Fix logic bug in sideport memory detection.
> > thanks - better:) A short odyssey following:
> >
> > Sideport memory still was not detected by the check
> >   Present = (RHDReadMC(rhdPtr, RS78_MC_MISC_UMA_CNTL) & 
> > RS78_SIDE_PORT_PRESENT_R) != 0;
> > in line 799 of rhd_mc.c  so I forced: Present = 1;
> >
> > there. I get a little further but then the test rhd_driver.c line 1883
> > bails out with "bogus"
>
> [...]
>
> So the issue is n-fold:
>
> 1) Why is RS78_SIDE_PORT_PRESENT_R not set (can you dump the register
>   value in the log and see what bits are actually set?)
> 2) Why is is the base considered bogus?
> 3) Is sideport memory actually used correctly?
>
> > (II) RADEONHD(0): IGP sideport memory  present.
> > (**) RADEONHD(0): Mapping IGP memory @ 0xc8000000
> > (II) RADEONHD(0): Mapped FB @ 0xd0000000 to 0x7f24a1005000 (size 0x10000000)
>
> You get a different physical (GPU) address on mapped FB than on IGP
> memory - which means that the mapping was unsuccessful.
> I don't know if this code was ever audited much - there seem to be more
> issues that don't work out.

IIRC, I don't think libpciacess will let you map an arbitrary address.

Alex
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