Mailinglist Archive: radeonhd (424 mails)
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Re: [radeonhd] Dynamic clock setting
- From: Alex Deucher <alexdeucher@xxxxxxxxx>
- Date: Wed, 27 May 2009 10:21:14 -0400
- Message-id: <a728f9f90905270721o767278d0n78deeeed11c393d6@xxxxxxxxxxxxxx>
On Tue, May 26, 2009 at 9:32 PM, Yang Zhao <yang@xxxxxxxxxx> wrote:
It's waiting for the engine PLL to lock. It's still a good idea to
wait for the engine to be idle when changing the clock to avoid
possible drawing problems or lockups.
#define R600_CG_SPLL_STATUS 0x60c
# define R600_SPLL_CHG_STATUS (1 << 1)
Alex
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Hi all,
I've been looking through disassembled AtomBIOS code for my RV770, and
noticed that SetEngineClock seems to be doing its own wait-for-value
busy loop on certain undocumented registers. In fact, it appears that,
at least on r7xx, there is no explicit idling requiring before calling
AtomBIOS' SetMemoryClock and SetEngineClock.
It's waiting for the engine PLL to lock. It's still a good idea to
wait for the engine to be idle when changing the clock to avoid
possible drawing problems or lockups.
#define R600_CG_SPLL_STATUS 0x60c
# define R600_SPLL_CHG_STATUS (1 << 1)
Alex
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