Mailinglist Archive: radeonhd (424 mails)

[Arthur Marsh <arthur.marsh@xxxxxxxxxxxxxxxx>]

I compiled the git-master radeonhd code this morning on an AMD64 machine 
(ASUS M3A78 PRO motherboard with on-board Radeon HD 3200) running Debian 
unstable AMD64 with kernel 2.6.30-rc5 with the following xorg.conf:

Section "Device"
        Identifier      "Radeon 3200"
        Driver          "radeonhd"
        Option          "AccelMethod"   "exa"
        Option          "DRI" "on"
EndSection

I'm just curious as to why I'm getting the AIGLX messages:

Screen 0 is not DRI2 capable
Screen 0 is not DRI capable

extracts of Xorg.0.log follow (full log is at 
http://www.users.on.net/~arthur.marsh/Xorg.0.log - note that the monitor 
was not initially plugged in so I restarted kdm after plugging in the 
monitor )

(II) [drm] DRM interface version 1.3
(II) [drm] DRM open master succeeded.
(II) RADEONHD(0): [drm] Using the DRM lock SAREA also for drawables.
(II) RADEONHD(0): [drm] framebuffer handle = 0xd0000000
(II) RADEONHD(0): [drm] added 1 reserved context for kernel
(II) RADEONHD(0): X context handle = 0x1
(II) RADEONHD(0): [drm] installed DRM signal handler
(II) RADEONHD(0): [pci] 16384 kB allocated with handle 0x10855200
(II) RADEONHD(0): [pci] ring handle = 0x1effe000
(II) RADEONHD(0): [pci] Ring mapped at 0x7f014770f000
(II) RADEONHD(0): [pci] Ring contents 0x00000000
(II) RADEONHD(0): [pci] ring read ptr handle = 0x2effe000
(II) RADEONHD(0): [pci] Ring read ptr mapped at 0x7f014770e000
(II) RADEONHD(0): [pci] Ring read ptr contents 0x00000000
(II) RADEONHD(0): [pci] vertex/indirect buffers handle = 0x1efff000
(II) RADEONHD(0): [pci] Vertex/indirect buffers mapped at 0x7f014750e000
(II) RADEONHD(0): [pci] Vertex/indirect buffers contents 0x00000000
(II) RADEONHD(0): [pci] GART texture map handle = 0x1f000000
(II) RADEONHD(0): [pci] GART Texture map mapped at 0x7f014694e000
(II) RADEONHD(0): [drm] register handle = 0x2fff8000
(II) RADEONHD(0): [dri] Visual configs initialized
(II) RADEONHD(0): [DRI] installation complete
(EE) RADEONHD(0): [dri] CP_INIT failed
(EE) RADEONHD(0): RHDDRIFinishScreenInit: RHDDRIKernelInit Failed.
...
(II) AIGLX: Screen 0 is not DRI2 capable
(II) AIGLX: Screen 0 is not DRI capable
(II) AIGLX: Loaded and initialized /usr/lib/dri/swrast_dri.so
(II) GLX: Initialized DRISWRAST GL provider for screen 0
(II) RADEONHD(0): Setting screen physical size to 312 x 234

Arthur.

--
To unsubscribe, e-mail: radeonhd+unsubscribe@xxxxxxxxxxxx
For additional commands, e-mail: radeonhd+help@xxxxxxxxxxxx