On Wed, May 13, 2009 at 3:50 AM, Anders Eriksson
alexdeucher@gmail.com said:
There are several stages in the decode part of the pipeline. idct and mc are the main ones. On r1xx-r5xx (including rs6xx), we do the mc part for the decode using the 3D engine (shaders on r3xx+, special instructions on r1xx-r2xx). R6xx and r7xx chips have a special dedicated UVD block for video decode. We plan to review that block to see if we can release any of it, but no promises. Regardless, you could do mc on r6xx/r7xx using shaders as well. For MPEG1/2 you could implement an XvMC driver and implement mc using shaders.
I recall reading something on this somehwere (phoronix?). it was something along the lines of mc for mpeg2 (ie DVD content) could (is?) easily done in CPUs these days so there's no need to spend the manhours on using HW acceleration for it. Is that so?
Shaders could be used for just about any video format. mpeg 1 and 2 would be easiest to implement since there is already an API to accelerate them (XvMC).
I believe intel does this. The problem is XvMC doesn't support newer formats like H.264 or whatever.
Aha. But, if I understand it currectly, there _is_ tanglible stuff for hd playback (h.264) which the rs690 could help with, which has not yet been implemented? If so, are there plans to implement those parts?
Hopefully eventually. The information is available in the meantime for anyone who's interested. Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org