Mailinglist Archive: radeonhd (427 mails)

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[radeonhd] [PATCH] fix for Bug 20273
  • From: Marvin <marvin24@xxxxxx>
  • Date: Mon, 4 May 2009 09:48:46 +0200
  • Message-id: <200905040948.47140.marvin24@xxxxxx>

Hi,

the attached patch fixes an issue with exa on rs690. A similar patch was
applied to the radeon already, and I can report, that it also fixes the
problem with radeonhd. See http://bugs.freedesktop.org/show_bug.cgi?id=20273
for further information.

Marvin




diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index ef0f810..2ac3994 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1539,7 +1539,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op,
PicturePtr pSrcPicture,
R300_RS_COUNT_HIRES_EN));

/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) |
R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));

OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) |
R300_ALU_CODE_SIZE(0) |
@@ -1558,7 +1558,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op,
PicturePtr pSrcPicture,
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));

- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) |
R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));

OUT_ACCEL_REG(R300_US_CODE_OFFSET, (R300_ALU_CODE_OFFSET(0) |
R300_ALU_CODE_SIZE(0) |
@@ -1753,7 +1753,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op,
PicturePtr pSrcPicture,
R300_RS_COUNT_HIRES_EN));

/* 2 RS instructions: 1 for tex0 (src), 1 for tex1 (mask) */
- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1) |
R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(1));

OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
R500_US_CODE_END_ADDR(2)));
@@ -1765,7 +1765,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op,
PicturePtr pSrcPicture,
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));

- OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) |
R300_TX_OFFSET_RS(6));
+ OUT_ACCEL_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));

OUT_ACCEL_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
R500_US_CODE_END_ADDR(1)));
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 247f7c2..b51e145 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -391,7 +391,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn,
RADEONPortPrivPtr pPriv
((2 << R300_RS_COUNT_IT_COUNT_SHIFT) |
R300_RS_COUNT_HIRES_EN));
/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) |
R300_TX_OFFSET_RS(6));
+ OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));

OUT_VIDEO_REG(R300_US_CODE_OFFSET,
(R300_ALU_CODE_OFFSET(0) |
@@ -457,7 +457,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn,
RADEONPortPrivPtr pPriv
R300_RS_COUNT_HIRES_EN));

/* R300_INST_COUNT_RS - highest RS instruction used */
- OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0) |
R300_TX_OFFSET_RS(6));
+ OUT_VIDEO_REG(R300_RS_INST_COUNT, R300_INST_COUNT_RS(0));

OUT_VIDEO_REG(R500_US_CODE_ADDR, (R500_US_CODE_START_ADDR(0) |
R500_US_CODE_END_ADDR(1)));
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