On Apr 17, 09 16:40:34 -0700, Yang Zhao wrote:
The wait-for-idle code for radeonhd is more fine grained and is not actually exposed in its entirety, so the current RHDSetEngineClock() and RHDSetMemoryClock() do not work reliably outside of init time. This is why DPMS-driven downclocking was not implemented.
What would you need to actually implement this correctly? I'm asking
because we would probably want to increase the frequencies to maximum if
3D is active (unless some special use case is found, like composition
managers).
Also, did you implement voltage regulation functions as well?
Thanks
Matthias
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Matthias Hopf