Mailinglist Archive: radeonhd (307 mails)

[Alex Deucher <alexdeucher@xxxxxxxxx>]

On Mon, Feb 16, 2009 at 9:18 AM, Matthias Hopf <mhopf@xxxxxxx> wrote:
> On Feb 13, 09 13:06:00 -0500, Alex Deucher wrote:
> > On Fri, Feb 13, 2009 at 12:02 PM, Matthias Hopf <mhopf@xxxxxxx> wrote:
> > > On Feb 10, 09 16:38:43 -0800, Alex Deucher wrote:
> > > >     M82: Missed one in the previous commit
> > >
> > > Alex, if you  used the Type 3 packet as in r600_demo
> > > flush_gpu_source_cache(), this should be selected correctly
> > > automatically. And I personally think that this name better describes
> > > what the function actually does.
> > What would be selected automatically?  Whether the you the sync packet
>
> Wether TC or VC cache should be flushed. Currently this is selected
> according to chip type (if it doesn't have a VC, flush TC, though I
> think that we do not use the TC using vertex fetch commands yet).
>
> According to the docs the Type 3 packet is selecting the right cache
> through different firmwares. So this should work out-of-the-box. I'm
> saying should, because probably nobody has ever tested that.

Ah right, I see what you are saying.  I'll give it a try.

Alex
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