Mailinglist Archive: radeonhd (622 mails)

[Egbert Eich <eich@xxxxxxx>]

Matt Kraai writes:
 > On Wed, Oct 03, 2007 at 03:27:49PM +0200, Egbert Eich wrote:
 > > I've pushed a pile of fixes on Thrusday night which have fixed a load
 > > of DDC problems. Unfortunately not all of them.
 > > Do you see any other bits set in the  R5_DC_I2C_STATUS1 register?
 > 
 > Yes.
 > 
 > > (EE) RADEONHD(0): SW_STATUS: 0x2 4988
 > 
 > This appears to be the R5_DC_I2C_NACK bit.  I don't have an external
 > monitor connected and rhd_conntest displays

This is something I have seen, too.
NACK is the status you get when no slave answers, ie. drives the
line in response to an i2c transfer.
I wonder if this has something to do with the i2c duty cycle
not set up right...

Need to investigate...

Cheers,
        Egbert.


 > 
 > > Checking connectors on 0x71C5, 0x106B, 0x0080  (@01:00:00):
 > >   Load Detection: RHD_OUTPUT_DACB
 > >   HotPlug: RHD_HPD_0
 > >   DDC: RHD_DDC_NONE 
 > >   LVDS Info:
 > >         18bits, dual link, LDI Panel found.
 > >         Power Timing: 0xF9F, 0x000, 0x03, 0x19, 0x1F4
 > >         Macro: 0x0C720407, Clock Pattern: 0x0063
 > 
 > Is DDC supposed to work in this case?
 > 

No.
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