Mailinglist Archive: opensuse-factory (297 mails)
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Re: [opensuse-factory] SMP
- From: Robert Love <rml@xxxxxxxxxx>
- Date: Wed, 17 Jan 2007 15:07:06 -0500
- Message-id: <1169064426.3669.39.camel@localhost>
On Wed, 2007-01-17 at 20:50 +0100, Per Jessen wrote:
> I'm not sure what the proper interpretation of the 'ht' flag should be.
> It also reports SSE2 which I didn't think Celerons support?
The HT bit simply means that the processor supports hyper-threading, not
that it physically has multiple virtual cores.
To programmatically see if a chip physically has HT cores, you have to
look at the "physical id" and "core id" fields.
And the Prescott-based Celeron D family, such as yours, supports SSE 2
and 3.
Robert
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> I'm not sure what the proper interpretation of the 'ht' flag should be.
> It also reports SSE2 which I didn't think Celerons support?
The HT bit simply means that the processor supports hyper-threading, not
that it physically has multiple virtual cores.
To programmatically see if a chip physically has HT cores, you have to
look at the "physical id" and "core id" fields.
And the Prescott-based Celeron D family, such as yours, supports SSE 2
and 3.
Robert
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