Hello community,
here is the log from the commit of package gcc43 for openSUSE:Factory checked in at 2012-05-07 22:45:55
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/gcc43 (Old)
and /work/SRC/openSUSE:Factory/.gcc43.new (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "gcc43", Maintainer is "RGuenther@suse.com"
Changes:
--------
--- /work/SRC/openSUSE:Factory/gcc43/gcc43.changes 2011-09-23 01:58:57.000000000 +0200
+++ /work/SRC/openSUSE:Factory/.gcc43.new/gcc43.changes 2012-05-07 22:47:09.000000000 +0200
@@ -1,0 +2,100 @@
+Thu Apr 26 13:07:26 UTC 2012 - rguenther@suse.com
+
+- Update licenses to use SPDX format
+
+-------------------------------------------------------------------
+Thu Nov 10 09:40:59 UTC 2011 - rguenther@suse.com
+
+- Fix altivec comparison builtins. [bnc#729378]
+
+-------------------------------------------------------------------
+Fri Oct 21 16:25:23 CEST 2011 - mls@suse.de
+
+- do not use /usr/src/packages in specfile
+
+-------------------------------------------------------------------
+Tue Oct 11 13:11:33 UTC 2011 - rguenther@suse.com
+
+- Fix ICE compiling LLVM with the patch for bnc#681566.
+
+-------------------------------------------------------------------
+Wed Oct 5 10:31:41 UTC 2011 - rguenther@suse.com
+
+- Revert s390-max-pending-list-length. [bnc#722234]
+
+-------------------------------------------------------------------
+Fri Sep 16 18:19:50 CEST 2011 - matz@suse.de
+
+- Generate better debug info. [bnc #681566]
+
+-------------------------------------------------------------------
+Mon Aug 15 12:25:45 UTC 2011 - rguenther@novell.com
+
+- Add patch for Cell reload issue. [bnc#712118]
+
+-------------------------------------------------------------------
+Thu Jun 30 11:56:52 UTC 2011 - rguenther@novell.com
+
+- Fix ABI for V2DImode parameters and return values for PPC VSX.
+ [bnc#702947]
+- Add patch for PR38591.
+
+-------------------------------------------------------------------
+Wed May 18 09:52:29 UTC 2011 - rguenther@novell.com
+
+- Apply S390 patches from IBM. [bnc#694559] [fate#311845]
+
+-------------------------------------------------------------------
+Fri Apr 15 13:05:07 UTC 2011 - rguenther@novell.com
+
+- Backport Large-TOC support for ppc64. [bnc#687133] [fate#311554]
+
+-------------------------------------------------------------------
+Wed Mar 21 13:19:18 UTC 2011 - rguenther@novell.com
+
+- Fix debug info for typedefs of qualified types. [bnc#675609]
+
+-------------------------------------------------------------------
+Fri Jan 21 11:55:53 UTC 2011 - rguenther@novell.com
+
+- Fix value-numbering with -fpreserve-function-arguments. [bnc#665849]
+- Modify bnc#623386 fix according to what is now upstream.
+
+-------------------------------------------------------------------
+Thu Jan 13 13:36:25 UTC 2011 - rguenther@novell.com
+
+- Add patch for PR47278. [bnc#663013]
+
+-------------------------------------------------------------------
+Fri Sep 3 12:23:59 UTC 2010 - rguenther@novell.com
+
+- Add patch for PR45502. [bnc#636961]
+
+-------------------------------------------------------------------
+Thu Aug 26 11:34:13 UTC 2010 - rguenther@novell.com
+
+- Add patch for SSA name coalescing bug. [bnc#623386]
+
+-------------------------------------------------------------------
+Wed Feb 24 14:21:45 CET 2010 - rguenther@suse.de
+
+- Split libffi43 build to a separate spec file.
+- Add baselibs.conf as a source.
+
+-------------------------------------------------------------------
+Mon Feb 15 16:06:05 CET 2010 - matz@suse.de
+
+- Fix demangling in collect2 error messages for char16/char32.
+ [bnc #579916]
+
+-------------------------------------------------------------------
+Fri Jan 22 11:22:19 CET 2010 - rguenther@suse.de
+
+- Add patch to fix Power7 xssqrtdp instruction. [bnc#572812]
+
+-------------------------------------------------------------------
+Mon Jan 11 14:21:07 CET 2010 - rguenther@suse.de
+
+- Add patches for PR42429 and PR42614.
+
+-------------------------------------------------------------------
New Changes file:
--- /dev/null 2012-05-03 01:24:41.895590051 +0200
+++ /work/SRC/openSUSE:Factory/.gcc43.new/libffi43.changes 2012-05-07 22:47:09.000000000 +0200
@@ -0,0 +1,870 @@
+-------------------------------------------------------------------
+Thu Apr 26 13:07:26 UTC 2012 - rguenther@suse.com
+
+- Update licenses to use SPDX format
+
+-------------------------------------------------------------------
+Thu Nov 10 09:40:59 UTC 2011 - rguenther@suse.com
+
+- Fix altivec comparison builtins. [bnc#729378]
+
+-------------------------------------------------------------------
+Fri Oct 21 16:25:23 CEST 2011 - mls@suse.de
+
+- do not use /usr/src/packages in specfile
+
+-------------------------------------------------------------------
+Tue Oct 11 13:11:33 UTC 2011 - rguenther@suse.com
+
+- Fix ICE compiling LLVM with the patch for bnc#681566.
+
+-------------------------------------------------------------------
+Wed Oct 5 10:31:41 UTC 2011 - rguenther@suse.com
+
+- Revert s390-max-pending-list-length. [bnc#722234]
+
+-------------------------------------------------------------------
+Fri Sep 16 18:19:50 CEST 2011 - matz@suse.de
+
+- Generate better debug info. [bnc #681566]
+
+-------------------------------------------------------------------
+Mon Aug 15 12:25:45 UTC 2011 - rguenther@novell.com
+
+- Add patch for Cell reload issue. [bnc#712118]
+
+-------------------------------------------------------------------
+Thu Jun 30 11:56:52 UTC 2011 - rguenther@novell.com
+
+- Fix ABI for V2DImode parameters and return values for PPC VSX.
+ [bnc#702947]
+- Add patch for PR38591.
+
+-------------------------------------------------------------------
+Wed May 18 09:52:29 UTC 2011 - rguenther@novell.com
+
+- Apply S390 patches from IBM. [bnc#694559] [fate#311845]
+
+-------------------------------------------------------------------
+Fri Apr 15 13:05:07 UTC 2011 - rguenther@novell.com
+
+- Backport Large-TOC support for ppc64. [bnc#687133] [fate#311554]
+
+-------------------------------------------------------------------
+Wed Mar 21 13:19:18 UTC 2011 - rguenther@novell.com
+
+- Fix debug info for typedefs of qualified types. [bnc#675609]
+
+-------------------------------------------------------------------
+Fri Jan 21 11:55:53 UTC 2011 - rguenther@novell.com
+
+- Fix value-numbering with -fpreserve-function-arguments. [bnc#665849]
+- Modify bnc#623386 fix according to what is now upstream.
+
+-------------------------------------------------------------------
+Thu Jan 13 13:36:25 UTC 2011 - rguenther@novell.com
+
+- Add patch for PR47278. [bnc#663013]
+
+-------------------------------------------------------------------
+Fri Sep 3 12:23:59 UTC 2010 - rguenther@novell.com
+
+- Add patch for PR45502. [bnc#636961]
+
+-------------------------------------------------------------------
+Thu Aug 26 11:34:13 UTC 2010 - rguenther@novell.com
+
+- Add patch for SSA name coalescing bug. [bnc#623386]
+
+-------------------------------------------------------------------
+Wed Feb 24 14:21:45 CET 2010 - rguenther@suse.de
+
+- Split libffi43 build to a separate spec file.
+- Add baselibs.conf as a source.
+
+-------------------------------------------------------------------
+Mon Feb 15 16:06:05 CET 2010 - matz@suse.de
+
+- Fix demangling in collect2 error messages for char16/char32.
+ [bnc #579916]
+
+-------------------------------------------------------------------
+Fri Jan 22 11:22:19 CET 2010 - rguenther@suse.de
+
+- Add patch to fix Power7 xssqrtdp instruction. [bnc#572812]
+
+-------------------------------------------------------------------
+Mon Jan 11 14:21:07 CET 2010 - rguenther@suse.de
+
+- Add patches for PR42429 and PR42614.
+
+-------------------------------------------------------------------
+Fri Nov 20 13:53:12 CET 2009 - rguenther@suse.de
+
+- Re-diff patches to apply without fuzz.
+
+-------------------------------------------------------------------
+Thu Nov 19 18:47:05 CET 2009 - rguenther@suse.de
+
+- Enable decimal floating point for s390(x).
+
+-------------------------------------------------------------------
+Mon Oct 19 13:35:39 CEST 2009 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r152973). [bnc#548080]
+
+-------------------------------------------------------------------
+Fri Oct 16 12:37:12 CEST 2009 - rguenther@suse.de
+
+- Drop in Power7 patches for SLE11 SP1 from IBM. [bnc#547299]
+ [fate#307034] [fate#201762]
+
+-------------------------------------------------------------------
+Tue Oct 13 16:38:28 CEST 2009 - rguenther@suse.de
+
+- Drop in S/390 patches for SLE11 SP1 from IBM.
+
+-------------------------------------------------------------------
+Mon Sep 21 11:32:05 CEST 2009 - rguenther@suse.de
+
+- Backport patch for avoiding SPU micrococded instructions. [bnc#434505]
+
+-------------------------------------------------------------------
+Tue Aug 4 14:14:33 CEST 2009 - rguenther@suse.de
+
+- Update to GCC 4.3.4 release. [bnc#504421]
+- Disable -Wl,--as-needed.
+
+-------------------------------------------------------------------
+Mon Aug 3 11:31:45 CEST 2009 - rguenther@suse.de
+
+- Package cpuid.h. [bnc#527433]
+
+-------------------------------------------------------------------
+Tue Jul 14 12:41:23 CEST 2009 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r149624).
+
+-------------------------------------------------------------------
+Wed Jul 1 13:04:12 CEST 2009 - rguenther@suse.de
+
+- Add patch for PR40585. [bnc#516424]
+
+-------------------------------------------------------------------
+Wed Jun 17 22:09:24 CEST 2009 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r148625).
+
+-------------------------------------------------------------------
+Mon May 25 15:50:15 CEST 2009 - rguenther@suse.de
+
+- Add patch for PR32044. [bnc#495844]
+
+-------------------------------------------------------------------
+Wed May 20 12:54:37 CEST 2009 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r147732).
+
+-------------------------------------------------------------------
+Fri May 15 13:39:05 CEST 2009 - rguenther@suse.de
+
+- Split PR27799 patch.
+- Add patch for PR40141.
+- Fix testcase for PR36745.
+
+-------------------------------------------------------------------
+Fri May 8 13:51:19 CEST 2009 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r147281).
+- Disable cross compiler spec file generation.
+
+-------------------------------------------------------------------
+Mon Apr 20 11:45:39 CEST 2009 - rguenther@suse.de
+
+- Add patch for PR39675. [bnc#492696]
+
+-------------------------------------------------------------------
+Sat Apr 18 14:43:57 CEST 2009 - rguenther@suse.de
+
+- Adjust Ada BuildRequires check.
+
+-------------------------------------------------------------------
+Mon Mar 16 10:05:03 CET 2009 - rguenther@suse.de
+
+- Update to gcc-4_3-branch head (r144878).
+- Add patch for PR39175. [bnc#472835]
+
+-------------------------------------------------------------------
++++ 673 more lines (skipped)
++++ between /dev/null
++++ and /work/SRC/openSUSE:Factory/.gcc43.new/libffi43.changes
--- /work/SRC/openSUSE:Factory/gcc43/libgcj43.changes 2011-09-23 01:58:58.000000000 +0200
+++ /work/SRC/openSUSE:Factory/.gcc43.new/libgcj43.changes 2012-05-07 22:47:09.000000000 +0200
@@ -1,0 +2,100 @@
+Thu Apr 26 13:07:26 UTC 2012 - rguenther@suse.com
+
+- Update licenses to use SPDX format
+
+-------------------------------------------------------------------
+Thu Nov 10 09:40:59 UTC 2011 - rguenther@suse.com
+
+- Fix altivec comparison builtins. [bnc#729378]
+
+-------------------------------------------------------------------
+Fri Oct 21 16:25:23 CEST 2011 - mls@suse.de
+
+- do not use /usr/src/packages in specfile
+
+-------------------------------------------------------------------
+Tue Oct 11 13:11:33 UTC 2011 - rguenther@suse.com
+
+- Fix ICE compiling LLVM with the patch for bnc#681566.
+
+-------------------------------------------------------------------
+Wed Oct 5 10:31:41 UTC 2011 - rguenther@suse.com
+
+- Revert s390-max-pending-list-length. [bnc#722234]
+
+-------------------------------------------------------------------
+Fri Sep 16 18:19:50 CEST 2011 - matz@suse.de
+
+- Generate better debug info. [bnc #681566]
+
+-------------------------------------------------------------------
+Mon Aug 15 12:25:45 UTC 2011 - rguenther@novell.com
+
+- Add patch for Cell reload issue. [bnc#712118]
+
+-------------------------------------------------------------------
+Thu Jun 30 11:56:52 UTC 2011 - rguenther@novell.com
+
+- Fix ABI for V2DImode parameters and return values for PPC VSX.
+ [bnc#702947]
+- Add patch for PR38591.
+
+-------------------------------------------------------------------
+Wed May 18 09:52:29 UTC 2011 - rguenther@novell.com
+
+- Apply S390 patches from IBM. [bnc#694559] [fate#311845]
+
+-------------------------------------------------------------------
+Fri Apr 15 13:05:07 UTC 2011 - rguenther@novell.com
+
+- Backport Large-TOC support for ppc64. [bnc#687133] [fate#311554]
+
+-------------------------------------------------------------------
+Wed Mar 21 13:19:18 UTC 2011 - rguenther@novell.com
+
+- Fix debug info for typedefs of qualified types. [bnc#675609]
+
+-------------------------------------------------------------------
+Fri Jan 21 11:55:53 UTC 2011 - rguenther@novell.com
+
+- Fix value-numbering with -fpreserve-function-arguments. [bnc#665849]
+- Modify bnc#623386 fix according to what is now upstream.
+
+-------------------------------------------------------------------
+Thu Jan 13 13:36:25 UTC 2011 - rguenther@novell.com
+
+- Add patch for PR47278. [bnc#663013]
+
+-------------------------------------------------------------------
+Fri Sep 3 12:23:59 UTC 2010 - rguenther@novell.com
+
+- Add patch for PR45502. [bnc#636961]
+
+-------------------------------------------------------------------
+Thu Aug 26 11:34:13 UTC 2010 - rguenther@novell.com
+
+- Add patch for SSA name coalescing bug. [bnc#623386]
+
+-------------------------------------------------------------------
+Wed Feb 24 14:21:45 CET 2010 - rguenther@suse.de
+
+- Split libffi43 build to a separate spec file.
+- Add baselibs.conf as a source.
+
+-------------------------------------------------------------------
+Mon Feb 15 16:06:05 CET 2010 - matz@suse.de
+
+- Fix demangling in collect2 error messages for char16/char32.
+ [bnc #579916]
+
+-------------------------------------------------------------------
+Fri Jan 22 11:22:19 CET 2010 - rguenther@suse.de
+
+- Add patch to fix Power7 xssqrtdp instruction. [bnc#572812]
+
+-------------------------------------------------------------------
+Mon Jan 11 14:21:07 CET 2010 - rguenther@suse.de
+
+- Add patches for PR42429 and PR42614.
+
+-------------------------------------------------------------------
New:
----
gcc-power7-sles-11sp1-bnc729378.patch
gcc-power7-sles-11sp1-nvl572812.patch
gcc43-better-debuginfo-2.diff
gcc43-better-debuginfo.diff
ibm311554-ltoc-cmodel_small.diff
ibm311554-ltoc-r157731:157732
ibm311554-ltoc-r160772:160773
ibm311554-ltoc-r160977:160978
ibm311554-ltoc-r161370:161371
ibm311554-ltoc-r164044:164046
ibm311554-ltoc-r164552:164553
ibm311554-ltoc-r169076:169077
ibm311554-ltoc-r169426:169427
ibm311554-ltoc-r170605:170606
ibm311554-ltoc-r170975:170976
ibm311554-ltoc-r171904:171905
libffi43.changes
libffi43.spec
loop-unroll-adjust
nvl623386.patch
nvl665849.patch
nvl675609.patch
nvl702947-power7-vsx-abi.patch
nvl712118.patch
pr38591.diff
pr42429.diff
pr42614.diff
pr45502.diff
pr47278.diff
prefetch-schedule-barrier
s390-31bit-sibcall-fix
s390-fix-z10prop
s390-fmadd-2mem
s390-improve-loadfpzero
s390-literalpool-cse
s390-literalpool-qrst
s390-memxxx-prefetchs
s390-movqi-memmem
s390-movqi-typo
s390-option-defaults
s390-peel-times-default
s390-remove-copysign
s390-remove-loadfpzero
s390-symref-preferredreload
s390-z10-bypasses
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ gcc43.spec ++++++
++++ 1891 lines (skipped)
++++ between /work/SRC/openSUSE:Factory/gcc43/gcc43.spec
++++ and /work/SRC/openSUSE:Factory/.gcc43.new/gcc43.spec
++++++ libffi43.spec ++++++
++++ 1238 lines (skipped)
++++++ libgcj43.spec ++++++
++++ 902 lines (skipped)
++++ between /work/SRC/openSUSE:Factory/gcc43/libgcj43.spec
++++ and /work/SRC/openSUSE:Factory/.gcc43.new/libgcj43.spec
++++++ change_spec ++++++
--- /var/tmp/diff_new_pack.oLDrBa/_old 2012-05-07 22:47:14.000000000 +0200
+++ /var/tmp/diff_new_pack.oLDrBa/_new 2012-05-07 22:47:14.000000000 +0200
@@ -63,10 +63,33 @@
p
}
}' >> libgcj$base_ver.spec
+ echo '%define building_libffi 1' > libffi$base_ver.spec
+ sed -e '/^# LIBFFI-DELETE-BEGIN/,/^# LIBFFI-DELETE-END/d;s/^Name:[[:space:]]*gcc/Name: libffi/g' \
+ gcc.spec.in \
+ | sed -e 's%@base_ver@%'$base_ver'%g' \
+ | sed -n -e '{
+/^# PACKAGE-BEGIN/h
+/^# PACKAGE-BEGIN/,/^# PACKAGE-END/H
+/^# PACKAGE-BEGIN/,/^# PACKAGE-END/!p
+/^# PACKAGE-END/{g
+s/@variant@//g
+p
+g
+s/@variant@/-32bit/g
+p
+g
+s/@variant@/-64bit/g
+p
+}
+}' \
+ | sed -e '/^%package -n libffi'$base_ver'$/d' \
+ | sed -e 's/-n libffi'$base_ver'$//g' \
+>> libffi$base_ver.spec
- test -f gcc$base_ver.changes && ln -f gcc$base_ver.changes libgcj$base_ver.changes
-
+ test -f gcc$base_ver.changes \
+ && ( ln -f gcc$base_ver.changes libgcj$base_ver.changes; \
+ ln -f gcc$base_ver.changes libffi$base_ver.changes )
# disabled: mips, sparc, alpha, arm
if test "$do_icecream" = 1 ; then
++++++ gcc-power7-sles-11sp1-bnc729378.patch ++++++
2009-09-22 Jakub Jelinek
* config/rs6000/rs6000.c (bdesc_2arg): Fix CODE_FOR_vector_gt* codes
for __builtin_altivec_vcmpgt{sb,uh,sh,uw}.
--- gcc/config/rs6000/rs6000.c.orig 2011-11-09 11:48:26.000000000 -0600
+++ gcc/config/rs6000/rs6000.c 2011-11-09 11:47:31.000000000 -0600
@@ -8776,10 +8776,10 @@ static struct builtin_description bdesc_
{ MASK_ALTIVEC, CODE_FOR_vector_eqv4sf, "__builtin_altivec_vcmpeqfp", ALTIVEC_BUILTIN_VCMPEQFP },
{ MASK_ALTIVEC, CODE_FOR_vector_gev4sf, "__builtin_altivec_vcmpgefp", ALTIVEC_BUILTIN_VCMPGEFP },
{ MASK_ALTIVEC, CODE_FOR_vector_gtuv16qi, "__builtin_altivec_vcmpgtub", ALTIVEC_BUILTIN_VCMPGTUB },
- { MASK_ALTIVEC, CODE_FOR_vector_gtuv8hi, "__builtin_altivec_vcmpgtsb", ALTIVEC_BUILTIN_VCMPGTSB },
- { MASK_ALTIVEC, CODE_FOR_vector_gtuv4si, "__builtin_altivec_vcmpgtuh", ALTIVEC_BUILTIN_VCMPGTUH },
- { MASK_ALTIVEC, CODE_FOR_vector_gtv16qi, "__builtin_altivec_vcmpgtsh", ALTIVEC_BUILTIN_VCMPGTSH },
- { MASK_ALTIVEC, CODE_FOR_vector_gtv8hi, "__builtin_altivec_vcmpgtuw", ALTIVEC_BUILTIN_VCMPGTUW },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtv16qi, "__builtin_altivec_vcmpgtsb", ALTIVEC_BUILTIN_VCMPGTSB },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtuv8hi, "__builtin_altivec_vcmpgtuh", ALTIVEC_BUILTIN_VCMPGTUH },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtv8hi, "__builtin_altivec_vcmpgtsh", ALTIVEC_BUILTIN_VCMPGTSH },
+ { MASK_ALTIVEC, CODE_FOR_vector_gtuv4si, "__builtin_altivec_vcmpgtuw", ALTIVEC_BUILTIN_VCMPGTUW },
{ MASK_ALTIVEC, CODE_FOR_vector_gtv4si, "__builtin_altivec_vcmpgtsw", ALTIVEC_BUILTIN_VCMPGTSW },
{ MASK_ALTIVEC, CODE_FOR_vector_gtv4sf, "__builtin_altivec_vcmpgtfp", ALTIVEC_BUILTIN_VCMPGTFP },
{ MASK_ALTIVEC, CODE_FOR_altivec_vctsxs, "__builtin_altivec_vctsxs", ALTIVEC_BUILTIN_VCTSXS },
++++++ gcc-power7-sles-11sp1-nvl572812.patch ++++++
[gcc]
2010-01-14 Michael Meissner
PR target/42747
* config/rs6000/rs6000.md (sqrtdf2): Split into expander and insn
to allow generation of the xssqrtdp instruction on power7.
(sqrtdf2_fpr): Ditto.
[gcc/testsuite]
2010-01-14 Michael Meissner
* gcc.target/powerpc/pr42747.c: New file.
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 155910)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -6310,7 +6310,14 @@ (define_insn "*fnmsubdf4_fpr_2"
[(set_attr "type" "dmul")
(set_attr "fp_type" "fp_maddsub_d")])
-(define_insn "sqrtdf2"
+(define_expand "sqrtdf2"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "")
+ (sqrt:DF (match_operand:DF 1 "gpc_reg_operand" "")))]
+ "(TARGET_PPC_GPOPT || TARGET_POWER2) && TARGET_HARD_FLOAT && TARGET_FPRS
+ && TARGET_DOUBLE_FLOAT"
+ "")
+
+(define_insn "*sqrtdf2_fpr"
[(set (match_operand:DF 0 "gpc_reg_operand" "=d")
(sqrt:DF (match_operand:DF 1 "gpc_reg_operand" "d")))]
"(TARGET_PPC_GPOPT || TARGET_POWER2) && TARGET_HARD_FLOAT && TARGET_FPRS
Index: gcc/testsuite/gcc.target/powerpc/pr42747.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr42747.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr42747.c (revision 0)
@@ -0,0 +1,8 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-O2 -mcpu=power7 -ffast-math" } */
+
+double foo (double x) { return __builtin_sqrt (x); }
+
+/* { dg-final { scan-assembler "xssqrtdp" } } */
++++++ gcc.spec.in ++++++
--- /var/tmp/diff_new_pack.oLDrBa/_old 2012-05-07 22:47:14.000000000 +0200
+++ /var/tmp/diff_new_pack.oLDrBa/_new 2012-05-07 22:47:14.000000000 +0200
@@ -27,7 +27,7 @@
# on those that work
# Note that AdaCore only supports %ix86, x86_64 and ia64
%ifarch %ix86 x86_64 ppc s390 ia64
-%define build_ada 0%{!?building_libjava:1}
+%define build_ada !0%{?building_libjava:1}%{?building_libffi:1}
%else
# alpha ppc64 s390x hppa
%define build_ada 0
@@ -39,13 +39,13 @@
%define build_libjava 0
%else
%define build_java 1
-%define build_libjava 0%{?building_libjava:1}
+%define build_libjava 0%{?building_libjava:1}%{?building_libffi:1}
%endif
%define build_cp 1
%define build_fortran 1
%define build_objc 1
-%define build_objcp 0%{!?building_libjava:1}
+%define build_objcp !0%{?building_libjava:1}%{?building_libffi:1}
%define build_with_mudflap 0
%if %{build_objcp}
@@ -70,8 +70,10 @@
%endif
%endif
%if %{build_libjava}
+%if 0%{!?building_libffi:1}
BuildRequires: fastjar gtk2-devel libart_lgpl-devel unzip
%endif
+%endif
%ifarch ia64
BuildRequires: libunwind-devel
%endif
@@ -136,7 +138,7 @@
%define binsuffix -4.3
# COMMON-END
-%if 0%{?!building_libjava:1}
+%if !0%{?building_libjava:1}%{?building_libffi:1}
Requires: binutils glibc-devel
Requires: cpp@base_ver@ = %{version}-%{release}
Requires: libgcc%{libgcc_s} >= %{version}-%{release}
@@ -159,6 +161,7 @@
Source3: gcc43-rpmlintrc
Source4: ecj.jar
Source5: README.First-for.SuSE.packagers
+Source6: baselibs.conf
Patch1: gcc-dir-version.patch
Patch2: gcc-sles-version.patch
Patch3: gcc-noalias-warn.diff
@@ -186,8 +189,17 @@
Patch45: nvl423594.patch
Patch46: pr32277.diff
Patch47: gcc43-as-g0
+Patch48: pr38591.diff
Patch202: nvl440482.patch
Patch204: pr39675.diff
+Patch205: pr42429.diff
+Patch206: pr42614.diff
+Patch207: pr45502.diff
+Patch208: pr47278.diff
+Patch209: nvl675609.patch
+Patch210: nvl665849.patch
+Patch211: gcc43-better-debuginfo.diff
+Patch212: gcc43-better-debuginfo-2.diff
# A set of patches from the RH srpm
Patch50: gcc43-c++-builtin-redecl.patch
Patch51: gcc41-ia64-stack-protector.patch
@@ -252,6 +264,8 @@
Patch126: nvl447669.diff
Patch127: nvl464739.patch
Patch128: ibm434505-spu
+Patch1281: nvl712118.patch
+Patch129: nvl623386.patch
# Patches for SAP features
Patch130: sap303956-utf16-1.diff
Patch131: sap303956-utf16-2.diff
@@ -277,11 +291,46 @@
Patch163: gcc-power7-sles-11sp1.patch02d
Patch164: gcc-power7-sles-11sp1.patch02e
Patch165: gcc-power7-sles-11sp1.patch02f
+Patch166: gcc-power7-sles-11sp1-nvl572812.patch
+Patch167: gcc-power7-sles-11sp1-bnc729378.patch
+# Patches for SP2 IBM features
+Patch170: ibm311554-ltoc-r157731:157732
+Patch171: ibm311554-ltoc-r160772:160773
+Patch172: ibm311554-ltoc-r160977:160978
+Patch173: ibm311554-ltoc-r161370:161371
+Patch174: ibm311554-ltoc-r164044:164046
+Patch175: ibm311554-ltoc-r164552:164553
+Patch176: ibm311554-ltoc-r169076:169077
+Patch177: ibm311554-ltoc-r169426:169427
+Patch178: ibm311554-ltoc-r170605:170606
+Patch179: ibm311554-ltoc-r170975:170976
+Patch180: ibm311554-ltoc-r171904:171905
+Patch181: ibm311554-ltoc-cmodel_small.diff
+Patch182: s390-fmadd-2mem
+Patch183: prefetch-schedule-barrier
+Patch184: s390-z10-bypasses
+Patch185: s390-remove-copysign
+Patch187: s390-movqi-memmem
+Patch188: s390-memxxx-prefetchs
+Patch189: s390-option-defaults
+Patch190: loop-unroll-adjust
+Patch191: s390-31bit-sibcall-fix
+Patch192: s390-peel-times-default
+Patch193: s390-movqi-typo
+Patch194: s390-remove-loadfpzero
+Patch195: s390-fix-z10prop
+Patch196: s390-literalpool-qrst
+Patch197: s390-improve-loadfpzero
+Patch198: s390-literalpool-cse
+Patch199: s390-symref-preferredreload
+Patch200: nvl702947-power7-vsx-abi.patch
+
+# LIBFFI-DELETE-BEGIN
# LIBJAVA-DELETE-BEGIN
Group: Development/Languages/C and C++
Summary: The GNU C Compiler and Support Files
-License: GPL v3 or later
+License: GPL-3.0+
%description
Core package for the GNU Compiler Collection, including the C language
@@ -295,7 +344,7 @@
# COMMON-END
%package -n gcc@base_ver@-32bit
-License: GPL v3 or later
+License: GPL-3.0+
Summary: The GNU C Compiler 32bit support
Group: Development/Languages/C and C++
Autoreqprov: on
@@ -312,7 +361,7 @@
This package contains 32bit support for the GNU Compiler Collection.
%package -n gcc@base_ver@-64bit
-License: GPL v3 or later
+License: GPL-3.0+
Summary: The GNU C Compiler 64bit support
Group: Development/Languages/C and C++
Autoreqprov: on
@@ -330,7 +379,7 @@
%package locale
-License: GPL v3 or later
+License: GPL-3.0+
Summary: Locale Data for the GNU Compiler Collection
Group: Development/Languages/C and C++
Requires: gcc@base_ver@ = %{version}-%{release}
@@ -342,7 +391,7 @@
%package c++
-License: GPL v3 or later
+License: GPL-3.0+
Summary: The GNU C++ Compiler
Group: Development/Languages/C and C++
Autoreqprov: on
@@ -354,7 +403,7 @@
# PACKAGE-BEGIN
%package -n libstdc++@base_ver@-devel@variant@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: Include Files and Libraries mandatory for Development
Group: System/Libraries
Autoreqprov: on
@@ -370,7 +419,7 @@
# PACKAGE-END
%package -n libstdc++@base_ver@-doc
-License: GPL v2 or later
+License: GPL-2.0+
Summary: Documentation for the GNU C++ standard library
Group: Development/Languages/C and C++
Autoreqprov: on
@@ -380,7 +429,7 @@
# PACKAGE-BEGIN
%package -n libgcc@base_ver@@variant@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: C compiler runtime library
Group: System/Base
Provides: libgcc@variant@ = %{version}-%{release}
@@ -411,7 +460,7 @@
# PACKAGE-BEGIN
%package -n libgomp@base_ver@@variant@
-License: LGPL v2.1 or later
+License: LGPL-2.1+
Summary: The GNU compiler collection OpenMP runtime library
Group: System/Base
Provides: libgomp@variant@ = %{version}-%{release}
@@ -440,7 +489,7 @@
# PACKAGE-BEGIN
%package -n libstdc++@base_ver@@variant@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: The standard C++ shared library
Group: System/Libraries
Provides: libstdc++@variant@ = %{version}-%{release}
@@ -472,7 +521,7 @@
%package info
-License: GNU Free Documentation License, Version 1.1 (GFDL 1.1)
+License: GFDL-1.1
Summary: Documentation for the GNU compiler collection
Group: Development/Languages/C and C++
Autoreqprov: on
@@ -485,7 +534,7 @@
# PACKAGE-BEGIN
%package objc@variant@
-License: GPL v3 or later
+License: GPL-3.0+
Summary: GNU Objective C Compiler
Group: Development/Languages/Other
Autoreqprov: on
@@ -500,7 +549,7 @@
# PACKAGE-BEGIN
%package -n libobjc@base_ver@@variant@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: Library for the GNU Objective C Compiler
Group: Development/Libraries/Other
Provides: libobjc2@variant@ = %{version}-%{release}
@@ -522,7 +571,7 @@
# PACKAGE-END
%package obj-c++
-License: GPL v3 or later
+License: GPL-3.0+
Summary: GNU Objective C++ Compiler
Group: Development/Languages/Other
Autoreqprov: on
@@ -536,7 +585,7 @@
%package -n cpp@base_ver@
-License: GPL v3 or later
+License: GPL-3.0+
Summary: The GCC Preprocessor
Group: Development/Languages/C and C++
@@ -546,7 +595,7 @@
%package ada
-License: GPL v3 or later
+License: GPL-3.0+
Requires: gcc@base_ver@ = %{version}-%{release}
Requires: libada@base_ver@ = %{version}-%{release}
Summary: GNU Ada95 Compiler Based on GCC (GNAT)
@@ -561,7 +610,7 @@
%package -n libada@base_ver@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: GNU Ada Runtime Libraries
Group: System/Libraries
Autoreqprov: on
@@ -586,7 +635,7 @@
# PACKAGE-BEGIN
%package fortran@variant@
-License: GPL v3 or later
+License: GPL-3.0+
Summary: The GNU Fortran Compiler and Support Files
Group: Development/Languages/Fortran
Autoreqprov: on
@@ -599,7 +648,7 @@
# PACKAGE-BEGIN
%package -n libgfortran@base_ver@@variant@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: The GNU Fortran Compiler Runtime Library
Group: Development/Languages/Fortran
Provides: libgfortran3@variant@ = %{version}-%{release}
@@ -619,7 +668,7 @@
# PACKAGE-BEGIN
%package -n libmudflap@base_ver@@variant@
-License: GPL v2 or later
+License: GPL-2.0+
Summary: The Mudflap Extension Runtime Library
Group: Development/Languages/C and C++
Provides: libmudflap0@variant@ = %{version}-%{release}
@@ -648,7 +697,7 @@
%package -n libgcj@base_ver@
# LIBJAVA-DELETE-END
-License: GPL v2 or later; LGPL v2.1 or later
+License: GPL-2.0+ and LGPL-2.1+
Summary: Java Runtime Library for gcc
Group: System/Libraries
%define gcj_sover 9
@@ -675,7 +724,7 @@
%package -n gcc@base_ver@-java
-License: GPL v3 or later
+License: GPL-3.0+
Summary: The GNU Java Compiler
Group: Development/Languages/Java
Autoreqprov: on
@@ -687,7 +736,7 @@
%package -n libgcj_bc@base_ver@
-License: GPL v2 or later; LGPL v2.1 or later
+License: GPL-2.0+ and LGPL-2.1+
Summary: Fake library for BC-ABI compatibility.
Group: Development/Libraries/Java
Autoreqprov: on
@@ -716,7 +765,7 @@
%package -n libgcj@base_ver@-jar
-License: GPL v2 or later; LGPL v2.1 or later
+License: GPL-2.0+ and LGPL-2.1+
Summary: Java runtime library (jar files).
Group: Development/Libraries/Java
@@ -725,7 +774,7 @@
%package -n libgcj@base_ver@-devel
-License: GPL v2 or later; LGPL v2.1 or later
+License: GPL-2.0+ and LGPL-2.1+
Summary: Include Files and Libraries mandatory for Development.
Group: Development/Libraries/Java
Autoreqprov: on
@@ -747,7 +796,7 @@
%package -n gcc@base_ver@-gij
-License: GPL v3 or later
+License: GPL-3.0+
Summary: Java Bytecode Interpreter for gcc
Group: Development/Libraries/Java
Requires: libgcj%{gcj_sover} >= %{version}-%{release}
@@ -756,10 +805,10 @@
%description -n gcc@base_ver@-gij
This package contains the java bytecode interpreter gij and related tools.
-
+# LIBFFI-DELETE-END
# PACKAGE-BEGIN
%package -n libffi@base_ver@@variant@
-License: BSD 3-Clause
+License: BSD-3-Clause
Summary: Foreign Function Interface library
Group: Development/Languages/C and C++
Autoreqprov: on
@@ -793,7 +842,7 @@
# PACKAGE-END
%package -n gcc@base_ver@-testresults
-License: Public Domain, Freeware
+License: SUSE-Public-Domain
Summary: Testsuite results
Group: Development/Languages/C and C++
@@ -985,8 +1034,17 @@
%patch45
%patch46
%patch47
+%patch48
%patch202
%patch204
+%patch205
+%patch206
+%patch207 -p1
+%patch208
+%patch209
+%patch210
+%patch211
+%patch212
%patch50
%patch51
%patch52
@@ -1046,6 +1104,8 @@
%patch126
%patch127
%patch128
+%patch1281
+%patch129
%patch130
%patch131
%patch132
@@ -1069,6 +1129,38 @@
%patch163 -p1
%patch164 -p1
%patch165 -p1
+%patch166
+%patch167
+%patch170
+%patch171
+%patch172
+%patch173
+%patch174
+%patch175
+%patch176
+%patch177
+%patch178
+%patch179
+%patch180
+%patch181
+%patch182
+%patch183
+%patch184
+%patch185
+%patch187
+%patch188
+%patch189
+%patch190
+%patch191
+%patch192
+%patch193
+%patch194
+%patch195
+%patch196
+%patch197
+%patch198
+%patch199
+%patch200 -p1
%build
# Avoid rebuilding of generated files
@@ -1281,6 +1373,9 @@
# COMMON-END
+%if 0%{?building_libffi:1}
+make all-target-libffi $PARALLEL
+%else
# Only run profiled bootstrap on archs where it works
#%ifarch %ix86 x86_64 ppc ppc64 ia64
#%ifarch %ix86 x86_64 ia64 s390 s390x
@@ -1299,6 +1394,7 @@
mkdir ../testresults
../contrib/test_summary > ../testresults/test_summary.txt
%endif
+%endif
%install
export NO_BRP_CHECK_BYTECODE_VERSION=true
@@ -1306,9 +1402,11 @@
# Work around tail/head -1 changes
export _POSIX2_VERSION=199209
export LIBRARY_PATH=$RPM_BUILD_ROOT%{libsubdir}:$RPM_BUILD_ROOT%{mainlibdirbi}
+%if 0%{?building_libffi:1}
+make -C %{GCCDIST}/libffi install DESTDIR=$RPM_BUILD_ROOT
+%else
%if 0%{?building_libjava:1}
make -C %{GCCDIST}/libjava install DESTDIR=$RPM_BUILD_ROOT
-make -C %{GCCDIST}/libffi install DESTDIR=$RPM_BUILD_ROOT
make -C gcc java.install-man DESTDIR=$RPM_BUILD_ROOT
make -C gcc java.install-common DESTDIR=$RPM_BUILD_ROOT
make -C gcc install-common DESTDIR=$RPM_BUILD_ROOT COMPILERS='jc1$(exeext) jvgenmain$(exeext)'
@@ -1332,6 +1430,7 @@
rm $RPM_BUILD_ROOT%{libsubdir}/jvgenmain
%endif
%endif
+%endif
# Remove some useless .la files
for lib in libobjc libgfortran libgfortranbegin libmudflap libmudflapth \
@@ -1351,6 +1450,7 @@
%endif
%endif
+# LIBFFI-DELETE-BEGIN
# LIBJAVA-DELETE-BEGIN
%if %{build_cp}
# Merge multilib c++config.h to allow omitting the duplicate and
@@ -1470,6 +1570,7 @@
%endif
%endif
# LIBJAVA-DELETE-END
+# LIBFFI-DELETE-END
%if %{build_ada}
mv $RPM_BUILD_ROOT%{libsubdir}/adalib/lib*-*.so $RPM_BUILD_ROOT%{_libdir}
@@ -1484,7 +1585,7 @@
for l in `find $RPM_BUILD_ROOT -name '*.la'`; do
echo "changing $l"
# -e '/^dependency_libs/s|%{libsubdir}/\([^.]*\)\.la |%{_libdir}/\1\.la |g'
- sed -e '/^dependency_libs/s| -L/usr/src/packages/BUILD/[^ ]*||g' \
+ sed -e '/^dependency_libs/s| -L%{_builddir}/[^ ]*||g' \
-e '/^dependency_libs/s| -L/usr/%{GCCDIST}/bin||g' \
-e '/^dependency_libs/s|-lm \(-lm \)*|-lm |' \
-e '/^dependency_libs/s|-L[^ ]* ||g' \
@@ -1505,6 +1606,7 @@
cp `find . -name "*.log" \! -name "config.log" |grep -v 'acats/tests' ` ../testresults/
chmod 644 ../testresults/*
%endif
+# LIBFFI-DELETE-BEGIN
%if %{build_cp}
# Find C++ and Java headers
find $RPM_BUILD_ROOT%{_prefix}/include/c++ \
@@ -1512,6 +1614,7 @@
-o \( -type d -printf "%%%%dir " , \
-printf "%{_prefix}/include/c++/%%P\n" \) > ../c++-headers
%endif
+# LIBFFI-DELETE-END
# Remove files that we do not need to clean up filelist
rm -f $RPM_BUILD_ROOT%{_prefix}/bin/%{GCCDIST}-*
rm -rf $RPM_BUILD_ROOT%{libsubdir}/install-tools
@@ -1535,7 +1638,7 @@
rm -f $RPM_BUILD_ROOT%{_infodir}/dir
rm -f $RPM_BUILD_ROOT%{_prefix}/bin/gccbug%{binsuffix}
-%if !0%{?building_libjava:1}
+%if !0%{?building_libjava:1}%{?building_libffi:1}
# delete compile flag tracking from crt files
crt_list=$RPM_BUILD_ROOT%{versmainlibdir}/crt*.o
%if %{biarch}
@@ -1550,7 +1653,7 @@
done
%endif
-%if %{build_libjava}
+%if 0%{?building_libjava:1}
# gcj -static doesn't work properly anyway, unless using --whole-archive
# let's save the space instead.
find $RPM_BUILD_ROOT -name libgcj.a \
@@ -1565,20 +1668,24 @@
find $RPM_BUILD_ROOT -name libgcj.spec | xargs \
sed -i -e 's/lib: /&%%{static:%%eJava programs cannot be linked statically}/'
+# security files have broken install locations, also they cause conflicts
+# between libgcj versions. Simply delete them here, libgcj will use its
+# defaults in this case (which is what these files contain anyway).
+rm $RPM_BUILD_ROOT%{_libdir}/logging.properties
+rm -r $RPM_BUILD_ROOT%{_libdir}/security
+%endif
+
+%if 0%{?building_libffi:1}
# Move libffi headers, remove empty libffi libtool file
+mkdir -p $RPM_BUILD_ROOT%{_prefix}/include
mv $RPM_BUILD_ROOT%{libsubdir}/include/ffitarget.h $RPM_BUILD_ROOT%{_prefix}/include/
mv $RPM_BUILD_ROOT%{libsubdir}/include/ffi.h $RPM_BUILD_ROOT%{_prefix}/include/
rm -f $RPM_BUILD_ROOT%{mainlibdir}/libffi.la
%if %{biarch}
rm -f $RPM_BUILD_ROOT%{mainlibdirbi}/libffi.la
%endif
-
-# security files have broken install locations, also they cause conflicts
-# between libgcj versions. Simply delete them here, libgcj will use its
-# defaults in this case (which is what these files contain anyway).
-rm $RPM_BUILD_ROOT%{_libdir}/logging.properties
-rm -r $RPM_BUILD_ROOT%{_libdir}/security
%endif
+
%if %{build_java}
%if !%{build_libjava}
rm $RPM_BUILD_ROOT%{_mandir}/man1/jv-convert%{binsuffix}.1
@@ -1603,6 +1710,7 @@
%endif
%endif
+# LIBFFI-DELETE-BEGIN
%if 0%{?building_libjava:1}
# For building libjava only we need to delete other info docs
rm $RPM_BUILD_ROOT%{_infodir}/cp-tools.info*
@@ -2186,7 +2294,12 @@
%doc %{_mandir}/man1/gorbd%{binsuffix}.1.gz
%doc %{_mandir}/man1/gserialver%{binsuffix}.1.gz
%doc %{_mandir}/man1/gtnameserv%{binsuffix}.1.gz
+%endif
+%endif
+# LIBFFI-DELETE-END
+%if %{build_java}
+%if 0%{?building_libffi:1}
%files -n libffi@base_ver@
%defattr(-,root,root)
%mainlib libffi.so.*
++++++ gcc43-better-debuginfo-2.diff ++++++
2008-10-09 Jakub Jelinek
* tree-ssa-live.c (remove_unused_locals): Mark all edge's goto_block
as used.
Index: gcc/tree-ssa-live.c
===================================================================
--- gcc/tree-ssa-live.c.orig 2008-02-19 10:56:00.000000000 +0100
+++ gcc/tree-ssa-live.c 2011-10-11 15:10:37.000000000 +0200
@@ -591,6 +591,8 @@ remove_unused_locals (void)
{
block_stmt_iterator bsi;
tree phi, def;
+ edge_iterator ei;
+ edge e;
/* Walk the statements. */
for (bsi = bsi_start (bb); !bsi_end_p (bsi); bsi_next (&bsi))
@@ -614,6 +616,10 @@ remove_unused_locals (void)
mark_all_vars_used (&arg, NULL);
}
}
+
+ FOR_EACH_EDGE (e, ei, bb->succs)
+ if (e->goto_locus && e->goto_block)
+ TREE_USED (e->goto_block) = true;
}
/* Remove unmarked local vars from unexpanded_var_list. */
++++++ gcc43-better-debuginfo.diff ++++++
++++ 928 lines (skipped)
++++++ ibm311554-ltoc-cmodel_small.diff ++++++
--- gcc/config/rs6000/linux64.h~ 2011-04-11 09:36:34.000000000 -0500
+++ gcc/config/rs6000/linux64.h 2011-04-11 19:37:43.000000000 -0500
@@ -127,7 +127,7 @@ extern enum rs6000_cmodel cmodel;
else \
{ \
if (!rs6000_explicit_options.cmodel) \
- SET_CMODEL (CMODEL_MEDIUM); \
+ SET_CMODEL (CMODEL_SMALL); \
if (cmodel != CMODEL_SMALL) \
{ \
TARGET_NO_FP_IN_TOC = 0; \
++++++ ibm311554-ltoc-r157731:157732 ++++++
2010-03-26 Alan Modra
* config/rs6000/rs6000.md (cmptf_internal2): Correct comparison.
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 157731)
+++ gcc/config/rs6000/rs6000.md (revision 157732)
@@ -12814,7 +12814,7 @@ (define_insn_and_split "*cmptf_internal2
(set (match_dup 10) (minus:DF (match_dup 5) (match_dup 7)))
(set (match_dup 9) (minus:DF (match_dup 6) (match_dup 8)))
(set (match_dup 9) (plus:DF (match_dup 10) (match_dup 9)))
- (set (match_dup 0) (compare:CCFP (match_dup 7) (match_dup 4)))
+ (set (match_dup 0) (compare:CCFP (match_dup 9) (match_dup 4)))
(match_dup 12)]
{
REAL_VALUE_TYPE rv;
++++++ ibm311554-ltoc-r160772:160773 ++++++
++++ 1104 lines (skipped)
++++++ ibm311554-ltoc-r160977:160978 ++++++
2010-06-18 Alan Modra
* config/rs6000/linux64.h (SET_CMODEL): Don't expand to empty.
Index: gcc/config/rs6000/linux64.h
===================================================================
--- gcc/config/rs6000/linux64.h (revision 160977)
+++ gcc/config/rs6000/linux64.h (revision 160978)
@@ -70,7 +70,7 @@ extern enum rs6000_cmodel cmodel;
#define TARGET_CMODEL cmodel
#define SET_CMODEL(opt) cmodel = opt
#else
-#define SET_CMODEL(opt)
+#define SET_CMODEL(opt) do {} while (0)
#endif
#undef PROCESSOR_DEFAULT
++++++ ibm311554-ltoc-r161370:161371 ++++++
2010-06-25 Alan Modra
* doc/invoke.texi: Delete mcmodel=medium from powerpc options.
* config/rs6000/rs6000.h (enum rs6000_cmodel): Delete CMODEL_MEDIUM.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Set
CMODEL_LARGE as default.
* config/rs6000/rs6000.c (rs6000_handle_option): Remove mcmodel=medium.
(offsettable_ok_by_alignment): Delete.
(rs6000_emit_move): Remove mcmodel=medium optimization.
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 161370)
+++ gcc/doc/invoke.texi (revision 161371)
@@ -14987,11 +14987,6 @@ scheduling parameters set by @option{-mt
Generate PowerPC64 code for the small model: The TOC is limited to
64k.
-@item -mcmodel=medium
-@opindex mcmodel=medium
-Generate PowerPC64 code for the medium model: The TOC and other static
-data may be up to a total of 4G in size.
-
@item -mcmodel=large
@opindex mcmodel=large
Generate PowerPC64 code for the large model: The TOC may be up to 4G
Index: gcc/config/rs6000/linux64.h
===================================================================
--- gcc/config/rs6000/linux64.h (revision 161370)
+++ gcc/config/rs6000/linux64.h (revision 161371)
@@ -134,7 +134,7 @@ extern enum rs6000_cmodel cmodel;
else \
{ \
if (!rs6000_explicit_options.cmodel) \
- SET_CMODEL (CMODEL_MEDIUM); \
+ SET_CMODEL (CMODEL_LARGE); \
if (cmodel != CMODEL_SMALL) \
{ \
TARGET_NO_FP_IN_TOC = 0; \
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 161370)
+++ gcc/config/rs6000/rs6000.c (revision 161371)
@@ -3653,8 +3653,6 @@ rs6000_handle_option (size_t code, const
case OPT_mcmodel_:
if (strcmp (arg, "small") == 0)
cmodel = CMODEL_SMALL;
- else if (strcmp (arg, "medium") == 0)
- cmodel = CMODEL_MEDIUM;
else if (strcmp (arg, "large") == 0)
cmodel = CMODEL_LARGE;
else
@@ -6636,36 +6634,6 @@ rs6000_eliminate_indexed_memrefs (rtx op
copy_addr_to_reg (XEXP (operands[1], 0)));
}
-/* Return true if memory accesses to DECL are known to never straddle
- a 32k boundary. */
-
-static bool
-offsettable_ok_by_alignment (tree decl)
-{
- unsigned HOST_WIDE_INT dsize;
-
- /* Presume any compiler generated symbol_ref is suitably aligned. */
- if (!decl)
- return true;
-
- if (TREE_CODE (decl) != VAR_DECL
- && TREE_CODE (decl) != PARM_DECL
- && TREE_CODE (decl) != RESULT_DECL
- && TREE_CODE (decl) != FIELD_DECL)
- return true;
-
- if (!host_integerp (DECL_SIZE_UNIT (decl), 1))
- return false;
-
- dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);
- if (dsize <= 1)
- return true;
- if (dsize > 32768)
- return false;
-
- return DECL_ALIGN_UNIT (decl) >= dsize;
-}
-
/* Emit a move from SOURCE to DEST in mode MODE. */
void
rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
@@ -6979,16 +6947,11 @@ rs6000_emit_move (rtx dest, rtx source,
/* If this is a SYMBOL_REF that refers to a constant pool entry,
and we have put it in the TOC, we just need to make a TOC-relative
reference to it. */
- if ((TARGET_TOC
- && GET_CODE (operands[1]) == SYMBOL_REF
- && constant_pool_expr_p (operands[1])
- && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands[1]),
- get_pool_mode (operands[1])))
- || (TARGET_CMODEL == CMODEL_MEDIUM
- && GET_CODE (operands[1]) == SYMBOL_REF
- && !CONSTANT_POOL_ADDRESS_P (operands[1])
- && SYMBOL_REF_LOCAL_P (operands[1])
- && offsettable_ok_by_alignment (SYMBOL_REF_DECL (operands[1]))))
+ if (TARGET_TOC
+ && GET_CODE (operands[1]) == SYMBOL_REF
+ && constant_pool_expr_p (operands[1])
+ && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands[1]),
+ get_pool_mode (operands[1])))
{
rtx reg = NULL_RTX;
if (TARGET_CMODEL != CMODEL_SMALL)
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h (revision 161370)
+++ gcc/config/rs6000/rs6000.h (revision 161371)
@@ -295,11 +295,9 @@ extern const char *host_detect_local_cpu
/* Code model for 64-bit linux.
small: 16-bit toc offsets.
- medium: 32-bit toc offsets, static data and code within 2G of TOC pointer.
- large: 32-bit toc offsets, no limit on static data and code. */
+ large: 32-bit toc offsets. */
enum rs6000_cmodel {
CMODEL_SMALL,
- CMODEL_MEDIUM,
CMODEL_LARGE
};
++++++ ibm311554-ltoc-r164044:164046 ++++++
2010-09-09 Alan Modra
* doc/invoke.text: Reinstate mcmodel=medium.
* config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Set
CMODEL_MEDIUM as default.
* config/rs6000/rs6000.h (enum rs6000_cmodel): Add CMODEL_MEDIUM.
* config/rs6000/rs6000.c (rs6000_handle_option): Add mcmodel=medium.
(toc_relative_ok, offsettable_ok_by_alignment): New functions.
(rs6000_emit_move): Reinstate mcmodel=medium optimization.
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 164044)
+++ gcc/doc/invoke.texi (revision 164046)
@@ -15213,6 +15213,11 @@ scheduling parameters set by @option{-mt
Generate PowerPC64 code for the small model: The TOC is limited to
64k.
+@item -mcmodel=medium
+@opindex mcmodel=medium
+Generate PowerPC64 code for the medium model: The TOC and other static
+data may be up to a total of 4G in size.
+
@item -mcmodel=large
@opindex mcmodel=large
Generate PowerPC64 code for the large model: The TOC may be up to 4G
Index: gcc/config/rs6000/linux64.h
===================================================================
--- gcc/config/rs6000/linux64.h (revision 164044)
+++ gcc/config/rs6000/linux64.h (revision 164046)
@@ -134,7 +134,7 @@ extern enum rs6000_cmodel cmodel;
else \
{ \
if (!rs6000_explicit_options.cmodel) \
- SET_CMODEL (CMODEL_LARGE); \
+ SET_CMODEL (CMODEL_MEDIUM); \
if (cmodel != CMODEL_SMALL) \
{ \
TARGET_NO_FP_IN_TOC = 0; \
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 164044)
+++ gcc/config/rs6000/rs6000.c (revision 164046)
@@ -4000,6 +4000,8 @@ rs6000_handle_option (size_t code, const
case OPT_mcmodel_:
if (strcmp (arg, "small") == 0)
cmodel = CMODEL_SMALL;
+ else if (strcmp (arg, "medium") == 0)
+ cmodel = CMODEL_MEDIUM;
else if (strcmp (arg, "large") == 0)
cmodel = CMODEL_LARGE;
else
@@ -6992,6 +6994,80 @@ rs6000_eliminate_indexed_memrefs (rtx op
copy_addr_to_reg (XEXP (operands[1], 0)));
}
+/* Return true if OP, a SYMBOL_REF, should be considered local when
+ generating -mcmodel=medium code. */
+
+static bool
+toc_relative_ok (rtx op)
+{
+ tree decl;
+
+ if (!SYMBOL_REF_LOCAL_P (op))
+ return false;
+
+ /* This is a bit hard to explain. When building shared libraries,
+ you are supposed to pass -fpic or -fPIC to the compiler.
+ -fpic/-fPIC not only generate position independent code but also
+ generate code that supports ELF shared library global function
+ or variable overriding. ppc64 is always PIC and at least some of
+ the ELF shared libaray semantics of global variables happen to be
+ supported without -fpic/-fPIC. So people may not be careful
+ about using -fPIC for shared libs.
+ With -mcmodel=medium this situation changes. A shared library
+ built without -fpic/-fPIC requires text relocs for global var
+ access (and would fail to load since glibc ld.so doesn't support
+ the required dynamic relocs). So avoid this potential
+ problem by using -mcmodel=large access for global vars, unless
+ we know we are compiling for an executable. */
+ if (flag_pie)
+ return true;
+
+ decl = SYMBOL_REF_DECL (op);
+ if (!decl || !DECL_P (decl))
+ return true;
+ if (!TREE_PUBLIC (decl))
+ return true;
+ if (DECL_VISIBILITY (decl) != VISIBILITY_DEFAULT)
+ return true;
+
+ /* If we get here we must have a global var. See binds_local_p. */
+ return flag_whole_program;
+}
+
+/* Return true if memory accesses to DECL are known to never straddle
+ a 32k boundary. */
+
+static bool
+offsettable_ok_by_alignment (tree decl)
+{
+ unsigned HOST_WIDE_INT dsize, dalign;
+
+ /* Presume any compiler generated symbol_ref is suitably aligned. */
+ if (!decl)
+ return true;
+
+ if (TREE_CODE (decl) != VAR_DECL
+ && TREE_CODE (decl) != PARM_DECL
+ && TREE_CODE (decl) != RESULT_DECL
+ && TREE_CODE (decl) != FIELD_DECL)
+ return true;
+
+ if (!DECL_SIZE_UNIT (decl))
+ return false;
+
+ if (!host_integerp (DECL_SIZE_UNIT (decl), 1))
+ return false;
+
+ dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);
+ if (dsize <= 1)
+ return true;
+ if (dsize > 32768)
+ return false;
+
+ dalign = DECL_ALIGN_UNIT (decl);
+ return dalign >= dsize;
+}
+
/* Emit a move from SOURCE to DEST in mode MODE. */
void
rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
@@ -7305,11 +7381,16 @@ rs6000_emit_move (rtx dest, rtx source,
/* If this is a SYMBOL_REF that refers to a constant pool entry,
and we have put it in the TOC, we just need to make a TOC-relative
reference to it. */
- if (TARGET_TOC
- && GET_CODE (operands[1]) == SYMBOL_REF
- && constant_pool_expr_p (operands[1])
- && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands[1]),
- get_pool_mode (operands[1])))
+ if ((TARGET_TOC
+ && GET_CODE (operands[1]) == SYMBOL_REF
+ && constant_pool_expr_p (operands[1])
+ && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands[1]),
+ get_pool_mode (operands[1])))
+ || (TARGET_CMODEL == CMODEL_MEDIUM
+ && GET_CODE (operands[1]) == SYMBOL_REF
+ && !CONSTANT_POOL_ADDRESS_P (operands[1])
+ && toc_relative_ok (operands[1])
+ && offsettable_ok_by_alignment (SYMBOL_REF_DECL (operands[1]))))
{
rtx reg = NULL_RTX;
if (TARGET_CMODEL != CMODEL_SMALL)
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h (revision 164044)
+++ gcc/config/rs6000/rs6000.h (revision 164046)
@@ -297,9 +297,11 @@ extern const char *host_detect_local_cpu
/* Code model for 64-bit linux.
small: 16-bit toc offsets.
- large: 32-bit toc offsets. */
+ medium: 32-bit toc offsets, static data and code within 2G of TOC pointer.
+ large: 32-bit toc offsets, no limit on static data and code. */
enum rs6000_cmodel {
CMODEL_SMALL,
+ CMODEL_MEDIUM,
CMODEL_LARGE
};
++++++ ibm311554-ltoc-r164552:164553 ++++++
2010-09-23 Alan Modra
* config/rs6000/rs6000.c (toc_relative_ok): Delete.
(rs6000_emit_move): Use SYMBOL_REF_LOCAL_P instead.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 164552)
+++ gcc/config/rs6000/rs6000.c (revision 164553)
@@ -7032,46 +7032,6 @@ rs6000_eliminate_indexed_memrefs (rtx op
copy_addr_to_reg (XEXP (operands[1], 0)));
}
-/* Return true if OP, a SYMBOL_REF, should be considered local when
- generating -mcmodel=medium code. */
-
-static bool
-toc_relative_ok (rtx op)
-{
- tree decl;
-
- if (!SYMBOL_REF_LOCAL_P (op))
- return false;
-
- /* This is a bit hard to explain. When building shared libraries,
- you are supposed to pass -fpic or -fPIC to the compiler.
- -fpic/-fPIC not only generate position independent code but also
- generate code that supports ELF shared library global function
- or variable overriding. ppc64 is always PIC and at least some of
- the ELF shared libaray semantics of global variables happen to be
- supported without -fpic/-fPIC. So people may not be careful
- about using -fPIC for shared libs.
- With -mcmodel=medium this situation changes. A shared library
- built without -fpic/-fPIC requires text relocs for global var
- access (and would fail to load since glibc ld.so doesn't support
- the required dynamic relocs). So avoid this potential
- problem by using -mcmodel=large access for global vars, unless
- we know we are compiling for an executable. */
- if (flag_pie)
- return true;
-
- decl = SYMBOL_REF_DECL (op);
- if (!decl || !DECL_P (decl))
- return true;
- if (!TREE_PUBLIC (decl))
- return true;
- if (DECL_VISIBILITY (decl) != VISIBILITY_DEFAULT)
- return true;
-
- /* If we get here we must have a global var. See binds_local_p. */
- return flag_whole_program;
-}
-
/* Return true if memory accesses to DECL are known to never straddle
a 32k boundary. */
@@ -7427,7 +7387,7 @@ rs6000_emit_move (rtx dest, rtx source,
|| (TARGET_CMODEL == CMODEL_MEDIUM
&& GET_CODE (operands[1]) == SYMBOL_REF
&& !CONSTANT_POOL_ADDRESS_P (operands[1])
- && toc_relative_ok (operands[1])
+ && SYMBOL_REF_LOCAL_P (operands[1])
&& offsettable_ok_by_alignment (SYMBOL_REF_DECL (operands[1]))))
{
rtx reg = NULL_RTX;
++++++ ibm311554-ltoc-r169076:169077 ++++++
2011-01-21 Alan Modra
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Add
builtin_define __CMODEL_MEDIUM__ and __CMODEL_LARGE__.
Index: gcc/config/rs6000/rs6000-c.c
===================================================================
--- gcc/config/rs6000/rs6000-c.c (revision 169076)
+++ gcc/config/rs6000/rs6000-c.c (revision 169077)
@@ -385,6 +385,20 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfi
builtin_define ("__LONGDOUBLE128");
}
+ switch (TARGET_CMODEL)
+ {
+ /* Deliberately omit __CMODEL_SMALL__ since that was the default
+ before --mcmodel support was added. */
+ case CMODEL_MEDIUM:
+ builtin_define ("__CMODEL_MEDIUM__");
+ break;
+ case CMODEL_LARGE:
+ builtin_define ("__CMODEL_LARGE__");
+ break;
+ default:
+ break;
+ }
+
switch (rs6000_current_abi)
{
case ABI_V4:
++++++ ibm311554-ltoc-r169426:169427 ++++++
2011-01-31 Alan Modra
* config/rs6000/rs6000.c (print_operand): Rearrange addends in
toc relative expressions as we do in print_operand_address.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 169426)
+++ gcc/config/rs6000/rs6000.c (revision 169427)
@@ -16182,7 +16182,18 @@ print_operand (FILE *file, rtx x, int co
output_address (XEXP (x, 0));
}
else
- output_addr_const (file, x);
+ {
+ if (toc_relative_expr_p (x))
+ /* This hack along with a corresponding hack in
+ rs6000_output_addr_const_extra arranges to output addends
+ where the assembler expects to find them. eg.
+ (const (plus (unspec [symbol_ref ("x") tocrel]) 4))
+ without this hack would be output as "x@toc+4". We
+ want "x+4@toc". */
+ output_addr_const (file, tocrel_base);
+ else
+ output_addr_const (file, x);
+ }
return;
case '&':
++++++ ibm311554-ltoc-r170605:170606 ++++++
2011-03-02 Alan Modra
PR target/47935
* config/rs6000/predicates.md (lwa_operand): Check cmodel medium
toc relative addresses for valid offsets.
Index: gcc/config/rs6000/predicates.md
===================================================================
--- gcc/config/rs6000/predicates.md (revision 170605)
+++ gcc/config/rs6000/predicates.md (revision 170606)
@@ -734,20 +734,32 @@ (define_predicate "zero_reg_mem_operand"
(define_predicate "lwa_operand"
(match_code "reg,subreg,mem")
{
- rtx inner = op;
+ rtx inner, addr, offset;
+ inner = op;
if (reload_completed && GET_CODE (inner) == SUBREG)
inner = SUBREG_REG (inner);
- return gpc_reg_operand (inner, mode)
- || (memory_operand (inner, mode)
- && GET_CODE (XEXP (inner, 0)) != PRE_INC
- && GET_CODE (XEXP (inner, 0)) != PRE_DEC
- && (GET_CODE (XEXP (inner, 0)) != PRE_MODIFY
- || legitimate_indexed_address_p (XEXP (XEXP (inner, 0), 1), 0))
- && (GET_CODE (XEXP (inner, 0)) != PLUS
- || GET_CODE (XEXP (XEXP (inner, 0), 1)) != CONST_INT
- || INTVAL (XEXP (XEXP (inner, 0), 1)) % 4 == 0));
+ if (gpc_reg_operand (inner, mode))
+ return true;
+ if (!memory_operand (inner, mode))
+ return false;
+ addr = XEXP (inner, 0);
+ if (GET_CODE (addr) == PRE_INC
+ || GET_CODE (addr) == PRE_DEC
+ || (GET_CODE (addr) == PRE_MODIFY
+ && !legitimate_indexed_address_p (XEXP (addr, 1), 0)))
+ return false;
+ if (GET_CODE (addr) == LO_SUM
+ && GET_CODE (XEXP (addr, 0)) == REG
+ && GET_CODE (XEXP (addr, 1)) == CONST)
+ addr = XEXP (XEXP (addr, 1), 0);
+ if (GET_CODE (addr) != PLUS)
+ return true;
+ offset = XEXP (addr, 1);
+ if (GET_CODE (offset) != CONST_INT)
+ return true;
+ return INTVAL (offset) % 4 == 0;
})
;; Return 1 if the operand, used inside a MEM, is a SYMBOL_REF.
++++++ ibm311554-ltoc-r170975:170976 ++++++
2011-03-15 Alan Modra
PR target/48032
* config/rs6000/rs6000.c (offsettable_ok_by_alignment): Do not
presume symbol_refs without a symbol_ref_decl are suitably
aligned, nor other trees we may see here. Handle anchor symbols.
(legitimate_constant_pool_address_p): Comment. Add mode param.
Check cmodel=medium addresses. Adjust all calls.
(rs6000_emit_move): Don't call offsettable_ok_by_alignment on
creating cmodel=medium optimized access to locals.
* config/rs6000/constraints.md (R): Pass QImode to
legitimate_constant_pool_address_p.
* config/rs6000/predicates.md (input_operand): Pass mode to
legitimate_constant_pool_address_p.
* config/rs6000/rs6000-protos.h (legitimate_constant_pool_address_p):
Update prototype.
Index: gcc/config/rs6000/constraints.md
===================================================================
--- gcc/config/rs6000/constraints.md.orig 2011-04-15 15:22:49.000000000 +0200
+++ gcc/config/rs6000/constraints.md 2011-04-15 15:23:18.000000000 +0200
@@ -166,7 +166,7 @@ usually better to use @samp{m} or @samp{
(define_constraint "R"
"AIX TOC entry"
- (match_test "legitimate_constant_pool_address_p (op, false)"))
+ (match_test "legitimate_constant_pool_address_p (op, QImode, false)"))
;; General constraints
Index: gcc/config/rs6000/predicates.md
===================================================================
--- gcc/config/rs6000/predicates.md.orig 2011-04-15 15:23:14.000000000 +0200
+++ gcc/config/rs6000/predicates.md 2011-04-15 15:23:18.000000000 +0200
@@ -849,7 +849,7 @@
return 1;
/* A SYMBOL_REF referring to the TOC is valid. */
- if (legitimate_constant_pool_address_p (op, false))
+ if (legitimate_constant_pool_address_p (op, mode, false))
return 1;
/* A constant pool expression (relative to the TOC) is valid */
Index: gcc/config/rs6000/rs6000-protos.h
===================================================================
--- gcc/config/rs6000/rs6000-protos.h.orig 2011-04-15 15:22:49.000000000 +0200
+++ gcc/config/rs6000/rs6000-protos.h 2011-04-15 15:23:18.000000000 +0200
@@ -39,7 +39,8 @@ extern int small_data_operand (rtx, enum
extern bool toc_relative_expr_p (rtx);
extern bool invalid_e500_subreg (rtx, enum machine_mode);
extern void validate_condition_mode (enum rtx_code, enum machine_mode);
-extern bool legitimate_constant_pool_address_p (const_rtx, bool);
+extern bool legitimate_constant_pool_address_p (const_rtx, enum machine_mode,
+ bool);
extern bool legitimate_indirect_address_p (rtx, int);
extern bool legitimate_indexed_address_p (rtx, int);
extern bool avoiding_indexed_address_p (enum machine_mode);
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c.orig 2011-04-15 15:23:13.000000000 +0200
+++ gcc/config/rs6000/rs6000.c 2011-04-15 15:23:18.000000000 +0200
@@ -4603,6 +4603,94 @@ virtual_stack_registers_memory_p (rtx op
&& regnum <= LAST_VIRTUAL_REGISTER);
}
+/* Return true if memory accesses to OP are known to never straddle
+ a 32k boundary. */
+
+static bool
+offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT offset,
+ enum machine_mode mode)
+{
+ tree decl, type;
+ unsigned HOST_WIDE_INT dsize, dalign;
+
+ if (GET_CODE (op) != SYMBOL_REF)
+ return false;
+
+ decl = SYMBOL_REF_DECL (op);
+ if (!decl)
+ {
+ if (GET_MODE_SIZE (mode) == 0)
+ return false;
+
+ /* -fsection-anchors loses the original SYMBOL_REF_DECL when
+ replacing memory addresses with an anchor plus offset. We
+ could find the decl by rummaging around in the block->objects
+ VEC for the given offset but that seems like too much work. */
+ dalign = 1;
+ if (SYMBOL_REF_HAS_BLOCK_INFO_P (op)
+ && SYMBOL_REF_ANCHOR_P (op)
+ && SYMBOL_REF_BLOCK (op) != NULL)
+ {
+ struct object_block *block = SYMBOL_REF_BLOCK (op);
+ HOST_WIDE_INT lsb, mask;
+
+ /* Given the alignment of the block.. */
+ dalign = block->alignment;
+ mask = dalign / BITS_PER_UNIT - 1;
+
+ /* ..and the combined offset of the anchor and any offset
+ to this block object.. */
+ offset += SYMBOL_REF_BLOCK_OFFSET (op);
+ lsb = offset & -offset;
+
+ /* ..find how many bits of the alignment we know for the
+ object. */
+ mask &= lsb - 1;
+ dalign = mask + 1;
+ }
+ return dalign >= GET_MODE_SIZE (mode);
+ }
+
+ if (DECL_P (decl))
+ {
+ if (TREE_CODE (decl) == FUNCTION_DECL)
+ return true;
+
+ if (!DECL_SIZE_UNIT (decl))
+ return false;
+
+ if (!host_integerp (DECL_SIZE_UNIT (decl), 1))
+ return false;
+
+ dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);
+ if (dsize > 32768)
+ return false;
+
+ dalign = DECL_ALIGN_UNIT (decl);
+ return dalign >= dsize;
+ }
+
+ type = TREE_TYPE (decl);
+
+ if (TREE_CODE (decl) == STRING_CST)
+ dsize = TREE_STRING_LENGTH (decl);
+ else if (TYPE_SIZE_UNIT (type)
+ && host_integerp (TYPE_SIZE_UNIT (type), 1))
+ dsize = tree_low_cst (TYPE_SIZE_UNIT (type), 1);
+ else
+ return false;
+ if (dsize > 32768)
+ return false;
+
+ dalign = TYPE_ALIGN (type);
+ if (CONSTANT_CLASS_P (decl))
+ dalign = CONSTANT_ALIGNMENT (decl, dalign);
+ else
+ dalign = DATA_ALIGNMENT (decl, dalign);
+ dalign /= BITS_PER_UNIT;
+ return dalign >= dsize;
+}
+
static bool
constant_pool_expr_p (rtx op)
{
@@ -4627,8 +4715,12 @@ toc_relative_expr_p (rtx op)
&& XINT (tocrel_base, 1) == UNSPEC_TOCREL);
}
+/* Return true if X is a constant pool address, and also for cmodel=medium
+ if X is a toc-relative address known to be offsettable within MODE. */
+
bool
-legitimate_constant_pool_address_p (const_rtx x, bool strict)
+legitimate_constant_pool_address_p (const_rtx x, enum machine_mode mode,
+ bool strict)
{
return (TARGET_TOC
&& (GET_CODE (x) == PLUS || GET_CODE (x) == LO_SUM)
@@ -4637,7 +4729,12 @@ legitimate_constant_pool_address_p (cons
|| ((TARGET_MINIMAL_TOC
|| TARGET_CMODEL != CMODEL_SMALL)
&& INT_REG_OK_FOR_BASE_P (XEXP (x, 0), strict)))
- && toc_relative_expr_p (XEXP (x, 1)));
+ && toc_relative_expr_p (XEXP (x, 1))
+ && (TARGET_CMODEL != CMODEL_MEDIUM
+ || constant_pool_expr_p (XVECEXP (tocrel_base, 0, 0))
+ || mode == QImode
+ || offsettable_ok_by_alignment (XVECEXP (tocrel_base, 0, 0),
+ INTVAL (tocrel_offset), mode)));
}
static bool
@@ -4665,7 +4762,7 @@ rs6000_legitimate_offset_address_p (enum
return false;
if (!reg_offset_addressing_ok_p (mode))
return virtual_stack_registers_memory_p (x);
- if (legitimate_constant_pool_address_p (x, strict))
+ if (legitimate_constant_pool_address_p (x, mode, strict))
return true;
if (GET_CODE (XEXP (x, 1)) != CONST_INT)
return false;
@@ -5614,7 +5711,8 @@ rs6000_legitimate_address_p (enum machin
return 1;
if (reg_offset_p && legitimate_small_data_p (mode, x))
return 1;
- if (reg_offset_p && legitimate_constant_pool_address_p (x, reg_ok_strict))
+ if (reg_offset_p
+ && legitimate_constant_pool_address_p (x, mode, reg_ok_strict))
return 1;
/* If not REG_OK_STRICT (before reload) let pass any stack offset. */
if (! reg_ok_strict
@@ -5716,7 +5814,7 @@ rs6000_mode_dependent_address (rtx addr)
case LO_SUM:
/* Anything in the constant pool is sufficiently aligned that
all bytes have the same high part address. */
- return !legitimate_constant_pool_address_p (addr, false);
+ return !legitimate_constant_pool_address_p (addr, QImode, false);
/* Auto-increment cases are now treated generically in recog.c. */
case PRE_MODIFY:
@@ -6063,53 +6161,21 @@ rs6000_eliminate_indexed_memrefs (rtx op
if (GET_CODE (operands[0]) == MEM
&& GET_CODE (XEXP (operands[0], 0)) != REG
- && ! legitimate_constant_pool_address_p (XEXP (operands[0], 0), false))
+ && ! legitimate_constant_pool_address_p (XEXP (operands[0], 0),
+ GET_MODE (operands[0]), false))
operands[0]
= replace_equiv_address (operands[0],
copy_addr_to_reg (XEXP (operands[0], 0)));
if (GET_CODE (operands[1]) == MEM
&& GET_CODE (XEXP (operands[1], 0)) != REG
- && ! legitimate_constant_pool_address_p (XEXP (operands[1], 0), false))
+ && ! legitimate_constant_pool_address_p (XEXP (operands[1], 0),
+ GET_MODE (operands[1]), false))
operands[1]
= replace_equiv_address (operands[1],
copy_addr_to_reg (XEXP (operands[1], 0)));
}
-/* Return true if memory accesses to DECL are known to never straddle
- a 32k boundary. */
-
-static bool
-offsettable_ok_by_alignment (tree decl)
-{
- unsigned HOST_WIDE_INT dsize, dalign;
-
- /* Presume any compiler generated symbol_ref is suitably aligned. */
- if (!decl)
- return true;
-
- if (TREE_CODE (decl) != VAR_DECL
- && TREE_CODE (decl) != PARM_DECL
- && TREE_CODE (decl) != RESULT_DECL
- && TREE_CODE (decl) != FIELD_DECL)
- return true;
-
- if (!DECL_SIZE_UNIT (decl))
- return false;
-
- if (!host_integerp (DECL_SIZE_UNIT (decl), 1))
- return false;
-
- dsize = tree_low_cst (DECL_SIZE_UNIT (decl), 1);
- if (dsize <= 1)
- return true;
- if (dsize > 32768)
- return false;
-
- dalign = DECL_ALIGN_UNIT (decl);
- return dalign >= dsize;
-}
-
/* Emit a move from SOURCE to DEST in mode MODE. */
void
rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
@@ -6457,8 +6523,7 @@ rs6000_emit_move (rtx dest, rtx source,
|| (TARGET_CMODEL == CMODEL_MEDIUM
&& GET_CODE (operands[1]) == SYMBOL_REF
&& !CONSTANT_POOL_ADDRESS_P (operands[1])
- && SYMBOL_REF_LOCAL_P (operands[1])
- && offsettable_ok_by_alignment (SYMBOL_REF_DECL (operands[1]))))
+ && SYMBOL_REF_LOCAL_P (operands[1])))
{
rtx reg = NULL_RTX;
if (TARGET_CMODEL != CMODEL_SMALL)
@@ -6480,7 +6545,8 @@ rs6000_emit_move (rtx dest, rtx source,
|| (GET_CODE (operands[0]) == REG
&& FP_REGNO_P (REGNO (operands[0]))))
&& GET_CODE (operands[1]) != HIGH
- && ! legitimate_constant_pool_address_p (operands[1], false)
+ && ! legitimate_constant_pool_address_p (operands[1], mode,
+ false)
&& ! toc_relative_expr_p (operands[1])
&& (TARGET_CMODEL == CMODEL_SMALL
|| can_create_pseudo_p ()
@@ -14845,7 +14911,7 @@ print_operand_address (FILE *file, rtx x
fprintf (file, ")(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
}
#endif
- else if (legitimate_constant_pool_address_p (x, true))
+ else if (legitimate_constant_pool_address_p (x, QImode, true))
{
/* This hack along with a corresponding hack in
rs6000_output_addr_const_extra arranges to output addends
++++++ ibm311554-ltoc-r171904:171905 ++++++
2011-04-03 Alan Modra
* dwarf2out.c (mem_loc_descriptor): Recurse on LO_SUM.
Index: gcc/dwarf2out.c
===================================================================
--- gcc/dwarf2out.c (revision 171904)
+++ gcc/dwarf2out.c (revision 171905)
@@ -13706,9 +13706,7 @@ mem_loc_descriptor (rtx rtl, enum machin
break;
case LO_SUM:
- rtl = XEXP (rtl, 1);
-
- /* ... fall through ... */
+ return mem_loc_descriptor (XEXP (rtl, 1), mode, initialized);
case LABEL_REF:
/* Some ports can transform a symbol ref into a label ref, because
++++++ loop-unroll-adjust ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** along with GCC; see the file COPYING3.
*** 53,58 ****
--- 53,59 ----
#include "tree-gimple.h"
#include "df.h"
#include "params.h"
+ #include "cfgloop.h"
/* Define the specific costs for a given cpu. */
*************** s390_reorg (void)
*** 10030,10035 ****
--- 10031,10092 ----
}
+ /* This function checks the whole of insn X for memory references. The
+ function always returns zero because the framework it is called
+ from would stop recursively analyzing the insn upon a return value
+ other than zero. The real result of this function is updating
+ counter variable MEM_COUNT. */
+ static int
+ check_dpu (rtx *x, unsigned *mem_count)
+ {
+ if (*x != NULL_RTX && MEM_P (*x))
+ (*mem_count)++;
+ return 0;
+ }
+
+ /* This target hook implementation for TARGET_LOOP_UNROLL_ADJUST calculates
+ a new number struct loop *loop should be unrolled if tuned for the z10
+ cpu. The loop is analyzed for memory accesses by calling check_dpu for
+ each rtx of the loop. Depending on the loop_depth and the amount of
+ memory accesses a new number <=nunroll is returned to improve the
+ behaviour of the hardware prefetch unit. */
+ static unsigned
+ s390_loop_unroll_adjust (unsigned nunroll, struct loop *loop)
+ {
+ basic_block *bbs;
+ rtx insn;
+ unsigned i;
+ unsigned mem_count = 0;
+
+ /* Only z10 needs special handling. */
+ if (s390_tune != PROCESSOR_2097_Z10)
+ return nunroll;
+
+ /* Count the number of memory references within the loop body. */
+ bbs = get_loop_body (loop);
+ for (i = 0; i < loop->num_nodes; i++)
+ {
+ for (insn = BB_HEAD (bbs[i]); insn != BB_END (bbs[i]); insn = NEXT_INSN (insn))
+ if (INSN_P (insn) && INSN_CODE (insn) != -1)
+ for_each_rtx (&insn, (rtx_function) check_dpu, &mem_count);
+ }
+ free (bbs);
+
+ /* Prevent division by zero, and we do not need to adjust nunroll in this case. */
+ if (mem_count == 0)
+ return nunroll;
+
+ switch (loop_depth(loop))
+ {
+ case 1:
+ return MIN (nunroll, 28 / mem_count);
+ case 2:
+ return MIN (nunroll, 22 / mem_count);
+ default:
+ return MIN (nunroll, 16 / mem_count);
+ }
+ }
+
/* Initialize GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
*************** s390_reorg (void)
*** 10144,10149 ****
--- 10201,10209 ----
#undef TARGET_LIBGCC_SHIFT_COUNT_MODE
#define TARGET_LIBGCC_SHIFT_COUNT_MODE s390_libgcc_shift_count_mode
+ #undef TARGET_LOOP_UNROLL_ADJUST
+ #define TARGET_LOOP_UNROLL_ADJUST s390_loop_unroll_adjust
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-s390.h"
Index: gcc/doc/tm.texi
===================================================================
*** gcc/doc/tm.texi.orig
--- gcc/doc/tm.texi
*************** to have to make special provisions in @c
*** 10296,10301 ****
--- 10296,10310 ----
to reserve space for caller-saved target registers.
@end deftypefn
+ @deftypefn {Target Hook} unsigned TARGET_LOOP_UNROLL_ADJUST (unsigned @var{nunroll}, struct loop *@var{loop})
+ This target hook returns a new value for the number of times @var{loop}
+ should be unrolled. The parameter @var{nunroll} is the number of times
+ the loop is to be unrolled. The parameter @var{loop} is a pointer to
+ the loop, which is going to be checked for unrolling. This target hook
+ is required only when the target has special constraints like maximum
+ number of memory accesses.
+ @end deftypefn
+
@defmac POWI_MAX_MULTS
If defined, this macro is interpreted as a signed integer C expression
that specifies the maximum number of floating point multiplications
Index: gcc/loop-unroll.c
===================================================================
*** gcc/loop-unroll.c.orig
--- gcc/loop-unroll.c
*************** along with GCC; see the file COPYING3.
*** 32,37 ****
--- 32,38 ----
#include "expr.h"
#include "hashtab.h"
#include "recog.h"
+ #include "target.h"
/* This pass performs loop unrolling and peeling. We only perform these
optimizations on innermost loops (with single exception) because
*************** decide_unroll_runtime_iterations (struct
*** 818,823 ****
--- 819,827 ----
if (nunroll > (unsigned) PARAM_VALUE (PARAM_MAX_UNROLL_TIMES))
nunroll = PARAM_VALUE (PARAM_MAX_UNROLL_TIMES);
+ if (targetm.loop_unroll_adjust)
+ nunroll = targetm.loop_unroll_adjust (nunroll, loop);
+
/* Skip big loops. */
if (nunroll <= 1)
{
*************** decide_unroll_stupid (struct loop *loop,
*** 1358,1363 ****
--- 1362,1370 ----
if (nunroll > (unsigned) PARAM_VALUE (PARAM_MAX_UNROLL_TIMES))
nunroll = PARAM_VALUE (PARAM_MAX_UNROLL_TIMES);
+ if (targetm.loop_unroll_adjust)
+ nunroll = targetm.loop_unroll_adjust (nunroll, loop);
+
/* Skip big loops. */
if (nunroll <= 1)
{
Index: gcc/target-def.h
===================================================================
*** gcc/target-def.h.orig
--- gcc/target-def.h
***************
*** 464,469 ****
--- 464,470 ----
#define TARGET_CANNOT_MODIFY_JUMPS_P hook_bool_void_false
#define TARGET_BRANCH_TARGET_REGISTER_CLASS hook_int_void_no_regs
#define TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED hook_bool_bool_false
+ #define TARGET_LOOP_UNROLL_ADJUST NULL
#define TARGET_CANNOT_FORCE_CONST_MEM hook_bool_rtx_false
#define TARGET_CANNOT_COPY_INSN_P NULL
#define TARGET_COMMUTATIVE_P hook_bool_const_rtx_commutative_p
***************
*** 734,739 ****
--- 735,741 ----
TARGET_CANNOT_MODIFY_JUMPS_P, \
TARGET_BRANCH_TARGET_REGISTER_CLASS, \
TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED, \
+ TARGET_LOOP_UNROLL_ADJUST, \
TARGET_CANNOT_FORCE_CONST_MEM, \
TARGET_CANNOT_COPY_INSN_P, \
TARGET_COMMUTATIVE_P, \
Index: gcc/target.h
===================================================================
*** gcc/target.h.orig
--- gcc/target.h
*************** struct _dep;
*** 91,96 ****
--- 91,99 ----
/* This is defined in ddg.h . */
struct ddg;
+ /* This is defined in cfgloop.h . */
+ struct loop;
+
struct gcc_target
{
/* Functions that output assembler for the target. */
*************** struct gcc_target
*** 560,565 ****
--- 563,571 ----
already been generated. */
bool (* branch_target_register_callee_saved) (bool after_pe_gen);
+ /* Return a new value for loop unroll size. */
+ unsigned (* loop_unroll_adjust) (unsigned nunroll, struct loop *loop);
+
/* True if the constant X cannot be placed in the constant pool. */
bool (* cannot_force_const_mem) (rtx);
++++++ nvl623386.patch ++++++
2010-08-26 Richard Guenther
* tree-ssa-copyrename.c (copy_rename_partition_coalesce): Do not
coalesce different types.
* g++.dg/torture/20100825.C: New testcase.
Index: gcc/tree-ssa-copyrename.c
===================================================================
--- gcc/tree-ssa-copyrename.c.orig 2011-01-21 12:26:07.000000000 +0100
+++ gcc/tree-ssa-copyrename.c 2011-01-21 12:27:22.000000000 +0100
@@ -239,7 +239,12 @@ copy_rename_partition_coalesce (var_map
}
/* Don't coalesce if the two variables aren't type compatible. */
- if (!types_compatible_p (TREE_TYPE (root1), TREE_TYPE (root2)))
+ if (!types_compatible_p (TREE_TYPE (root1), TREE_TYPE (root2))
+ /* There is a disconnect between the middle-end type-system and
+ VRP, avoid coalescing enum types with different bounds. */
+ || ((TREE_CODE (TREE_TYPE (root1)) == ENUMERAL_TYPE
+ || TREE_CODE (TREE_TYPE (root2)) == ENUMERAL_TYPE)
+ && TREE_TYPE (root1) != TREE_TYPE (root2)))
{
if (debug)
fprintf (debug, " : Incompatible types. No coalesce.\n");
Index: gcc/testsuite/g++.dg/torture/20100825.C
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc/testsuite/g++.dg/torture/20100825.C 2011-01-21 12:26:26.000000000 +0100
@@ -0,0 +1,15 @@
+// { dg-do run }
+
+typedef enum { zero = 0, one = 1, two = 2, ENUM_MAX = 3 } my_enum;
+my_enum e;
+extern "C" void abort (void);
+int __attribute__((noinline)) foo() { return 10; }
+int main()
+{
+ int r;
+ r = foo();
+ if ((r < 0) || (r >= ENUM_MAX))
+ return 0;
+ e = (my_enum)r;
+ abort ();
+}
++++++ nvl665849.patch ++++++
2011-01-21 Richard Guenther
* tree-ssa-sccvn.c (visit_copy): Make abnormal SSA names varying.
* gcc.dg/torture/bnc665849.c: New testcase.
--- gcc/tree-ssa-sccvn.c.orig 2011-01-21 12:51:31.000000000 +0100
+++ gcc/tree-ssa-sccvn.c 2011-01-21 12:52:01.000000000 +0100
@@ -1134,6 +1134,8 @@
static bool
visit_copy (tree lhs, tree rhs)
{
+ if (SSA_NAME_OCCURS_IN_ABNORMAL_PHI (lhs))
+ return set_ssa_val_to (lhs, lhs);
/* Follow chains of copies to their destination. */
while (SSA_VAL (rhs) != rhs && TREE_CODE (SSA_VAL (rhs)) == SSA_NAME)
--- /dev/null 2009-04-14 12:16:40.000000000 +0200
+++ gcc/testsuite/gcc.dg/torture/bnc665849.c 2011-01-21 12:53:15.000000000 +0100
@@ -0,0 +1,63 @@
+/* { dg-do compile } */
+/* { dg-options "-fpreserve-function-arguments" } */
+
+typedef unsigned int __u32;
+typedef unsigned long u_long;
+typedef unsigned int uint;
+typedef unsigned char __uint8_t;
+typedef unsigned short int __uint16_t;
+typedef unsigned int __uint32_t;
+typedef unsigned long long int __uint64_t;
+typedef __u32 xfs_dev_t;
+typedef __uint32_t xfs_agblock_t;
+typedef __uint32_t xfs_extlen_t;
+typedef struct bhv_desc {
+} bhv_desc_t;
+typedef struct bhv_vfs {
+} cred_t;
+typedef struct bhv_vattr {
+ u_long va_blocksize;
+ xfs_dev_t va_rdev;
+} bhv_vattr_t;
+typedef struct xfs_bufhash {
+ xfs_agblock_t sb_rextsize;
+ __uint8_t sb_blocklog;
+} xfs_sb_t;
+typedef struct xfs_mount {
+ xfs_sb_t m_sb;
+ uint m_writeio_log;
+ __uint64_t m_flags;
+ int m_swidth;
+} xfs_mount_t;
+unsigned long xfs_preferred_iosize(xfs_mount_t *mp)
+{
+ return mp->m_swidth << mp->m_sb.sb_blocklog;
+}
+typedef struct xfs_bmbt_rec_64 {
+ __uint16_t di_mode;
+ xfs_extlen_t di_extsize;
+ __uint16_t di_flags;
+} xfs_dinode_core_t;
+typedef struct dm_attrs_s {
+ struct xfs_mount *i_mount;
+ struct bhv_desc i_bhv_desc;
+ xfs_dinode_core_t i_d;
+} xfs_inode_t;
+xfs_extlen_t xfs_get_extsz_hint (xfs_inode_t *ip)
+{
+ xfs_extlen_t extsz = 0;
+ if (__builtin_expect(!!(ip->i_d.di_flags & (1 << 0)), 0))
+ extsz = ip->i_mount->m_sb.sb_rextsize;
+ return extsz;
+}
+void xfs_getattr( bhv_desc_t *bdp, bhv_vattr_t *vap)
+{
+ xfs_inode_t *ip;
+ xfs_mount_t *mp;
+ ip = (xfs_inode_t *)((char *)(bdp)-(char *)&(((xfs_inode_t *)0)->i_bhv_desc));
+ mp = ip->i_mount;
+ if (!(ip->i_d.di_flags & (1 << 0)))
+ vap->va_blocksize = xfs_preferred_iosize(mp);
+ else
+ vap->va_blocksize = xfs_get_extsz_hint(ip) << mp->m_sb.sb_blocklog;
+}
++++++ nvl675609.patch ++++++
2011-03-21 Richard Guenther
PR c/47939
* c-decl.c (grokdeclarator): Drop to the main variant only
for array types. Drop flag_gen_aux_info check.
* gcc.dg/debug/dwarf2/pr47939-1.c: New testcase.
* gcc.dg/debug/dwarf2/pr47939-2.c: Likewise.
* gcc.dg/debug/dwarf2/pr47939-3.c: Likewise.
* gcc.dg/debug/dwarf2/pr47939-4.c: Likewise.
Index: gcc/c-decl.c
===================================================================
*** gcc/c-decl.c.orig 2009-06-24 16:47:00.000000000 +0200
--- gcc/c-decl.c 2011-03-21 16:42:27.000000000 +0100
*************** grokdeclarator (const struct c_declarato
*** 3998,4003 ****
--- 3998,4004 ----
bool bitfield = width != NULL;
tree element_type;
struct c_arg_info *arg_info = 0;
+ enum c_declarator_kind first_non_attr_kind;
if (decl_context == FUNCDEF)
funcdef_flag = true, decl_context = NORMAL;
*************** grokdeclarator (const struct c_declarato
*** 4008,4013 ****
--- 4009,4015 ----
const struct c_declarator *decl = declarator;
name = 0;
+ first_non_attr_kind = cdk_attrs;
while (decl)
switch (decl->kind)
{
*************** grokdeclarator (const struct c_declarato
*** 4016,4021 ****
--- 4018,4025 ----
case cdk_pointer:
funcdef_syntax = (decl->kind == cdk_function);
decl = decl->declarator;
+ if (first_non_attr_kind == cdk_attrs)
+ first_non_attr_kind = decl->kind;
break;
case cdk_attrs:
*************** grokdeclarator (const struct c_declarato
*** 4025,4030 ****
--- 4029,4036 ----
case cdk_id:
if (decl->u.id)
name = IDENTIFIER_POINTER (decl->u.id);
+ if (first_non_attr_kind == cdk_attrs)
+ first_non_attr_kind = decl->kind;
decl = 0;
break;
*************** grokdeclarator (const struct c_declarato
*** 4107,4113 ****
if (volatilep > 1)
pedwarn ("duplicate %");
}
! if (!flag_gen_aux_info && (TYPE_QUALS (element_type)))
type = TYPE_MAIN_VARIANT (type);
type_quals = ((constp ? TYPE_QUAL_CONST : 0)
| (restrictp ? TYPE_QUAL_RESTRICT : 0)
--- 4113,4121 ----
if (volatilep > 1)
pedwarn ("duplicate %");
}
! if ((TREE_CODE (type) == ARRAY_TYPE
! || first_non_attr_kind == cdk_array)
! && TYPE_QUALS (element_type))
type = TYPE_MAIN_VARIANT (type);
type_quals = ((constp ? TYPE_QUAL_CONST : 0)
| (restrictp ? TYPE_QUAL_RESTRICT : 0)
Index: gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-1.c
===================================================================
*** /dev/null 1970-01-01 00:00:00.000000000 +0000
--- gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-1.c 2011-03-21 16:41:08.000000000 +0100
***************
*** 0 ****
--- 1,8 ----
+ /* { dg-do compile } */
+ /* { dg-options "-save-temps -g -dA" } */
+
+ typedef struct _Harry { int dummy; } Harry_t;
+ Harry_t harry;
+
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_name: \"Harry_t\"" } } */
+ /* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-2.c
===================================================================
*** /dev/null 1970-01-01 00:00:00.000000000 +0000
--- gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-2.c 2011-03-21 16:41:08.000000000 +0100
***************
*** 0 ****
--- 1,8 ----
+ /* { dg-do compile } */
+ /* { dg-options "-save-temps -g -dA" } */
+
+ typedef const struct _Harry { int dummy; } Harry_t;
+ Harry_t harry;
+
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_name: \"Harry_t\"" } } */
+ /* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-3.c
===================================================================
*** /dev/null 1970-01-01 00:00:00.000000000 +0000
--- gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-3.c 2011-03-21 16:41:08.000000000 +0100
***************
*** 0 ****
--- 1,8 ----
+ /* { dg-do compile } */
+ /* { dg-options "-save-temps -g -dA" } */
+
+ typedef struct _Harry { int dummy; } Harry_t;
+ const Harry_t harry[5];
+
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_name: \"Harry_t\"" } } */
+ /* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-4.c
===================================================================
*** /dev/null 1970-01-01 00:00:00.000000000 +0000
--- gcc/testsuite/gcc.dg/debug/dwarf2/pr47939-4.c 2011-03-21 16:41:08.000000000 +0100
***************
*** 0 ****
--- 1,8 ----
+ /* { dg-do compile } */
+ /* { dg-options "-save-temps -g -dA" } */
+
+ typedef const struct _Harry { int dummy; } Harry_t;
+ Harry_t harry[10];
+
+ /* { dg-final { scan-assembler "DW_TAG_typedef\[^\\r\\n\]*\[\\r\\n\]+\[^\\r\\n\]*DW_AT_name: \"Harry_t\"" } } */
+ /* { dg-final { cleanup-saved-temps } } */
++++++ nvl702947-power7-vsx-abi.patch ++++++
++++ 740 lines (skipped)
++++++ nvl712118.patch ++++++
2010-01-09 Jakub Jelinek
* config/rs6000/rs6000.c (rs6000_emit_set_long_const): Shorten
sequence for DImode constants >= 0x80000000UL <= 0xFFFFFFFFUL by
1 insn.
(num_insns_constant_wide): Adjust for that change.
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 155769)
+++ gcc/config/rs6000/rs6000.c (revision 155770)
@@ -3794,6 +3794,8 @@ num_insns_constant_wide (HOST_WIDE_INT v
if (low == 0)
return num_insns_constant_wide (high) + 1;
+ else if (high == 0)
+ return num_insns_constant_wide (low) + 1;
else
return (num_insns_constant_wide (high)
+ num_insns_constant_wide (low) + 1);
@@ -6143,6 +6145,20 @@ rs6000_emit_set_long_const (rtx dest, HO
gen_rtx_IOR (DImode, copy_rtx (dest),
GEN_INT (ud1)));
}
+ else if (ud3 == 0 && ud4 == 0)
+ {
+ gcc_assert (ud2 & 0x8000);
+ emit_move_insn (dest, GEN_INT (((ud2 << 16) ^ 0x80000000)
+ - 0x80000000));
+ if (ud1 != 0)
+ emit_move_insn (copy_rtx (dest),
+ gen_rtx_IOR (DImode, copy_rtx (dest),
+ GEN_INT (ud1)));
+ emit_move_insn (copy_rtx (dest),
+ gen_rtx_ZERO_EXTEND (DImode,
+ gen_lowpart (SImode,
+ copy_rtx (dest))));
+ }
else if ((ud4 == 0xffff && (ud3 & 0x8000))
|| (ud4 == 0 && ! (ud3 & 0x8000)))
{
++++++ pr38591.diff ++++++
2010-05-15 Richard Guenther
PR bootstrap/38591
* Makefile.in (graph.o): Add missing $(CONFIG_H) dependency.
(sparseset.o): Likewise.
Index: gcc/Makefile.in
===================================================================
--- gcc/Makefile.in (revision 159391)
+++ gcc/Makefile.in (revision 159392)
@@ -1784,12 +1784,13 @@ c-pragma.o: c-pragma.c $(CONFIG_H) $(SYS
$(TREE_H) $(FUNCTION_H) $(C_PRAGMA_H) toplev.h output.h $(GGC_H) $(TM_P_H) \
$(C_COMMON_H) $(TARGET_H) gt-c-pragma.h $(CPPLIB_H) $(FLAGS_H)
graph.o: graph.c $(SYSTEM_H) coretypes.h $(TM_H) toplev.h $(FLAGS_H) output.h \
- $(RTL_H) $(FUNCTION_H) hard-reg-set.h $(BASIC_BLOCK_H) graph.h $(OBSTACK_H)
+ $(RTL_H) $(FUNCTION_H) hard-reg-set.h $(BASIC_BLOCK_H) graph.h $(OBSTACK_H) \
+ $(CONFIG_H)
sbitmap.o: sbitmap.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
$(FLAGS_H) hard-reg-set.h $(BASIC_BLOCK_H) $(OBSTACK_H)
ebitmap.o: ebitmap.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
$(EBITMAP_H)
-sparseset.o: sparseset.c $(SYSTEM_H) sparseset.h
+sparseset.o: sparseset.c $(SYSTEM_H) sparseset.h $(CONFIG_H)
COLLECT2_OBJS = collect2.o tlink.o intl.o version.o
COLLECT2_LIBS = @COLLECT2_LIBS@
++++++ pr42429.diff ++++++
2009-12-21 Jakub Jelinek
PR rtl-optimization/42429
* reload.c (find_reloads_subreg_address): When adjusting mode of
MEM, update also MEM_SIZE if it is set.
Index: gcc/reload.c
===================================================================
--- gcc/reload.c (revision 155374)
+++ gcc/reload.c (revision 155375)
@@ -6096,6 +6096,9 @@ find_reloads_subreg_address (rtx x, int
PUT_MODE (tem, GET_MODE (x));
if (MEM_OFFSET (tem))
set_mem_offset (tem, plus_constant (MEM_OFFSET (tem), offset));
+ if (MEM_SIZE (tem)
+ && INTVAL (MEM_SIZE (tem)) != (HOST_WIDE_INT) outer_size)
+ set_mem_size (tem, GEN_INT (outer_size));
/* If this was a paradoxical subreg that we replaced, the
resulting memory must be sufficiently aligned to allow
++++++ pr42614.diff ++++++
2010-01-05 Richard Guenther
PR tree-optimization/42614
* tree-ssa-alias.c (compute_flow_insensitive_aliasing):
Compute SMT aliases before symbol aliases.
* gcc.c-torture/execute/pr42614.c: New testcase.
Index: gcc/tree-ssa-alias.c
===================================================================
--- gcc/tree-ssa-alias.c.orig 2010-01-11 14:26:24.000000000 +0100
+++ gcc/tree-ssa-alias.c 2010-01-11 14:28:02.000000000 +0100
@@ -2484,48 +2484,6 @@ compute_flow_insensitive_aliasing (struc
size_t i;
timevar_push (TV_FLOW_INSENSITIVE);
- /* For every pointer P, determine which addressable variables may alias
- with P's symbol memory tag. */
- for (i = 0; i < ai->num_pointers; i++)
- {
- size_t j;
- struct alias_map_d *p_map = ai->pointers[i];
- tree tag = symbol_mem_tag (p_map->var);
- tree var;
-
- for (j = 0; j < ai->num_addressable_vars; j++)
- {
- struct alias_map_d *v_map;
- var_ann_t v_ann;
- tree alias_var;
-
- v_map = ai->addressable_vars[j];
- var = v_map->var;
- v_ann = var_ann (var);
-
- /* We used to skip variables that have never been written to
- if the memory tag has been never written to directly (or
- either of them were call clobbered). This is not enough
- though, as this misses writes through the tags aliases.
- So, for correctness we need to include any aliased
- variable here. */
-
- /* For the may_alias_p query we have to use the parent variable. */
- alias_var = (TREE_CODE (var) == STRUCT_FIELD_TAG
- ? SFT_PARENT_VAR (var) : var);
- if (may_alias_p (p_map->var, p_map->set,
- alias_var, get_alias_set (alias_var), false))
- {
- /* We should never have a var with subvars here, because
- they shouldn't get into the set of addressable vars */
- gcc_assert (!var_can_have_subvars (var)
- || get_subvars_for_var (var) == NULL);
-
- /* Add VAR to TAG's may-aliases set. */
- add_may_alias (tag, var);
- }
- }
- }
/* Since this analysis is based exclusively on symbols, it fails to
handle cases where two pointers P and Q have different memory
@@ -2546,7 +2504,11 @@ compute_flow_insensitive_aliasing (struc
To avoid this problem, we do a final traversal of AI->POINTERS
looking for pairs of pointers that have no aliased symbols in
- common and yet have conflicting alias set numbers. */
+ common and yet have conflicting alias set numbers.
+
+ Note this has to be done first as we only can avoid adding
+ aliases for common memory tag aliases, not for common symbol
+ aliases as they might get pruned by the operand scanner later. */
for (i = 0; i < ai->num_pointers; i++)
{
size_t j;
@@ -2577,6 +2539,49 @@ compute_flow_insensitive_aliasing (struc
}
}
+ /* For every pointer P, determine which addressable variables may alias
+ with P's symbol memory tag. */
+ for (i = 0; i < ai->num_pointers; i++)
+ {
+ size_t j;
+ struct alias_map_d *p_map = ai->pointers[i];
+ tree tag = symbol_mem_tag (p_map->var);
+ tree var;
+
+ for (j = 0; j < ai->num_addressable_vars; j++)
+ {
+ struct alias_map_d *v_map;
+ var_ann_t v_ann;
+ tree alias_var;
+
+ v_map = ai->addressable_vars[j];
+ var = v_map->var;
+ v_ann = var_ann (var);
+
+ /* We used to skip variables that have never been written to
+ if the memory tag has been never written to directly (or
+ either of them were call clobbered). This is not enough
+ though, as this misses writes through the tags aliases.
+ So, for correctness we need to include any aliased
+ variable here. */
+
+ /* For the may_alias_p query we have to use the parent variable. */
+ alias_var = (TREE_CODE (var) == STRUCT_FIELD_TAG
+ ? SFT_PARENT_VAR (var) : var);
+ if (may_alias_p (p_map->var, p_map->set,
+ alias_var, get_alias_set (alias_var), false))
+ {
+ /* We should never have a var with subvars here, because
+ they shouldn't get into the set of addressable vars */
+ gcc_assert (!var_can_have_subvars (var)
+ || get_subvars_for_var (var) == NULL);
+
+ /* Add VAR to TAG's may-aliases set. */
+ add_may_alias (tag, var);
+ }
+ }
+ }
+
/* We have to add all HEAP variables to all SMTs aliases bitmaps.
As we don't know which effective type the HEAP will have we cannot
do better here and we need the conflicts with obfuscated pointers
Index: gcc/testsuite/gcc.c-torture/execute/pr42614.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ gcc/testsuite/gcc.c-torture/execute/pr42614.c 2010-01-11 14:26:24.000000000 +0100
@@ -0,0 +1,68 @@
+extern void *malloc(__SIZE_TYPE__);
+extern void abort(void);
+extern void free(void *);
+
+typedef struct SEntry
+{
+ unsigned char num;
+} TEntry;
+
+typedef struct STable
+{
+ TEntry data[2];
+} TTable;
+
+TTable *init ()
+{
+ return malloc(sizeof(TTable));
+}
+
+void
+expect_func (int a, unsigned char *b) __attribute__ ((noinline));
+
+static inline void
+inlined_wrong (TEntry *entry_p, int flag);
+
+void
+inlined_wrong (TEntry *entry_p, int flag)
+{
+ unsigned char index;
+ entry_p->num = 0;
+
+ if (flag == 0)
+ abort();
+
+ for (index = 0; index < 1; index++)
+ entry_p->num++;
+
+ if (!entry_p->num)
+ {
+ abort();
+ }
+}
+
+void
+expect_func (int a, unsigned char *b)
+{
+ if (abs ((a == 0)))
+ abort ();
+ if (abs ((b == 0)))
+ abort ();
+}
+
+int
+main ()
+{
+ unsigned char index = 0;
+ TTable *table_p = init();
+ TEntry work;
+
+ inlined_wrong (&(table_p->data[1]), 1);
+ expect_func (1, &index);
+ inlined_wrong (&work, 1);
+
+ free (table_p);
+
+ return 0;
+}
+
++++++ pr45502.diff ++++++
Index: gcc-4.3.4-20091019/gcc/alias.c
===================================================================
--- gcc-4.3.4-20091019.orig/gcc/alias.c 2010-09-03 14:19:56.000000000 +0200
+++ gcc-4.3.4-20091019/gcc/alias.c 2010-09-03 14:22:26.000000000 +0200
@@ -305,7 +305,7 @@ alias_set_subset_of (alias_set_type set1
/* Otherwise, check if set1 is a subset of set2. */
ase = get_alias_set_entry (set2);
if (ase != 0
- && ((ase->has_zero_child && set1 == 0)
+ && (ase->has_zero_child
|| splay_tree_lookup (ase->children,
(splay_tree_key) set1)))
return true;
@@ -647,6 +647,17 @@ get_alias_set (tree t)
else if (TREE_CODE (t) == VECTOR_TYPE)
set = get_alias_set (TREE_TYPE (t));
+ /* Unless the language specifies otherwise, treat array types the
+ same as their components. This avoids the asymmetry we get
+ through recording the components. Consider accessing a
+ character(kind=1) through a reference to a character(kind=1)[1:1].
+ Or consider if we want to assign integer(kind=4)[0:D.1387] and
+ integer(kind=4)[4] the same alias set or not.
+ Just be pragmatic here and make sure the array and its element
+ type get the same alias set assigned. */
+ else if (TREE_CODE (t) == ARRAY_TYPE && !TYPE_NONALIASED_COMPONENT (t))
+ set = get_alias_set (TREE_TYPE (t));
+
else
/* Otherwise make a new alias set for this type. */
set = new_alias_set ();
++++++ pr47278.diff ++++++
2011-01-13 Richard Guenther
PR tree-optimization/47278
* tree.h (DECL_REPLACEABLE_P): Remove.
(decl_replaceable_p): Declare.
(decl_binds_to_current_def_p): Likewise.
* varasm.c (decl_replaceable_p): New function.
(decl_binds_to_current_def_p): Likewise.
* cgraph.c (cgraph_function_body_availability): Use decl_replaceable_p.
* except.c (set_nothrow_function_flags): Likewise.
* tree-inline.c (inlinable_function_p): Likewise.
cp/
* decl.c (finish_function): Likewise.
Index: gcc/tree.h
===================================================================
*** gcc/tree.h (revision 168743)
--- gcc/tree.h (working copy)
*************** extern void decl_restrict_base_insert (t
*** 3023,3048 ****
something which is DECL_COMDAT. */
#define DECL_COMDAT(NODE) (DECL_WITH_VIS_CHECK (NODE)->decl_with_vis.comdat_flag)
- /* A replaceable function is one which may be replaced at link-time
- with an entirely different definition, provided that the
- replacement has the same type. For example, functions declared
- with __attribute__((weak)) on most systems are replaceable.
-
- COMDAT functions are not replaceable, since all definitions of the
- function must be equivalent. It is important that COMDAT functions
- not be treated as replaceable so that use of C++ template
- instantiations is not penalized.
-
- For example, DECL_REPLACEABLE is used to determine whether or not a
- function (including a template instantiation) which is not
- explicitly declared "inline" can be inlined. If the function is
- DECL_REPLACEABLE then it is not safe to do the inlining, since the
- implementation chosen at link-time may be different. However, a
- function that is not DECL_REPLACEABLE can be inlined, since all
- versions of the function will be functionally identical. */
- #define DECL_REPLACEABLE_P(NODE) \
- (!DECL_COMDAT (NODE) && !targetm.binds_local_p (NODE))
-
/* The name of the object as the assembler will see it (but before any
translations made by ASM_OUTPUT_LABELREF). Often this is the same
as DECL_NAME. It is an IDENTIFIER_NODE. */
--- 3023,3028 ----
*************** extern void process_pending_assemble_ext
*** 5067,5072 ****
--- 5047,5054 ----
extern void finish_aliases_1 (void);
extern void finish_aliases_2 (void);
extern tree emutls_decl (tree);
+ extern bool decl_replaceable_p (tree);
+ extern bool decl_binds_to_current_def_p (tree);
/* In stmt.c */
extern void expand_computed_goto (tree);
Index: gcc/varasm.c
===================================================================
*** gcc/varasm.c (revision 168743)
--- gcc/varasm.c (working copy)
*************** default_valid_pointer_mode (enum machine
*** 6257,6262 ****
--- 6257,6307 ----
return (mode == ptr_mode || mode == Pmode);
}
+ /* Return true when references to DECL must bind to current definition in
+ final executable.
+
+ The condition is usually equivalent to whether the function binds to the
+ current module (shared library or executable), that is to binds_local_p.
+ We use this fact to avoid need for another target hook and implement
+ the logic using binds_local_p and just special cases where
+ decl_binds_to_current_def_p is stronger than binds local_p. In particular
+ the weak definitions (that can be overwritten at linktime by other
+ definition from different object file) and when resolution info is available
+ we simply use the knowledge passed to us by linker plugin. */
+ bool
+ decl_binds_to_current_def_p (tree decl)
+ {
+ gcc_assert (DECL_P (decl));
+ if (!TREE_PUBLIC (decl))
+ return true;
+ if (!targetm.binds_local_p (decl))
+ return false;
+ /* Otherwise we have to assume the worst for DECL_WEAK (hidden weaks
+ binds localy but still can be overwritten).
+ This rely on fact that binds_local_p behave as decl_replaceable_p
+ for all other declaration types. */
+ return !DECL_WEAK (decl);
+ }
+
+ /* A replaceable function or variable is one which may be replaced
+ at link-time with an entirely different definition, provided that the
+ replacement has the same type. For example, functions declared
+ with __attribute__((weak)) on most systems are replaceable.
+
+ COMDAT functions are not replaceable, since all definitions of the
+ function must be equivalent. It is important that COMDAT functions
+ not be treated as replaceable so that use of C++ template
+ instantiations is not penalized. */
+
+ bool
+ decl_replaceable_p (tree decl)
+ {
+ gcc_assert (DECL_P (decl));
+ if (!TREE_PUBLIC (decl) || DECL_COMDAT (decl))
+ return false;
+ return !decl_binds_to_current_def_p (decl);
+ }
+
/* Default function to output code that will globalize a label. A
target must define GLOBAL_ASM_OP or provide its own function to
globalize a label. */
Index: gcc/cgraph.c
===================================================================
*** gcc/cgraph.c (revision 168743)
--- gcc/cgraph.c (working copy)
*************** cgraph_function_body_availability (struc
*** 1007,1021 ****
??? Does the C++ one definition rule allow us to always return
AVAIL_AVAILABLE here? That would be good reason to preserve this
! hook Similarly deal with extern inline functions - this is again
! necessary to get C++ shared functions having keyed templates
! right and in the C extension documentation we probably should
! document the requirement of both versions of function (extern
! inline and offline) having same side effect characteristics as
! good optimization is what this optimization is about. */
! else if (!(*targetm.binds_local_p) (node->decl)
! && !DECL_COMDAT (node->decl) && !DECL_EXTERNAL (node->decl))
avail = AVAIL_OVERWRITABLE;
else avail = AVAIL_AVAILABLE;
--- 1007,1015 ----
??? Does the C++ one definition rule allow us to always return
AVAIL_AVAILABLE here? That would be good reason to preserve this
! bit. */
! else if (decl_replaceable_p (node->decl) && !DECL_EXTERNAL (node->decl))
avail = AVAIL_OVERWRITABLE;
else avail = AVAIL_AVAILABLE;
Index: gcc/except.c
===================================================================
*** gcc/except.c (revision 168743)
--- gcc/except.c (working copy)
*************** set_nothrow_function_flags (void)
*** 2807,2813 ****
/* If we don't know that this implementation of the function will
actually be used, then we must not set TREE_NOTHROW, since
callers must not assume that this function does not throw. */
! if (DECL_REPLACEABLE_P (current_function_decl))
return 0;
TREE_NOTHROW (current_function_decl) = 1;
--- 2807,2813 ----
/* If we don't know that this implementation of the function will
actually be used, then we must not set TREE_NOTHROW, since
callers must not assume that this function does not throw. */
! if (decl_replaceable_p (current_function_decl))
return 0;
TREE_NOTHROW (current_function_decl) = 1;
Index: gcc/tree-inline.c
===================================================================
*** gcc/tree-inline.c (revision 168743)
--- gcc/tree-inline.c (working copy)
*************** inlinable_function_p (tree fn)
*** 2103,2109 ****
/* Don't auto-inline anything that might not be bound within
this unit of translation. */
else if (!DECL_DECLARED_INLINE_P (fn)
! && DECL_REPLACEABLE_P (fn))
inlinable = false;
else if (!function_attribute_inlinable_p (fn))
--- 2103,2109 ----
/* Don't auto-inline anything that might not be bound within
this unit of translation. */
else if (!DECL_DECLARED_INLINE_P (fn)
! && decl_replaceable_p (fn))
inlinable = false;
else if (!function_attribute_inlinable_p (fn))
Index: gcc/cp/decl.c
===================================================================
*** gcc/cp/decl.c (revision 168743)
--- gcc/cp/decl.c (working copy)
*************** finish_function (int flags)
*** 11885,11891 ****
if (!processing_template_decl
&& !cp_function_chain->can_throw
&& !flag_non_call_exceptions
! && !DECL_REPLACEABLE_P (fndecl))
TREE_NOTHROW (fndecl) = 1;
/* This must come after expand_function_end because cleanups might
--- 11885,11891 ----
if (!processing_template_decl
&& !cp_function_chain->can_throw
&& !flag_non_call_exceptions
! && !decl_replaceable_p (fndecl))
TREE_NOTHROW (fndecl) = 1;
/* This must come after expand_function_end because cleanups might
Index: gcc/testsuite/gcc.dg/torture/pr47278-1.c
===================================================================
*** gcc/testsuite/gcc.dg/torture/pr47278-1.c (revision 0)
--- gcc/testsuite/gcc.dg/torture/pr47278-1.c (revision 0)
***************
*** 0 ****
--- 1,4 ----
+ /* { dg-do run } */
+ /* { dg-additional-sources "pr47278-2.c" } */
+
+ int foo (void) { return 1; }
Index: gcc/testsuite/gcc.dg/torture/pr47278-2.c
===================================================================
*** gcc/testsuite/gcc.dg/torture/pr47278-2.c (revision 0)
--- gcc/testsuite/gcc.dg/torture/pr47278-2.c (revision 0)
***************
*** 0 ****
--- 1,13 ----
+ extern void abort (void);
+
+ int __attribute__((weak,visibility("hidden"))) foo (void)
+ {
+ return 0;
+ }
+
+ int main()
+ {
+ if (foo() != 1)
+ abort ();
+ return 0;
+ }
++++++ prefetch-schedule-barrier ++++++
Index: gcc/rtl.h
===================================================================
*** gcc/rtl.h.orig
--- gcc/rtl.h
*************** struct rtx_def GTY((chain_next ("RTX_NEX
*** 271,277 ****
1 in a SUBREG with a negative value.
1 in a LABEL_REF, REG_LABEL_TARGET or REG_LABEL_OPERAND note for a
non-local label.
! In a SYMBOL_REF, this flag is used for machine-specific purposes. */
unsigned int volatil : 1;
/* 1 in a MEM referring to a field of an aggregate.
0 if the MEM was a variable or the result of a * operator in C;
--- 271,279 ----
1 in a SUBREG with a negative value.
1 in a LABEL_REF, REG_LABEL_TARGET or REG_LABEL_OPERAND note for a
non-local label.
! In a SYMBOL_REF, this flag is used for machine-specific purposes.
! In a PREFETCH, this flag indicates that it should be considered a scheduling
! barrier. */
unsigned int volatil : 1;
/* 1 in a MEM referring to a field of an aggregate.
0 if the MEM was a variable or the result of a * operator in C;
*************** do { \
*** 1366,1371 ****
--- 1368,1377 ----
offset within that block. */
#define SYMBOL_REF_BLOCK_OFFSET(RTX) (BLOCK_SYMBOL_CHECK (RTX)->offset)
+ /* True if RTX is flagged to be a scheduling barrier. */
+ #define PREFETCH_SCHEDULE_BARRIER_P(RTX) \
+ (RTL_FLAG_CHECK1("PREFETCH_SCHEDULE_BARRIER_P", (RTX), PREFETCH)->volatil)
+
/* Indicate whether the machine has any sort of auto increment addressing.
If not, we can avoid checking for REG_INC notes. */
Index: gcc/sched-deps.c
===================================================================
*** gcc/sched-deps.c.orig
--- gcc/sched-deps.c
*************** sched_analyze_2 (struct deps *deps, rtx
*** 1824,1829 ****
--- 1824,1834 ----
flush_pending_lists (deps, insn, true, false);
break;
+ case PREFETCH:
+ if (PREFETCH_SCHEDULE_BARRIER_P (x))
+ reg_pending_barrier = TRUE_BARRIER;
+ break;
+
case UNSPEC_VOLATILE:
flush_pending_lists (deps, insn, true, true);
/* FALLTHRU */
Index: gcc/doc/rtl.texi
===================================================================
*** gcc/doc/rtl.texi.orig
--- gcc/doc/rtl.texi
*************** Stored in the @code{volatil} field and p
*** 859,864 ****
--- 859,872 ----
Most uses of @code{SYMBOL_REF_FLAG} are historic and may be subsumed
by @code{SYMBOL_REF_FLAGS}. Certainly use of @code{SYMBOL_REF_FLAGS}
is mandatory if the target requires more than one bit of storage.
+
+ @findex PREFETCH_SCHEDULE_BARRIER_P
+ @cindex @code{prefetch} and @samp{/v}
+ @cindex @code{volatile}, in @code{prefetch}
+ @item PREFETCH_SCHEDULE_BARRIER_P (@var{x})
+ In a @code{prefetch}, indicates that the prefetch is a scheduling barrier.
+ No other INSNs will be moved over it.
+ Stored in the @code{volatil} field and printed as @samp{/v}.
@end table
These are the fields to which the above macros refer:
*************** In an @code{insn}, 1 means the insn has
*** 1006,1011 ****
--- 1014,1022 ----
In @code{label_ref} and @code{reg_label} expressions, 1 means a reference
to a non-local label.
+ In @code{prefetch} expressions, 1 means that the containing insn is a
+ scheduling barrier.
+
In an RTL dump, this flag is represented as @samp{/v}.
@end table
++++++ s390-31bit-sibcall-fix ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** s390_emit_call (rtx addr_location, rtx t
*** 9387,9397 ****
replace the symbol itself with the PLT stub. */
if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
{
! addr_location = gen_rtx_UNSPEC (Pmode,
! gen_rtvec (1, addr_location),
! UNSPEC_PLT);
! addr_location = gen_rtx_CONST (Pmode, addr_location);
! plt_call = true;
}
/* Unless we can use the bras(l) insn, force the
--- 9387,9411 ----
replace the symbol itself with the PLT stub. */
if (flag_pic && !SYMBOL_REF_LOCAL_P (addr_location))
{
! if (retaddr_reg != NULL_RTX)
! {
! addr_location = gen_rtx_UNSPEC (Pmode,
! gen_rtvec (1, addr_location),
! UNSPEC_PLT);
! addr_location = gen_rtx_CONST (Pmode, addr_location);
! plt_call = true;
! }
! else
! /* For -fpic code the PLT entries might use r12 which is
! call-saved. Therefore we cannot do a sibcall when
! calling directly using a symbol ref. When reaching
! this point we decided (in s390_function_ok_for_sibcall)
! to do a sibcall for a function pointer but one of the
! optimizers was able to get rid of the function pointer
! by propagating the symbol ref into the call. This
! optimization is illegal for S/390 so we turn the direct
! call into a indirect call again. */
! addr_location = force_reg (Pmode, addr_location);
}
/* Unless we can use the bras(l) insn, force the
Index: gcc/testsuite/gcc.c-torture/compile/pr43635.c
===================================================================
*** /dev/null
--- gcc/testsuite/gcc.c-torture/compile/pr43635.c
***************
*** 0 ****
--- 1,7 ----
+ extern void d (void);
+
+ void (*foo (void)) (float)
+ {
+ void (*(*x) (void)) (float) = d;
+ return (*x) ();
+ }
++++++ s390-fix-z10prop ++++++
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 2101,2107 ****
[(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
--- 2101,2107 ----
[(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
***************
*** 2190,2196 ****
[(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")])
;
; movcc instruction pattern
--- 2190,2196 ----
[(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")])
;
; movcc instruction pattern
++++++ s390-fmadd-2mem ++++++
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 5315,5322 ****
; madbr, maebr, maxb, madb, maeb
(define_insn "*fmadd<mode>"
[(set (match_operand:DSF 0 "register_operand" "=f,f")
! (plus:DSF (mult:DSF (match_operand:DSF 1 "register_operand" "%f,f")
! (match_operand:DSF 2 "nonimmediate_operand" "f,R"))
(match_operand:DSF 3 "register_operand" "0,0")))]
"TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
"@
--- 5315,5322 ----
; madbr, maebr, maxb, madb, maeb
(define_insn "*fmadd<mode>"
[(set (match_operand:DSF 0 "register_operand" "=f,f")
! (plus:DSF (mult:DSF (match_operand:DSF 1 "nonimmediate_operand" "%f,f")
! (match_operand:DSF 2 "nonimmediate_operand" "f,R"))
(match_operand:DSF 3 "register_operand" "0,0")))]
"TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
"@
***************
*** 5328,5335 ****
; msxbr, msdbr, msebr, msxb, msdb, mseb
(define_insn "*fmsub<mode>"
[(set (match_operand:DSF 0 "register_operand" "=f,f")
! (minus:DSF (mult:DSF (match_operand:DSF 1 "register_operand" "f,f")
! (match_operand:DSF 2 "nonimmediate_operand" "f,R"))
(match_operand:DSF 3 "register_operand" "0,0")))]
"TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
"@
--- 5328,5335 ----
; msxbr, msdbr, msebr, msxb, msdb, mseb
(define_insn "*fmsub<mode>"
[(set (match_operand:DSF 0 "register_operand" "=f,f")
! (minus:DSF (mult:DSF (match_operand:DSF 1 "nonimmediate_operand" "f,f")
! (match_operand:DSF 2 "nonimmediate_operand" "f,R"))
(match_operand:DSF 3 "register_operand" "0,0")))]
"TARGET_HARD_FLOAT && TARGET_FUSED_MADD"
"@
++++++ s390-improve-loadfpzero ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** legitimate_reload_constant_p (rtx op)
*** 2803,2808 ****
--- 2803,2814 ----
&& larl_operand (op, VOIDmode))
return true;
+ /* Accept floating-point zero operands that fit into a single GPR. */
+ if (GET_CODE (op) == CONST_DOUBLE
+ && s390_float_const_zero_p (op)
+ && GET_MODE_SIZE (GET_MODE (op)) <= UNITS_PER_WORD)
+ return true;
+
/* Accept double-word operands that can be split. */
if (GET_CODE (op) == CONST_INT
&& trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op))
*************** s390_preferred_reload_class (rtx op, enu
*** 2826,2840 ****
{
switch (GET_CODE (op))
{
! /* Constants we cannot reload must be forced into the
! literal pool. */
!
! case CONST_DOUBLE:
! case CONST_INT:
! if (legitimate_reload_constant_p (op))
! return class;
! else
! return NO_REGS;
/* If a symbolic constant or a PLUS is reloaded,
it is most likely being used as an address, so
--- 2832,2849 ----
{
switch (GET_CODE (op))
{
! /* Constants we cannot reload into general registers
! must be forced into the literal pool. */
! case CONST_DOUBLE:
! case CONST_INT:
! if (reg_class_subset_p (GENERAL_REGS, class)
! && legitimate_reload_constant_p (op))
! return GENERAL_REGS;
! else if (reg_class_subset_p (ADDR_REGS, class)
! && legitimate_reload_constant_p (op))
! return ADDR_REGS;
! else
! return NO_REGS;
/* If a symbolic constant or a PLUS is reloaded,
it is most likely being used as an address, so
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 2064,2072 ****
(define_insn "*mov<mode>_64dfp"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,d,f,f,R,T,d, d,RT")
(match_operand:DD_DF 1 "general_operand"
! " f,d,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT && TARGET_DFP"
"@
ldr\t%0,%1
--- 2064,2072 ----
(define_insn "*mov<mode>_64dfp"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,d,f,f,R,T,d,d, d,RT")
(match_operand:DD_DF 1 "general_operand"
! " f,d,f,R,T,f,f,G,d,RT, d"))]
"TARGET_64BIT && TARGET_DFP"
"@
ldr\t%0,%1
***************
*** 2076,2093 ****
ldy\t%0,%1
std\t%1,%0
stdy\t%1,%0
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY")
(set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf,
! fstoredf,fstoredf,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")
])
(define_insn "*mov<mode>_64"
! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d, d,RT")
! (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT"
"@
ldr\t%0,%1
--- 2076,2094 ----
ldy\t%0,%1
std\t%1,%0
stdy\t%1,%0
+ lghi\t%0,0
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RI,RRE,RXY,RXY")
(set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf,
! fstoredf,fstoredf,*,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec")
])
(define_insn "*mov<mode>_64"
! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d, d,RT")
! (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,G,d,RT, d"))]
"TARGET_64BIT"
"@
ldr\t%0,%1
***************
*** 2095,2107 ****
ldy\t%0,%1
std\t%1,%0
stdy\t%1,%0
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
! fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
--- 2096,2109 ----
ldy\t%0,%1
std\t%1,%0
stdy\t%1,%0
+ lghi\t%0,0
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RI,RRE,RXY,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
! fstore<mode>,fstore<mode>,*,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
***************
*** 2172,2180 ****
(define_insn "mov<mode>"
[(set (match_operand:SD_SF 0 "nonimmediate_operand"
! "=f,f,f,R,T,d,d,d,R,T")
(match_operand:SD_SF 1 "general_operand"
! " f,R,T,f,f,d,R,T,d,d"))]
""
"@
ler\t%0,%1
--- 2174,2182 ----
(define_insn "mov<mode>"
[(set (match_operand:SD_SF 0 "nonimmediate_operand"
! "=f,f,f,R,T,d,d,d,d,R,T")
(match_operand:SD_SF 1 "general_operand"
! " f,R,T,f,f,G,d,R,T,d,d"))]
""
"@
ler\t%0,%1
***************
*** 2182,2196 ****
ley\t%0,%1
ste\t%1,%0
stey\t%1,%0
lr\t%0,%1
l\t%0,%1
ly\t%0,%1
st\t%1,%0
sty\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
! fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")])
;
; movcc instruction pattern
--- 2184,2199 ----
ley\t%0,%1
ste\t%1,%0
stey\t%1,%0
+ lhi\t%0,0
lr\t%0,%1
l\t%0,%1
ly\t%0,%1
st\t%1,%0
sty\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RI,RR,RX,RXY,RX,RXY")
(set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
! fstore<mode>,fstore<mode>,*,lr,load,load,store,store")
! (set_attr "z10prop" "*,*,*,*,*,z10_fwd_A1,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")])
;
; movcc instruction pattern
++++++ s390-literalpool-cse ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** s390_decompose_address (rtx addr, struct
*** 1994,1999 ****
--- 1994,2009 ----
else if (GET_CODE (disp) == UNSPEC
&& XINT (disp, 1) == UNSPEC_LTREL_OFFSET)
{
+ /* In case CSE pulled a non literal pool reference out of
+ the pool we have to reject the address. This is
+ especially important when loading the GOT pointer on non
+ zarch CPUs. In this case the literal pool contains an lt
+ relative offset to the _GLOBAL_OFFSET_TABLE_ label which
+ will most likely exceed the displacement. */
+ if (GET_CODE (XVECEXP (disp, 0, 0)) != SYMBOL_REF
+ || !CONSTANT_POOL_ADDRESS_P (XVECEXP (disp, 0, 0)))
+ return false;
+
orig_disp = gen_rtx_CONST (Pmode, disp);
if (offset)
{
++++++ s390-literalpool-qrst ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** s390_legitimate_address_without_index_p
*** 2081,2087 ****
/* Return true if ADDR is of kind symbol_ref or symbol_ref + const_int
and return these parts in SYMREF and ADDEND. You can pass NULL in
! SYMREF and/or ADDEND if you are not interested in these values. */
static bool
s390_symref_operand_p (rtx addr, rtx *symref, HOST_WIDE_INT *addend)
--- 2081,2088 ----
/* Return true if ADDR is of kind symbol_ref or symbol_ref + const_int
and return these parts in SYMREF and ADDEND. You can pass NULL in
! SYMREF and/or ADDEND if you are not interested in these values.
! Literal pool references are *not* considered symbol references. */
static bool
s390_symref_operand_p (rtx addr, rtx *symref, HOST_WIDE_INT *addend)
*************** s390_symref_operand_p (rtx addr, rtx *sy
*** 2094,2099 ****
--- 2095,2101 ----
if (GET_CODE (addr) == PLUS)
{
if (GET_CODE (XEXP (addr, 0)) == SYMBOL_REF
+ && !CONSTANT_POOL_ADDRESS_P (XEXP (addr, 0))
&& CONST_INT_P (XEXP (addr, 1)))
{
tmpaddend = INTVAL (XEXP (addr, 1));
*************** s390_symref_operand_p (rtx addr, rtx *sy
*** 2103,2109 ****
return false;
}
else
! if (GET_CODE (addr) != SYMBOL_REF)
return false;
if (symref)
--- 2105,2111 ----
return false;
}
else
! if (GET_CODE (addr) != SYMBOL_REF || CONSTANT_POOL_ADDRESS_P (addr))
return false;
if (symref)
*************** s390_check_qrst_address (char c, rtx op,
*** 2129,2140 ****
/* This check makes sure that no symbolic address (except literal
pool references) are accepted by the R or T constraints. */
if (s390_symref_operand_p (op, NULL, NULL))
{
- if (!lit_pool_ok)
- return 0;
if (!s390_decompose_address (op, &addr))
return 0;
! if (!addr.literal_pool)
return 0;
decomposed = true;
}
--- 2131,2144 ----
/* This check makes sure that no symbolic address (except literal
pool references) are accepted by the R or T constraints. */
if (s390_symref_operand_p (op, NULL, NULL))
+ return 0;
+
+ /* Ensure literal pool references are only accepted if LIT_POOL_OK. */
+ if (!lit_pool_ok)
{
if (!s390_decompose_address (op, &addr))
return 0;
! if (addr.literal_pool)
return 0;
decomposed = true;
}
++++++ s390-memxxx-prefetchs ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** s390_expand_movmem (rtx dst, rtx src, rt
*** 3956,3961 ****
--- 3956,3979 ----
emit_label (loop_start_label);
+ if (TARGET_Z10
+ && (GET_CODE (len) != CONST_INT || INTVAL (len) > 768))
+ {
+ rtx prefetch;
+
+ /* Issue a read prefetch for the +3 cache line. */
+ prefetch = gen_prefetch (gen_rtx_PLUS (Pmode, src_addr, GEN_INT (768)),
+ const0_rtx, const0_rtx);
+ PREFETCH_SCHEDULE_BARRIER_P (prefetch) = true;
+ emit_insn (prefetch);
+
+ /* Issue a write prefetch for the +3 cache line. */
+ prefetch = gen_prefetch (gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (768)),
+ const1_rtx, const0_rtx);
+ PREFETCH_SCHEDULE_BARRIER_P (prefetch) = true;
+ emit_insn (prefetch);
+ }
+
emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
s390_load_address (dst_addr,
gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
*************** s390_expand_setmem (rtx dst, rtx len, rt
*** 4072,4077 ****
--- 4090,4106 ----
emit_label (loop_start_label);
+ if (TARGET_Z10
+ && (GET_CODE (len) != CONST_INT || INTVAL (len) > 1024))
+ {
+ /* Issue a write prefetch for the +4 cache line. */
+ rtx prefetch = gen_prefetch (gen_rtx_PLUS (Pmode, dst_addr,
+ GEN_INT (1024)),
+ const1_rtx, const0_rtx);
+ emit_insn (prefetch);
+ PREFETCH_SCHEDULE_BARRIER_P (prefetch) = true;
+ }
+
if (val == const0_rtx)
emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
else
*************** s390_expand_cmpmem (rtx target, rtx op0,
*** 4164,4169 ****
--- 4193,4216 ----
emit_label (loop_start_label);
+ if (TARGET_Z10
+ && (GET_CODE (len) != CONST_INT || INTVAL (len) > 512))
+ {
+ rtx prefetch;
+
+ /* Issue a read prefetch for the +2 cache line of operand 1. */
+ prefetch = gen_prefetch (gen_rtx_PLUS (Pmode, addr0, GEN_INT (512)),
+ const0_rtx, const0_rtx);
+ emit_insn (prefetch);
+ PREFETCH_SCHEDULE_BARRIER_P (prefetch) = true;
+
+ /* Issue a read prefetch for the +2 cache line of operand 2. */
+ prefetch = gen_prefetch (gen_rtx_PLUS (Pmode, addr1, GEN_INT (512)),
+ const0_rtx, const0_rtx);
+ emit_insn (prefetch);
+ PREFETCH_SCHEDULE_BARRIER_P (prefetch) = true;
+ }
+
emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
temp = gen_rtx_NE (VOIDmode, ccreg, const0_rtx);
temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
++++++ s390-movqi-memmem ++++++
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 1861,1868 ****
})
(define_insn "*movqi"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,T,Q,S")
! (match_operand:QI 1 "general_operand" "d,n,R,T,d,d,n,n"))]
""
"@
lr\t%0,%1
--- 1861,1868 ----
})
(define_insn "*movqi"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,d,R,T,Q,S,?Q")
! (match_operand:QI 1 "general_operand" " d,n,R,T,d,d,n,n,?Q"))]
""
"@
lr\t%0,%1
***************
*** 1872,1880 ****
stc\t%1,%0
stcy\t%1,%0
mvi\t%S0,%b1
! mviy\t%S0,%b1"
! [(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY")
! (set_attr "type" "lr,*,*,*,store,store,store,store")
(set_attr "z10prop" "z10_fr_E1,
z10_fwd_A1,
z10_super_E1,
--- 1872,1881 ----
stc\t%1,%0
stcy\t%1,%0
mvi\t%S0,%b1
! mviy\t%S0,%b1
! *"
! [(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY,SS")
! (set_attr "type" "lr,*,*,*,store,store,store,store,*")
(set_attr "z10prop" "z10_fr_E1,
z10_fwd_A1,
z10_super_E1,
***************
*** 1882,1888 ****
z10_rec,
z10_rec,
z10_super,
! z10_super")])
(define_peephole2
[(set (match_operand:QI 0 "nonimmediate_operand" "")
--- 1883,1890 ----
z10_rec,
z10_rec,
z10_super,
! z10_super,
! *")])
(define_peephole2
[(set (match_operand:QI 0 "nonimmediate_operand" "")
***************
*** 2259,2264 ****
--- 2261,2282 ----
"mvc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")])
+ ; This splitter converts a QI to QI mode copy into a BLK mode copy in
+ ; order to have it implemented with mvc.
+
+ (define_split
+ [(set (match_operand:QI 0 "memory_operand" "")
+ (match_operand:QI 1 "memory_operand" ""))]
+ "reload_completed"
+ [(parallel
+ [(set (match_dup 0) (match_dup 1))
+ (use (const_int 1))])]
+ {
+ operands[0] = adjust_address (operands[0], BLKmode, 0);
+ operands[1] = adjust_address (operands[1], BLKmode, 0);
+ })
+
+
(define_peephole2
[(parallel
[(set (match_operand:BLK 0 "memory_operand" "")
++++++ s390-movqi-typo ++++++
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 1873,1879 ****
stcy\t%1,%0
mvi\t%S0,%b1
mviy\t%S0,%b1
! *"
[(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY,SS")
(set_attr "type" "lr,*,*,*,store,store,store,store,*")
(set_attr "z10prop" "z10_fr_E1,
--- 1873,1879 ----
stcy\t%1,%0
mvi\t%S0,%b1
mviy\t%S0,%b1
! #"
[(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY,SS")
(set_attr "type" "lr,*,*,*,store,store,store,store,*")
(set_attr "z10prop" "z10_fr_E1,
++++++ s390-option-defaults ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** override_options (void)
*** 1650,1658 ****
target_flags |= MASK_LONG_DOUBLE_128;
#endif
! if (s390_tune == PROCESSOR_2097_Z10
! && !PARAM_SET_P (PARAM_MAX_UNROLLED_INSNS))
! set_param_value ("max-unrolled-insns", 100);
}
/* Map for smallest class containing reg regno. */
--- 1650,1666 ----
target_flags |= MASK_LONG_DOUBLE_128;
#endif
! if (s390_tune == PROCESSOR_2097_Z10)
! {
! if (!PARAM_SET_P (PARAM_MAX_UNROLLED_INSNS))
! set_param_value ("max-unrolled-insns", 100);
! if (!PARAM_SET_P (PARAM_MAX_UNROLL_TIMES))
! set_param_value ("max-unroll-times", 32);
! if (!PARAM_SET_P (PARAM_MAX_COMPLETELY_PEELED_INSNS))
! set_param_value ("max-completely-peeled-insns", 800);
! if (!PARAM_SET_P (PARAM_MAX_COMPLETELY_PEEL_TIMES))
! set_param_value ("max-completely-peel-times", 64);
! }
}
/* Map for smallest class containing reg regno. */
++++++ s390-peel-times-default ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** override_options (void)
*** 1658,1664 ****
if (!PARAM_SET_P (PARAM_MAX_UNROLL_TIMES))
set_param_value ("max-unroll-times", 32);
if (!PARAM_SET_P (PARAM_MAX_COMPLETELY_PEELED_INSNS))
! set_param_value ("max-completely-peeled-insns", 800);
if (!PARAM_SET_P (PARAM_MAX_COMPLETELY_PEEL_TIMES))
set_param_value ("max-completely-peel-times", 64);
}
--- 1658,1664 ----
if (!PARAM_SET_P (PARAM_MAX_UNROLL_TIMES))
set_param_value ("max-unroll-times", 32);
if (!PARAM_SET_P (PARAM_MAX_COMPLETELY_PEELED_INSNS))
! set_param_value ("max-completely-peeled-insns", 2000);
if (!PARAM_SET_P (PARAM_MAX_COMPLETELY_PEEL_TIMES))
set_param_value ("max-completely-peel-times", 64);
}
++++++ s390-remove-copysign ++++++
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 7046,7066 ****
(set_attr "type" "fsimp<mode>")])
;;
- ;;- Copy sign instructions
- ;;
-
- ; cpsdr
- (define_insn "copysign<mode>3"
- [(set (match_operand:FP 0 "register_operand" "=f")
- (unspec:FP [(match_operand:FP 1 "register_operand" "<fT0>")
- (match_operand:FP 2 "register_operand" "f")]
- UNSPEC_COPYSIGN))]
- "TARGET_DFP"
- "cpsdr\t%0,%2,%1"
- [(set_attr "op_type" "RRF")
- (set_attr "type" "fsimp<mode>")])
-
- ;;
;;- Square root instructions.
;;
--- 7046,7051 ----
++++++ s390-remove-loadfpzero ++++++
Index: gcc/config/s390/2097.md
===================================================================
*** gcc/config/s390/2097.md.orig
--- gcc/config/s390/2097.md
***************
*** 466,480 ****
(eq_attr "type" "fsimpdf,fmuldf"))
"z10_e1_BOTH, z10_Gate_FP")
- ; LOAD ZERO produces a hex value but we need bin. Using the stage 7
- ; bypass causes an exception for format conversion which is very
- ; expensive. So, make sure subsequent instructions only get the zero
- ; in the normal way.
- (define_insn_reservation "z10_fhex" 12
- (and (eq_attr "cpu" "z10")
- (eq_attr "type" "fhex"))
- "z10_e1_BOTH, z10_Gate_FP")
-
(define_insn_reservation "z10_fsimpsf" 6
(and (eq_attr "cpu" "z10")
(eq_attr "type" "fsimpsf,fmulsf"))
--- 466,471 ----
Index: gcc/config/s390/s390.md
===================================================================
*** gcc/config/s390/s390.md.orig
--- gcc/config/s390/s390.md
***************
*** 101,111 ****
(UNSPEC_SP_SET 700)
(UNSPEC_SP_TEST 701)
- ; Copy sign instructions
- (UNSPEC_COPYSIGN 800)
-
; Test Data Class (TDC)
! (UNSPEC_TDC_INSN 900)
])
;;
--- 101,108 ----
(UNSPEC_SP_SET 700)
(UNSPEC_SP_TEST 701)
; Test Data Class (TDC)
! (UNSPEC_TDC_INSN 800)
])
;;
***************
*** 1953,1963 ****
"")
(define_insn "*mov<mode>_64"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o, d,QS, d,o")
! (match_operand:TD_TF 1 "general_operand" " G,f,o,f,QS, d,dRT,d"))]
"TARGET_64BIT"
"@
- lzxr\t%0
lxr\t%0,%1
#
#
--- 1950,1959 ----
"")
(define_insn "*mov<mode>_64"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,o, d,QS, d,o")
! (match_operand:TD_TF 1 "general_operand" " f,o,f,QS, d,dRT,d"))]
"TARGET_64BIT"
"@
lxr\t%0,%1
#
#
***************
*** 1965,1984 ****
stmg\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RRE,RRE,*,*,RSY,RSY,*,*")
! (set_attr "type" "fhex,fsimptf,*,*,lm,stm,*,*")])
(define_insn "*mov<mode>_31"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,f,o")
! (match_operand:TD_TF 1 "general_operand" " G,f,o,f"))]
"!TARGET_64BIT"
"@
- lzxr\t%0
lxr\t%0,%1
#
#"
! [(set_attr "op_type" "RRE,RRE,*,*")
! (set_attr "type" "fhex,fsimptf,*,*")])
; TFmode in GPRs splitters
--- 1961,1979 ----
stmg\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RRE,*,*,RSY,RSY,*,*")
! (set_attr "type" "fsimptf,*,*,lm,stm,*,*")])
(define_insn "*mov<mode>_31"
! [(set (match_operand:TD_TF 0 "nonimmediate_operand" "=f,f,o")
! (match_operand:TD_TF 1 "general_operand" " f,o,f"))]
"!TARGET_64BIT"
"@
lxr\t%0,%1
#
#"
! [(set_attr "op_type" "RRE,*,*")
! (set_attr "type" "fsimptf,*,*")])
; TFmode in GPRs splitters
***************
*** 2069,2080 ****
(define_insn "*mov<mode>_64dfp"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,f,d,f,f,R,T,d, d,RT")
(match_operand:DD_DF 1 "general_operand"
! " G,f,d,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT && TARGET_DFP"
"@
- lzdr\t%0
ldr\t%0,%1
ldgr\t%0,%1
lgdr\t%0,%1
--- 2064,2074 ----
(define_insn "*mov<mode>_64dfp"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,d,f,f,R,T,d, d,RT")
(match_operand:DD_DF 1 "general_operand"
! " f,d,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT && TARGET_DFP"
"@
ldr\t%0,%1
ldgr\t%0,%1
lgdr\t%0,%1
***************
*** 2085,2112 ****
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RRE,RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "fhex,floaddf,floaddf,floaddf,floaddf,floaddf,
fstoredf,fstoredf,lr,load,store")
! (set_attr "z10prop" "*,
! *,
! *,
! *,
! *,
! *,
! *,
! *,
! z10_fr_E1,
! z10_fwd_A3,
! z10_rec")
])
(define_insn "*mov<mode>_64"
! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,f,R,T,d, d,RT")
! (match_operand:DD_DF 1 "general_operand" "G,f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT"
"@
- lzdr\t%0
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
--- 2079,2095 ----
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RRE,RRE,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "floaddf,floaddf,floaddf,floaddf,floaddf,
fstoredf,fstoredf,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")
])
(define_insn "*mov<mode>_64"
! [(set (match_operand:DD_DF 0 "nonimmediate_operand" "=f,f,f,R,T,d, d,RT")
! (match_operand:DD_DF 1 "general_operand" "f,R,T,f,f,d,RT, d"))]
"TARGET_64BIT"
"@
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
***************
*** 2115,2141 ****
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,
! *,
! *,
! *,
! *,
! *,
! z10_fr_E1,
! z10_fwd_A3,
! z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,f,f,R,T,d,d,Q,S, d,o")
(match_operand:DD_DF 1 "general_operand"
! " G,f,R,T,f,f,Q,S,d,d,dPRT,d"))]
"!TARGET_64BIT"
"@
- lzdr\t%0
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
--- 2098,2115 ----
lgr\t%0,%1
lg\t%0,%1
stg\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RRE,RXY,RXY")
! (set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,store")
! (set_attr "z10prop" "*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_rec")])
(define_insn "*mov<mode>_31"
[(set (match_operand:DD_DF 0 "nonimmediate_operand"
! "=f,f,f,R,T,d,d,Q,S, d,o")
(match_operand:DD_DF 1 "general_operand"
! " f,R,T,f,f,Q,S,d,d,dPRT,d"))]
"!TARGET_64BIT"
"@
ldr\t%0,%1
ld\t%0,%1
ldy\t%0,%1
***************
*** 2147,2154 ****
stmy\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*")
! (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")])
(define_split
--- 2121,2128 ----
stmy\t%1,%N1,%S0
#
#"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RS,RSY,RS,RSY,*,*")
! (set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lm,lm,stm,stm,*,*")])
(define_split
***************
*** 2198,2209 ****
(define_insn "mov<mode>"
[(set (match_operand:SD_SF 0 "nonimmediate_operand"
! "=f,f,f,f,R,T,d,d,d,R,T")
(match_operand:SD_SF 1 "general_operand"
! " G,f,R,T,f,f,d,R,T,d,d"))]
""
"@
- lzer\t%0
ler\t%0,%1
le\t%0,%1
ley\t%0,%1
--- 2172,2182 ----
(define_insn "mov<mode>"
[(set (match_operand:SD_SF 0 "nonimmediate_operand"
! "=f,f,f,R,T,d,d,d,R,T")
(match_operand:SD_SF 1 "general_operand"
! " f,R,T,f,f,d,R,T,d,d"))]
""
"@
ler\t%0,%1
le\t%0,%1
ley\t%0,%1
***************
*** 2214,2233 ****
ly\t%0,%1
st\t%1,%0
sty\t%1,%0"
! [(set_attr "op_type" "RRE,RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
! (set_attr "type" "fhex,fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,
! *,
! *,
! *,
! *,
! *,
! z10_fr_E1,
! z10_fwd_A3,
! z10_fwd_A3,
! z10_rec,
! z10_rec")])
;
; movcc instruction pattern
--- 2187,2196 ----
ly\t%0,%1
st\t%1,%0
sty\t%1,%0"
! [(set_attr "op_type" "RR,RX,RXY,RX,RXY,RR,RX,RXY,RX,RXY")
! (set_attr "type" "fload<mode>,fload<mode>,fload<mode>,
fstore<mode>,fstore<mode>,lr,load,load,store,store")
! (set_attr "z10prop" "*,*,*,*,*,*,z10_fr_E1,z10_fwd_A3,z10_fwd_A3,z10_rec,z10_rec")])
;
; movcc instruction pattern
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** legitimate_reload_constant_p (rtx op)
*** 2799,2809 ****
&& larl_operand (op, VOIDmode))
return true;
- /* Accept lzXX operands. */
- if (GET_CODE (op) == CONST_DOUBLE
- && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (op, 'G', "G"))
- return true;
-
/* Accept double-word operands that can be split. */
if (GET_CODE (op) == CONST_INT
&& trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op))
--- 2799,2804 ----
++++++ s390-symref-preferredreload ++++++
Index: gcc/config/s390/s390.c
===================================================================
*** gcc/config/s390/s390.c.orig
--- gcc/config/s390/s390.c
*************** s390_preferred_reload_class (rtx op, enu
*** 2859,2870 ****
it is most likely being used as an address, so
prefer ADDR_REGS. If 'class' is not a superset
of ADDR_REGS, e.g. FP_REGS, reject this reload. */
- case PLUS:
case LABEL_REF:
case SYMBOL_REF:
case CONST:
if (reg_class_subset_p (ADDR_REGS, class))
! return ADDR_REGS;
else
return NO_REGS;
--- 2859,2874 ----
it is most likely being used as an address, so
prefer ADDR_REGS. If 'class' is not a superset
of ADDR_REGS, e.g. FP_REGS, reject this reload. */
case LABEL_REF:
case SYMBOL_REF:
case CONST:
+ if (!legitimate_reload_constant_p (op))
+ return NO_REGS;
+ /* fallthrough */
+ case PLUS:
+ /* load address will be used. */
if (reg_class_subset_p (ADDR_REGS, class))
! return ADDR_REGS;
else
return NO_REGS;
*************** s390_secondary_reload (bool in_p, rtx x,
*** 2980,2991 ****
if (TARGET_Z10)
{
/* On z10 several optimizer steps may generate larl operands with
an odd addend. */
if (in_p
! && s390_symref_operand_p (x, NULL, NULL)
&& mode == Pmode
! && !s390_check_symref_alignment (x, 2))
sri->icode = ((mode == DImode) ? CODE_FOR_reloaddi_larl_odd_addend_z10
: CODE_FOR_reloadsi_larl_odd_addend_z10);
--- 2984,2999 ----
if (TARGET_Z10)
{
+ HOST_WIDE_INT offset;
+ rtx symref;
+
/* On z10 several optimizer steps may generate larl operands with
an odd addend. */
if (in_p
! && s390_symref_operand_p (x, &symref, &offset)
&& mode == Pmode
! && !SYMBOL_REF_ALIGN1_P (symref)
! && (offset & 1) == 1)
sri->icode = ((mode == DImode) ? CODE_FOR_reloaddi_larl_odd_addend_z10
: CODE_FOR_reloadsi_larl_odd_addend_z10);
++++++ s390-z10-bypasses ++++++
Index: gcc/config/s390/2097.md
===================================================================
*** gcc/config/s390/2097.md.orig
--- gcc/config/s390/2097.md
***************
*** 57,63 ****
z10_int_fr_A3"
"z10_other_super, z10_other_super_c_E1, z10_other_super_E1, \
z10_int_super, z10_int_super_E1, \
! z10_lr, z10_store_super")
; Forwarding from z10_super to frz10_ and z10_rec.
--- 57,64 ----
z10_int_fr_A3"
"z10_other_super, z10_other_super_c_E1, z10_other_super_E1, \
z10_int_super, z10_int_super_E1, \
! z10_lr, z10_store_super"
! " ! s390_agen_dep_p")
; Forwarding from z10_super to frz10_ and z10_rec.
***************
*** 68,74 ****
z10_store_super"
"z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
! z10_other_fr_E1, z10_store_rec")
; Forwarding from z10_fwd and z10_fr to z10_rec and z10_fr.
--- 69,76 ----
z10_store_super"
"z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
! z10_other_fr_E1, z10_store_rec"
! " ! s390_agen_dep_p")
; Forwarding from z10_fwd and z10_fr to z10_rec and z10_fr.
***************
*** 84,90 ****
z10_int_fr_A3"
"z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
! z10_other_fr_E1, z10_store_rec")
;
--- 86,93 ----
z10_int_fr_A3"
"z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
! z10_other_fr_E1, z10_store_rec"
! " ! s390_agen_dep_p")
;
***************
*** 205,219 ****
(and (eq_attr "type" "lr")
(eq_attr "z10prop" "z10_fr")))
"z10_e1_ANY, z10_Gate_ANY")
- ; "z10_e1_ANY")
(define_insn_reservation "z10_lr_fr_E1" 6
(and (eq_attr "cpu" "z10")
(and (eq_attr "type" "lr")
(eq_attr "z10prop" "z10_fr_E1")))
"z10_e1_ANY, z10_Gate_ANY")
- ; "z10_e1_ANY")
-
(define_insn_reservation "z10_la" 6
(and (eq_attr "cpu" "z10")
--- 208,219 ----
***************
*** 227,240 ****
(and (eq_attr "type" "la")
(eq_attr "z10prop" "z10_fwd")))
"z10_e1_ANY, z10_Gate_ANY")
- ; "z10_e1_ANY")
(define_insn_reservation "z10_la_fwd_A1" 6
(and (eq_attr "cpu" "z10")
(and (eq_attr "type" "la")
(eq_attr "z10prop" "z10_fwd_A1")))
"z10_e1_ANY, z10_Gate_ANY")
- ; "z10_e1_ANY")
; larl-type instructions
--- 227,238 ----
***************
*** 666,678 ****
; Address-related bypasses
;
! ; Here is the cycle diagram for Address-related bypasses:
; ... G1 G2 G3 A0 A1 A2 A3 E1 P1 P2 P3 R0 ...
! ; ^ ^ ^ ^ ^
! ; | | | | E1-type bypasses provide the new addr AFTER this cycle
! ; | | | A3-type bypasses provide the new addr AFTER this cycle
! ; | | A1-type bypasses provide the new addr AFTER this cycle
! ; | AGI resolution, actual USE of address is DURING this cycle
; AGI detection
(define_bypass 3 "z10_larl_A1, z10_la_fwd_A1, z10_other_fwd_A1, \
--- 664,677 ----
; Address-related bypasses
;
! ; Here is the cycle diagram for address-related bypasses:
; ... G1 G2 G3 A0 A1 A2 A3 E1 P1 P2 P3 R0 ...
! ; ^ ^ ^ ^ ^ ^
! ; | | | | | without bypass, its available AFTER this cycle
! ; | | | | E1-type bypasses provide the new value AFTER this cycle
! ; | | | A3-type bypasses provide the new value AFTER this cycle
! ; | | A1-type bypasses provide the new value AFTER this cycle
! ; | AGI resolution, actual USE of new value is DURING this cycle
; AGI detection
(define_bypass 3 "z10_larl_A1, z10_la_fwd_A1, z10_other_fwd_A1, \
***************
*** 682,688 ****
z10_cs, z10_stm, z10_other"
"s390_agen_dep_p")
-
(define_bypass 5 "z10_larl_fwd_A3, z10_load_fwd_A3, z10_other_fwd_A3, \
z10_other_fr_A3, z10_int_fwd_A3, z10_int_fr_A3"
"z10_agen, z10_la, z10_branch, z10_call, z10_load, \
--- 681,686 ----
***************
*** 697,702 ****
--- 695,706 ----
"z10_agen, z10_la, z10_branch, z10_call, z10_load, \
z10_store, \
z10_cs, z10_stm, z10_other"
+ "s390_agen_dep_p")
+
+ (define_bypass 9 "z10_int_super, z10_int_fwd, z10_int_fr"
+ "z10_agen, z10_la, z10_branch, z10_call, z10_load, \
+ z10_store, \
+ z10_cs, z10_stm, z10_other"
"s390_agen_dep_p")
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