Hello community,
here is the log from the commit of package xorg-x11-driver-video for openSUSE:Factory
checked in at Wed Mar 25 22:57:57 CET 2009.
--------
--- xorg-x11-driver-video/xorg-x11-driver-video.changes 2009-03-20 03:26:05.000000000 +0100
+++ xorg-x11-driver-video/xorg-x11-driver-video.changes 2009-03-20 22:27:52.957119109 +0100
@@ -1,0 +2,13 @@
+Fri Mar 20 22:17:45 CET 2009 - sndirsch@suse.de
+
+- xf86-video-nv.diff
+ * Remove xorgconfig & xorgcfg from See Also list in man page
+ * Add README with pointers to mailing list, bugzilla & git repos
+ * Add NV_/RIVA_ prefixes to fix build warnings.
+ * Build fix: set EXA_DRIVER_KNOWN_MAJOR=3
+ * Revert "Build fix: set EXA_DRIVER_KNOWN_MAJOR=3"
+ * Add missing pci id for GeForce 7100 GS
+- sax2/hwinfo-data:
+ * added GeForce 7100 GS as supported by nv driver
+
+-------------------------------------------------------------------
calling whatdependson for head-i586
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ xorg-x11-driver-video.spec ++++++
--- /var/tmp/diff_new_pack.x15840/_old 2009-03-25 22:54:33.000000000 +0100
+++ /var/tmp/diff_new_pack.x15840/_new 2009-03-25 22:54:33.000000000 +0100
@@ -22,7 +22,7 @@
BuildRequires: Mesa-devel libdrm-devel pkgconfig xorg-x11-proto-devel xorg-x11-server-sdk
Url: http://xorg.freedesktop.org/
Version: 7.4
-Release: 50
+Release: 51
License: X11/MIT
BuildRoot: %{_tmppath}/%{name}-%{version}-build
Group: System/X11/Servers/XF86_4
@@ -272,6 +272,16 @@
%changelog
* Fri Mar 20 2009 sndirsch@suse.de
+- xf86-video-nv.diff
+ * Remove xorgconfig & xorgcfg from See Also list in man page
+ * Add README with pointers to mailing list, bugzilla & git repos
+ * Add NV_/RIVA_ prefixes to fix build warnings.
+ * Build fix: set EXA_DRIVER_KNOWN_MAJOR=3
+ * Revert "Build fix: set EXA_DRIVER_KNOWN_MAJOR=3"
+ * Add missing pci id for GeForce 7100 GS
+- sax2/hwinfo-data:
+ * added GeForce 7100 GS as supported by nv driver
+* Fri Mar 20 2009 sndirsch@suse.de
- xf86-video-i740 1.3.0
* Uncomment DDC2 code, move it before mode validation so DDC has
some effect.
++++++ sax2-hwinfo-data.tar.gz ++++++
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/usr/share/sax/api/data/cdb/Cards.20.xorg-x11-driver-video new/usr/share/sax/api/data/cdb/Cards.20.xorg-x11-driver-video
--- old/usr/share/sax/api/data/cdb/Cards.20.xorg-x11-driver-video 2008-12-15 15:30:59.000000000 +0100
+++ new/usr/share/sax/api/data/cdb/Cards.20.xorg-x11-driver-video 2009-03-20 22:13:52.000000000 +0100
@@ -1,3 +1,6 @@
+NVidia: GeForce 7100 GS {
+ Driver = nv
+}
NVidia: GeForce 8600 GT {
Driver = nv
}
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/usr/share/sax/sysp/maps/update/Identity.map.20.xorg-x11-driver-video new/usr/share/sax/sysp/maps/update/Identity.map.20.xorg-x11-driver-video
--- old/usr/share/sax/sysp/maps/update/Identity.map.20.xorg-x11-driver-video 2009-01-12 18:01:08.000000000 +0100
+++ new/usr/share/sax/sysp/maps/update/Identity.map.20.xorg-x11-driver-video 2009-03-20 22:15:13.000000000 +0100
@@ -1,3 +1,4 @@
+NAME=NVidia&DEVICE=GeForce 7100 GS&VID=0x10de&DID=0x016A&SERVER=nv&EXT=&OPT=&RAW=&PROFILE=&SCRIPT3D=&PACKAGE3D=&FLAG=DEFAULT
NAME=NVidia&DEVICE=GeForce 8600 GT&VID=0x10de&DID=0x0401&SERVER=nv&EXT=&OPT=&RAW=&PROFILE=&SCRIPT3D=&PACKAGE3D=&FLAG=DEFAULT
NAME=NVidia&DEVICE=GeForce 8400 GS&VID=0x10de&DID=0x0424&SERVER=nv&EXT=&OPT=&RAW=&PROFILE=&SCRIPT3D=&PACKAGE3D=&FLAG=DEFAULT
NAME=NVidia&DEVICE=GeForce 8800 GT&VID=0x10de&DID=0x0602&SERVER=nv&EXT=&OPT=&RAW=&PROFILE=&SCRIPT3D=&PACKAGE3D=&FLAG=DEFAULT
diff -urN --exclude=CVS --exclude=.cvsignore --exclude=.svn --exclude=.svnignore old/var/lib/hardware/ids/20.xorg-x11-driver-video new/var/lib/hardware/ids/20.xorg-x11-driver-video
--- old/var/lib/hardware/ids/20.xorg-x11-driver-video 2008-12-15 15:31:36.000000000 +0100
+++ new/var/lib/hardware/ids/20.xorg-x11-driver-video 2009-03-20 22:16:05.000000000 +0100
@@ -1,4 +1,9 @@
vendor.id pci 0x10de
+&device.id pci 0x016a
++device.name GeForce 7100 GS
++driver.xfree 4|nv
+
+ vendor.id pci 0x10de
&device.id pci 0x0401
+device.name GeForce 8600 GT
+driver.xfree 4|nv
++++++ xf86-video-nv.diff ++++++
--- /var/tmp/diff_new_pack.x15840/_old 2009-03-25 22:54:35.000000000 +0100
+++ /var/tmp/diff_new_pack.x15840/_new 2009-03-25 22:54:35.000000000 +0100
@@ -152,3 +152,386 @@
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
" ... found one\n");
xf86PrintEDID( MonInfo );
+commit 302ffbefb880afb7e297c4a41ed3c106b7623fdb
+Author: Alan Coopersmith
+Date: Fri Jan 9 16:31:55 2009 -0800
+
+ Remove xorgconfig & xorgcfg from See Also list in man page
+
+diff --git a/man/nv.man b/man/nv.man
+index 2d559e6..e37782d 100644
+--- a/man/nv.man
++++ b/man/nv.man
+@@ -191,7 +191,7 @@ Default:
+ .\" ******************** end G80 section ********************
+ .
+ .SH "SEE ALSO"
+-__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__), xrandr(__appmansuffix__)
++__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__), xrandr(__appmansuffix__)
+ .SH AUTHORS
+ Authors include: David McKay, Jarno Paananen, Chas Inman, Dave Schmenk,
+ Mark Vojkovich, Aaron Plattner
+commit 3890a0aefc4c133999a10fad9d32745b635634ac
+Author: Alan Coopersmith
+Date: Fri Jan 30 20:43:04 2009 -0800
+
+ Add README with pointers to mailing list, bugzilla & git repos
+
+diff --git a/README b/README
+new file mode 100644
+index 0000000..b4442d1
+--- /dev/null
++++ b/README
+@@ -0,0 +1,20 @@
++xf86-video-nv - NVIDIA video driver for the Xorg X server
++
++Please submit bugs & patches to the Xorg bugzilla:
++
++ https://bugs.freedesktop.org/enter_bug.cgi?product=xorg
++
++All questions regarding this software should be directed at the
++Xorg mailing list:
++
++ http://lists.freedesktop.org/mailman/listinfo/xorg
++
++The master development code repository can be found at:
++
++ git://anongit.freedesktop.org/git/xorg/driver/xf86-video-nv
++
++ http://cgit.freedesktop.org/xorg/driver/xf86-video-nv
++
++For more information on the git code manager, see:
++
++ http://wiki.x.org/wiki/GitPage
+commit b9140a510efa49b36973d02f1e110d33d22e653d
+Author: Aaron Plattner
+Date: Tue Feb 3 13:28:07 2009 -0800
+
+ Add NV_/RIVA_ prefixes to fix build warnings.
+
+ xserver commit 5e0967f5 pollutes the namespace by adding a "SetBit" macro to
+ inputstr.h that conflicts with the preexisting ones in nv_type.h and
+ riva_type.h.
+
+diff --git a/src/nv_dac.c b/src/nv_dac.c
+index a256d0a..b6df107 100644
+--- a/src/nv_dac.c
++++ b/src/nv_dac.c
+@@ -118,58 +118,58 @@ NVDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
+ horizTotal += 2;
+ }
+
+- pVga->CRTC[0x0] = Set8Bits(horizTotal);
+- pVga->CRTC[0x1] = Set8Bits(horizDisplay);
+- pVga->CRTC[0x2] = Set8Bits(horizBlankStart);
+- pVga->CRTC[0x3] = SetBitField(horizBlankEnd,4:0,4:0)
+- | SetBit(7);
+- pVga->CRTC[0x4] = Set8Bits(horizStart);
+- pVga->CRTC[0x5] = SetBitField(horizBlankEnd,5:5,7:7)
+- | SetBitField(horizEnd,4:0,4:0);
+- pVga->CRTC[0x6] = SetBitField(vertTotal,7:0,7:0);
+- pVga->CRTC[0x7] = SetBitField(vertTotal,8:8,0:0)
+- | SetBitField(vertDisplay,8:8,1:1)
+- | SetBitField(vertStart,8:8,2:2)
+- | SetBitField(vertBlankStart,8:8,3:3)
+- | SetBit(4)
+- | SetBitField(vertTotal,9:9,5:5)
+- | SetBitField(vertDisplay,9:9,6:6)
+- | SetBitField(vertStart,9:9,7:7);
+- pVga->CRTC[0x9] = SetBitField(vertBlankStart,9:9,5:5)
+- | SetBit(6)
++ pVga->CRTC[0x0] = NV_Set8Bits(horizTotal);
++ pVga->CRTC[0x1] = NV_Set8Bits(horizDisplay);
++ pVga->CRTC[0x2] = NV_Set8Bits(horizBlankStart);
++ pVga->CRTC[0x3] = NV_SetBitField(horizBlankEnd,4:0,4:0)
++ | NV_SetBit(7);
++ pVga->CRTC[0x4] = NV_Set8Bits(horizStart);
++ pVga->CRTC[0x5] = NV_SetBitField(horizBlankEnd,5:5,7:7)
++ | NV_SetBitField(horizEnd,4:0,4:0);
++ pVga->CRTC[0x6] = NV_SetBitField(vertTotal,7:0,7:0);
++ pVga->CRTC[0x7] = NV_SetBitField(vertTotal,8:8,0:0)
++ | NV_SetBitField(vertDisplay,8:8,1:1)
++ | NV_SetBitField(vertStart,8:8,2:2)
++ | NV_SetBitField(vertBlankStart,8:8,3:3)
++ | NV_SetBit(4)
++ | NV_SetBitField(vertTotal,9:9,5:5)
++ | NV_SetBitField(vertDisplay,9:9,6:6)
++ | NV_SetBitField(vertStart,9:9,7:7);
++ pVga->CRTC[0x9] = NV_SetBitField(vertBlankStart,9:9,5:5)
++ | NV_SetBit(6)
+ | ((mode->Flags & V_DBLSCAN) ? 0x80 : 0x00);
+- pVga->CRTC[0x10] = Set8Bits(vertStart);
+- pVga->CRTC[0x11] = SetBitField(vertEnd,3:0,3:0) | SetBit(5);
+- pVga->CRTC[0x12] = Set8Bits(vertDisplay);
++ pVga->CRTC[0x10] = NV_Set8Bits(vertStart);
++ pVga->CRTC[0x11] = NV_SetBitField(vertEnd,3:0,3:0) | NV_SetBit(5);
++ pVga->CRTC[0x12] = NV_Set8Bits(vertDisplay);
+ pVga->CRTC[0x13] = ((pLayout->displayWidth/8)*(pLayout->bitsPerPixel/8));
+- pVga->CRTC[0x15] = Set8Bits(vertBlankStart);
+- pVga->CRTC[0x16] = Set8Bits(vertBlankEnd);
++ pVga->CRTC[0x15] = NV_Set8Bits(vertBlankStart);
++ pVga->CRTC[0x16] = NV_Set8Bits(vertBlankEnd);
+
+ pVga->Attribute[0x10] = 0x01;
+
+ if(pNv->Television)
+ pVga->Attribute[0x11] = 0x00;
+
+- nvReg->screen = SetBitField(horizBlankEnd,6:6,4:4)
+- | SetBitField(vertBlankStart,10:10,3:3)
+- | SetBitField(vertStart,10:10,2:2)
+- | SetBitField(vertDisplay,10:10,1:1)
+- | SetBitField(vertTotal,10:10,0:0);
++ nvReg->screen = NV_SetBitField(horizBlankEnd,6:6,4:4)
++ | NV_SetBitField(vertBlankStart,10:10,3:3)
++ | NV_SetBitField(vertStart,10:10,2:2)
++ | NV_SetBitField(vertDisplay,10:10,1:1)
++ | NV_SetBitField(vertTotal,10:10,0:0);
+
+- nvReg->horiz = SetBitField(horizTotal,8:8,0:0)
+- | SetBitField(horizDisplay,8:8,1:1)
+- | SetBitField(horizBlankStart,8:8,2:2)
+- | SetBitField(horizStart,8:8,3:3);
++ nvReg->horiz = NV_SetBitField(horizTotal,8:8,0:0)
++ | NV_SetBitField(horizDisplay,8:8,1:1)
++ | NV_SetBitField(horizBlankStart,8:8,2:2)
++ | NV_SetBitField(horizStart,8:8,3:3);
+
+- nvReg->extra = SetBitField(vertTotal,11:11,0:0)
+- | SetBitField(vertDisplay,11:11,2:2)
+- | SetBitField(vertStart,11:11,4:4)
+- | SetBitField(vertBlankStart,11:11,6:6);
++ nvReg->extra = NV_SetBitField(vertTotal,11:11,0:0)
++ | NV_SetBitField(vertDisplay,11:11,2:2)
++ | NV_SetBitField(vertStart,11:11,4:4)
++ | NV_SetBitField(vertBlankStart,11:11,6:6);
+
+ if(mode->Flags & V_INTERLACE) {
+ horizTotal = (horizTotal >> 1) & ~1;
+- nvReg->interlace = Set8Bits(horizTotal);
+- nvReg->horiz |= SetBitField(horizTotal,8:8,4:4);
++ nvReg->interlace = NV_Set8Bits(horizTotal);
++ nvReg->horiz |= NV_SetBitField(horizTotal,8:8,4:4);
+ } else {
+ nvReg->interlace = 0xff; /* interlace off */
+ }
+diff --git a/src/nv_type.h b/src/nv_type.h
+index 2710c5a..8ebb9a8 100644
+--- a/src/nv_type.h
++++ b/src/nv_type.h
+@@ -14,13 +14,13 @@
+ #define NV_ARCH_40 0x40
+
+
+-#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
+-#define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
+-#define SetBF(mask,value) ((value) << (0?mask))
+-#define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
+-#define SetBitField(value,from,to) SetBF(to, GetBF(value,from))
+-#define SetBit(n) (1<<(n))
+-#define Set8Bits(value) ((value)&0xff)
++#define NV_BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
++#define NV_MASKEXPAND(mask) NV_BITMASK(1?mask,0?mask)
++#define NV_SetBF(mask,value) ((value) << (0?mask))
++#define NV_GetBF(var,mask) (((unsigned)((var) & NV_MASKEXPAND(mask))) >> (0?mask) )
++#define NV_SetBitField(value,from,to) NV_SetBF(to, NV_GetBF(value,from))
++#define NV_SetBit(n) (1<<(n))
++#define NV_Set8Bits(value) ((value)&0xff)
+
+ typedef struct {
+ int bitsPerPixel;
+diff --git a/src/riva_dac.c b/src/riva_dac.c
+index 6e9f346..9b7b518 100644
+--- a/src/riva_dac.c
++++ b/src/riva_dac.c
+@@ -67,55 +67,55 @@ RivaDACInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
+ if(mode->Flags & V_INTERLACE)
+ vertTotal |= 1;
+
+- pVga->CRTC[0x0] = Set8Bits(horizTotal);
+- pVga->CRTC[0x1] = Set8Bits(horizDisplay);
+- pVga->CRTC[0x2] = Set8Bits(horizBlankStart);
+- pVga->CRTC[0x3] = SetBitField(horizBlankEnd,4:0,4:0)
+- | SetBit(7);
+- pVga->CRTC[0x4] = Set8Bits(horizStart);
+- pVga->CRTC[0x5] = SetBitField(horizBlankEnd,5:5,7:7)
+- | SetBitField(horizEnd,4:0,4:0);
+- pVga->CRTC[0x6] = SetBitField(vertTotal,7:0,7:0);
+- pVga->CRTC[0x7] = SetBitField(vertTotal,8:8,0:0)
+- | SetBitField(vertDisplay,8:8,1:1)
+- | SetBitField(vertStart,8:8,2:2)
+- | SetBitField(vertBlankStart,8:8,3:3)
+- | SetBit(4)
+- | SetBitField(vertTotal,9:9,5:5)
+- | SetBitField(vertDisplay,9:9,6:6)
+- | SetBitField(vertStart,9:9,7:7);
+- pVga->CRTC[0x9] = SetBitField(vertBlankStart,9:9,5:5)
+- | SetBit(6)
++ pVga->CRTC[0x0] = RIVA_Set8Bits(horizTotal);
++ pVga->CRTC[0x1] = RIVA_Set8Bits(horizDisplay);
++ pVga->CRTC[0x2] = RIVA_Set8Bits(horizBlankStart);
++ pVga->CRTC[0x3] = RIVA_SetBitField(horizBlankEnd,4:0,4:0)
++ | RIVA_SetBit(7);
++ pVga->CRTC[0x4] = RIVA_Set8Bits(horizStart);
++ pVga->CRTC[0x5] = RIVA_SetBitField(horizBlankEnd,5:5,7:7)
++ | RIVA_SetBitField(horizEnd,4:0,4:0);
++ pVga->CRTC[0x6] = RIVA_SetBitField(vertTotal,7:0,7:0);
++ pVga->CRTC[0x7] = RIVA_SetBitField(vertTotal,8:8,0:0)
++ | RIVA_SetBitField(vertDisplay,8:8,1:1)
++ | RIVA_SetBitField(vertStart,8:8,2:2)
++ | RIVA_SetBitField(vertBlankStart,8:8,3:3)
++ | RIVA_SetBit(4)
++ | RIVA_SetBitField(vertTotal,9:9,5:5)
++ | RIVA_SetBitField(vertDisplay,9:9,6:6)
++ | RIVA_SetBitField(vertStart,9:9,7:7);
++ pVga->CRTC[0x9] = RIVA_SetBitField(vertBlankStart,9:9,5:5)
++ | RIVA_SetBit(6)
+ | ((mode->Flags & V_DBLSCAN) ? 0x80 : 0x00);
+- pVga->CRTC[0x10] = Set8Bits(vertStart);
+- pVga->CRTC[0x11] = SetBitField(vertEnd,3:0,3:0) | SetBit(5);
+- pVga->CRTC[0x12] = Set8Bits(vertDisplay);
++ pVga->CRTC[0x10] = RIVA_Set8Bits(vertStart);
++ pVga->CRTC[0x11] = RIVA_SetBitField(vertEnd,3:0,3:0) | RIVA_SetBit(5);
++ pVga->CRTC[0x12] = RIVA_Set8Bits(vertDisplay);
+ pVga->CRTC[0x13] = ((pLayout->displayWidth/8)*(pLayout->bitsPerPixel/8));
+- pVga->CRTC[0x15] = Set8Bits(vertBlankStart);
+- pVga->CRTC[0x16] = Set8Bits(vertBlankEnd);
++ pVga->CRTC[0x15] = RIVA_Set8Bits(vertBlankStart);
++ pVga->CRTC[0x16] = RIVA_Set8Bits(vertBlankEnd);
+
+ pVga->Attribute[0x10] = 0x01;
+
+- rivaReg->screen = SetBitField(horizBlankEnd,6:6,4:4)
+- | SetBitField(vertBlankStart,10:10,3:3)
+- | SetBitField(vertStart,10:10,2:2)
+- | SetBitField(vertDisplay,10:10,1:1)
+- | SetBitField(vertTotal,10:10,0:0);
++ rivaReg->screen = RIVA_SetBitField(horizBlankEnd,6:6,4:4)
++ | RIVA_SetBitField(vertBlankStart,10:10,3:3)
++ | RIVA_SetBitField(vertStart,10:10,2:2)
++ | RIVA_SetBitField(vertDisplay,10:10,1:1)
++ | RIVA_SetBitField(vertTotal,10:10,0:0);
+
+- rivaReg->horiz = SetBitField(horizTotal,8:8,0:0)
+- | SetBitField(horizDisplay,8:8,1:1)
+- | SetBitField(horizBlankStart,8:8,2:2)
+- | SetBitField(horizStart,8:8,3:3);
++ rivaReg->horiz = RIVA_SetBitField(horizTotal,8:8,0:0)
++ | RIVA_SetBitField(horizDisplay,8:8,1:1)
++ | RIVA_SetBitField(horizBlankStart,8:8,2:2)
++ | RIVA_SetBitField(horizStart,8:8,3:3);
+
+- rivaReg->extra = SetBitField(vertTotal,11:11,0:0)
+- | SetBitField(vertDisplay,11:11,2:2)
+- | SetBitField(vertStart,11:11,4:4)
+- | SetBitField(vertBlankStart,11:11,6:6);
++ rivaReg->extra = RIVA_SetBitField(vertTotal,11:11,0:0)
++ | RIVA_SetBitField(vertDisplay,11:11,2:2)
++ | RIVA_SetBitField(vertStart,11:11,4:4)
++ | RIVA_SetBitField(vertBlankStart,11:11,6:6);
+
+ if(mode->Flags & V_INTERLACE) {
+ horizTotal = (horizTotal >> 1) & ~1;
+- rivaReg->interlace = Set8Bits(horizTotal);
+- rivaReg->horiz |= SetBitField(horizTotal,8:8,4:4);
++ rivaReg->interlace = RIVA_Set8Bits(horizTotal);
++ rivaReg->horiz |= RIVA_SetBitField(horizTotal,8:8,4:4);
+ } else {
+ rivaReg->interlace = 0xff; /* interlace off */
+ }
+diff --git a/src/riva_type.h b/src/riva_type.h
+index e9448e6..5a1317f 100644
+--- a/src/riva_type.h
++++ b/src/riva_type.h
+@@ -9,13 +9,13 @@
+ #include "xf86int10.h"
+
+
+-#define BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
+-#define MASKEXPAND(mask) BITMASK(1?mask,0?mask)
+-#define SetBF(mask,value) ((value) << (0?mask))
+-#define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
+-#define SetBitField(value,from,to) SetBF(to, GetBF(value,from))
+-#define SetBit(n) (1<<(n))
+-#define Set8Bits(value) ((value)&0xff)
++#define RIVA_BITMASK(t,b) (((unsigned)(1U << (((t)-(b)+1)))-1) << (b))
++#define RIVA_MASKEXPAND(mask) RIVA_BITMASK(1?mask,0?mask)
++#define RIVA_SetBF(mask,value) ((value) << (0?mask))
++#define RIVA_GetBF(var,mask) (((unsigned)((var) & RIVA_MASKEXPAND(mask))) >> (0?mask) )
++#define RIVA_SetBitField(value,from,to) RIVA_SetBF(to, RIVA_GetBF(value,from))
++#define RIVA_SetBit(n) (1<<(n))
++#define RIVA_Set8Bits(value) ((value)&0xff)
+
+ typedef RIVA_HW_STATE* RivaRegPtr;
+
+commit 492513bf047f7660ef9fd32fda7ebc28704079be
+Author: Chris Ball
+Date: Tue Feb 24 23:44:47 2009 -0500
+
+ Build fix: set EXA_DRIVER_KNOWN_MAJOR=3
+
+ EXA in server HEAD requires this now. Since this driver doesn't
+ use {Prepare,Finish}Access or UploadToScratch, the change is safe.
+
+ Signed-off-by: Chris Ball
+
+diff --git a/configure.ac b/configure.ac
+index c87b553..795dd4b 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -74,6 +74,9 @@ CFLAGS="$XORG_CFLAGS"
+ # RandR 1.2
+ AC_CHECK_HEADER(xf86Modes.h,[BUILD_XMODES=no],[BUILD_XMODES=yes],[#include "xorg-server.h"])
+
++# Required by exa.h
++AC_DEFINE(EXA_DRIVER_KNOWN_MAJOR, 3, [Major version of EXA we can handle])
++
+ # PCI rework
+ AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
+ [XSERVER_LIBPCIACCESS=yes],[XSERVER_LIBPCIACCESS=no],
+commit 74758ef3b184a37d211572d0deb826bd30d0de13
+Author: Chris Ball
+Date: Fri Feb 27 10:55:11 2009 -0500
+
+ Revert "Build fix: set EXA_DRIVER_KNOWN_MAJOR=3"
+
+ This reverts commit 492513bf047f7660ef9fd32fda7ebc28704079be.
+ The EXA developers have backed out this ABI bump.
+
+ Signed-off-by: Chris Ball
+
+diff --git a/configure.ac b/configure.ac
+index 795dd4b..c87b553 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -74,9 +74,6 @@ CFLAGS="$XORG_CFLAGS"
+ # RandR 1.2
+ AC_CHECK_HEADER(xf86Modes.h,[BUILD_XMODES=no],[BUILD_XMODES=yes],[#include "xorg-server.h"])
+
+-# Required by exa.h
+-AC_DEFINE(EXA_DRIVER_KNOWN_MAJOR, 3, [Major version of EXA we can handle])
+-
+ # PCI rework
+ AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
+ [XSERVER_LIBPCIACCESS=yes],[XSERVER_LIBPCIACCESS=no],
+commit b278aca7d7b92b7fd62045d1aab44d78f694d608
+Author: Bryce Harrington
+Date: Thu Mar 12 16:56:57 2009 -0700
+
+ Add missing pci id for GeForce 7100 GS
+
+ Signed-off-by: Bryce Harrington
+ Signed-off-by: Aaron Plattner
+
+diff --git a/src/nv_driver.c b/src/nv_driver.c
+index faf73a9..20f96fb 100644
+--- a/src/nv_driver.c
++++ b/src/nv_driver.c
+@@ -303,6 +303,7 @@ static SymTabRec NVKnownChipsets[] =
+ { 0x10DE0167, "GeForce Go 6200" },
+ { 0x10DE0168, "GeForce Go 6400" },
+ { 0x10DE0169, "GeForce 6250" },
++ { 0x10DE016A, "GeForce 7100 GS" },
+
+ { 0x10DE0211, "GeForce 6800" },
+ { 0x10DE0212, "GeForce 6800 LE" },
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