Mailinglist Archive: opensuse-commit (1159 mails)
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commit gcc42
- From: root@xxxxxxxxxxxxxxx (h_root)
- Date: Fri, 05 Oct 2007 16:13:46 +0200
- Message-id: <20071005141347.3A91F678182@xxxxxxxxxxxxxxx>
Hello community,
here is the log from the commit of package gcc42
checked in at Fri Oct 5 16:13:46 CEST 2007.
--------
--- gcc42/cross-alpha-gcc-icecream-backend.changes 2007-09-21 18:07:25.000000000 +0200
+++ /mounts/work_src_done/STABLE/gcc42/cross-alpha-gcc-icecream-backend.changes 2007-10-01 15:10:32.000000000 +0200
@@ -1,0 +2,13 @@
+Mon Oct 1 14:46:16 CEST 2007 - rguenther@xxxxxxx
+
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+
+-------------------------------------------------------------------
+Mon Oct 01 13:45:48 CEST 2007 - matz@xxxxxxx
+
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
+
+-------------------------------------------------------------------
cross-arm-gcc-icecream-backend.changes: same change
cross-avr-gcc42.changes: same change
cross-hppa-gcc-icecream-backend.changes: same change
cross-i386-gcc-icecream-backend.changes: same change
cross-ia64-gcc-icecream-backend.changes: same change
cross-ppc64-gcc-icecream-backend.changes: same change
cross-ppc-gcc-icecream-backend.changes: same change
cross-s390-gcc-icecream-backend.changes: same change
cross-s390x-gcc-icecream-backend.changes: same change
cross-x86_64-gcc-icecream-backend.changes: same change
gcc42.changes: same change
libgcj42.changes: same change
Old:
----
gcc-4.2.1-20070724.tar.bz2
ld-version.diff
pr33148.diff
New:
----
amdfam10-cvt1.diff
amdfam10-cvt2.diff
gcc-4.2.2-20071001.tar.bz2
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ cross-alpha-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:24.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:24.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-alpha-gcc-icecream-backend (Version 4.2.1_20070724)
+# spec file for package cross-alpha-gcc-icecream-backend (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -28,9 +28,9 @@
# COMMON-BEGIN
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
-License: BSD 3-Clause, GPL v2 or later
-Version: 4.2.1_20070724
-Release: 14
+License: BSD 3-Clause; GPL v2 or later; LGPL v2 or later; X11/MIT
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -57,8 +57,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -74,6 +72,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -126,8 +126,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -144,6 +142,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -225,6 +225,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -340,6 +343,13 @@
%defattr(-,root,root)
/usr/share/icecream-envs
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
cross-arm-gcc-icecream-backend.spec: same change
++++++ cross-avr-gcc42.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:24.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:24.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-avr-gcc42 (Version 4.2.1_20070724)
+# spec file for package cross-avr-gcc42 (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -25,9 +25,9 @@
# COMMON-BEGIN
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
-License: BSD 3-Clause, GPL v2 or later
-Version: 4.2.1_20070724
-Release: 16
+License: BSD 3-Clause; GPL v2 or later; LGPL v2 or later; X11/MIT
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -54,8 +54,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -71,6 +69,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -120,8 +120,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -138,6 +136,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -219,6 +219,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -303,6 +306,13 @@
%defattr(-,root,root)
%{_prefix}
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
++++++ cross-hppa-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:24.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:24.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-hppa-gcc-icecream-backend (Version 4.2.1_20070724)
+# spec file for package cross-hppa-gcc-icecream-backend (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -28,9 +28,9 @@
# COMMON-BEGIN
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
-License: BSD 3-Clause, GPL v2 or later
-Version: 4.2.1_20070724
-Release: 15
+License: BSD 3-Clause; GPL v2 or later; LGPL v2 or later; X11/MIT
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -57,8 +57,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -74,6 +72,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -126,8 +126,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -144,6 +142,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -225,6 +225,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -340,6 +343,13 @@
%defattr(-,root,root)
/usr/share/icecream-envs
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
++++++ cross-i386-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:24.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:24.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-i386-gcc-icecream-backend (Version 4.2.1_20070724)
+# spec file for package cross-i386-gcc-icecream-backend (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -28,9 +28,9 @@
# COMMON-BEGIN
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
-License: BSD 3-Clause, GPL v2 or later
-Version: 4.2.1_20070724
-Release: 14
+License: BSD 3-Clause; GPL v2 or later; LGPL v2 or later; X11/MIT
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -57,8 +57,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -74,6 +72,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -126,8 +126,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -144,6 +142,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -225,6 +225,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -340,6 +343,13 @@
%defattr(-,root,root)
/usr/share/icecream-envs
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
cross-ia64-gcc-icecream-backend.spec: same change
cross-ppc64-gcc-icecream-backend.spec: same change
cross-ppc-gcc-icecream-backend.spec: same change
cross-s390-gcc-icecream-backend.spec: same change
cross-s390x-gcc-icecream-backend.spec: same change
++++++ cross-x86_64-gcc-icecream-backend.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:25.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:25.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package cross-x86_64-gcc-icecream-backend (Version 4.2.1_20070724)
+# spec file for package cross-x86_64-gcc-icecream-backend (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -28,9 +28,9 @@
# COMMON-BEGIN
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
-License: BSD 3-Clause, GPL v2 or later
-Version: 4.2.1_20070724
-Release: 15
+License: BSD 3-Clause; GPL v2 or later; LGPL v2 or later; X11/MIT
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -57,8 +57,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -74,6 +72,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -126,8 +126,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -144,6 +142,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -225,6 +225,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -340,6 +343,13 @@
%defattr(-,root,root)
/usr/share/icecream-envs
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
++++++ gcc42.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:25.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:25.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package gcc42 (Version 4.2.1_20070724)
+# spec file for package gcc42 (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -44,7 +44,7 @@
%endif
BuildRequires: bison flex gettext-devel glibc-devel-32bit perl texinfo zlib-devel
%if %{build_ada}
-BuildRequires: gcc-ada
+BuildRequires: gcc-ada gcc42-ada
%endif
%if %{build_libjava}
BuildRequires: fastjar gtk2-devel libart_lgpl-devel unzip update-desktop-files
@@ -102,8 +102,8 @@
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
License: GPL v2 or later
-Version: 4.2.1_20070724
-Release: 16
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -137,8 +137,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -154,6 +152,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -1223,8 +1223,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -1241,6 +1239,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -1322,6 +1322,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -2126,6 +2129,13 @@
%doc testresults/*.log
%endif
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
++++++ libgcj42.spec ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:25.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:25.000000000 +0200
@@ -1,5 +1,5 @@
#
-# spec file for package libgcj42 (Version 4.2.1_20070724)
+# spec file for package libgcj42 (Version 4.2.2_20071001)
#
# Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany.
# This file and all modifications and additions to the pristine
@@ -56,7 +56,7 @@
%endif
BuildRequires: bison flex gettext-devel glibc-devel-32bit perl texinfo zlib-devel
%if %{build_ada}
-BuildRequires: gcc-ada
+BuildRequires: gcc-ada gcc42-ada
%endif
%if %{build_libjava}
BuildRequires: fastjar gtk2-devel libart_lgpl-devel unzip update-desktop-files
@@ -113,9 +113,9 @@
# COMMON-BEGIN
%define biarch_targets x86_64 s390x powerpc64 powerpc
Url: http://gcc.gnu.org/
-License: GPL v2 or later, LGPL v2 or later
-Version: 4.2.1_20070724
-Release: 25
+License: GPL v2 or later; LGPL v2 or later
+Version: 4.2.2_20071001
+Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
%define binsuffix -4.2
@@ -149,8 +149,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -166,6 +164,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -511,8 +511,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -529,6 +527,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -610,6 +610,9 @@
# --with-sysroot=/
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
@@ -999,6 +1002,13 @@
%doc testresults/*.log
%endif
%changelog
+* Mon Oct 01 2007 - rguenther@xxxxxxx
+- Update to suse-gcc-4_2-branch head (r128904).
+- Drop patch for PR33148.
+- Merge from gcc-4_2-branch head, parts of GCC 4.2.2 are GPLv3 or later.
+* Mon Oct 01 2007 - matz@xxxxxxx
+- Add more AMDFAM10h patches (using vector converts, detecting fam10
+ with -mtune=native, increase preferred loop alignment).
* Fri Sep 21 2007 - rguenther@xxxxxxx
- Fix linker version detection, re-enables COMDAT support.
- Add patch for PR33381, PR33099. [#300410]
++++++ amdfam10-allpatch.diff ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:25.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:25.000000000 +0200
@@ -2595,13 +2595,6 @@
===================================================================
--- gcc/config/i386/sse.md.orig
+++ gcc/config/i386/sse.md
-@@ -1,5 +1,5 @@
- ;; GCC machine description for SSE instructions
--;; Copyright (C) 2005, 2006
-+;; Copyright (C) 2005, 2006, 2007
- ;; Free Software Foundation, Inc.
- ;;
- ;; This file is part of GCC.
@@ -930,6 +930,7 @@
"cvtsi2ss\t{%2, %0|%0, %2}"
[(set_attr "type" "sseicvt")
@@ -2869,14 +2862,6 @@
===================================================================
--- gcc/config/i386/i386.opt.orig
+++ gcc/config/i386/i386.opt
-@@ -1,6 +1,6 @@
- ; Options for the IA-32 and AMD64 ports of the compiler.
-
--; Copyright (C) 2005 Free Software Foundation, Inc.
-+; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
- ;
- ; This file is part of GCC.
- ;
@@ -201,6 +201,22 @@ mssse3
Target Report Mask(SSSE3)
Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
++++++ amdfam10-cvt1.diff ++++++
Index: gcc-4.2.1-20070724/gcc/config/i386/i386.c
===================================================================
--- gcc-4.2.1-20070724.orig/gcc/config/i386/i386.c
+++ gcc-4.2.1-20070724/gcc/config/i386/i386.c
@@ -956,6 +956,9 @@ const int x86_cmpxchg16b = m_NOCONA;
const int x86_xadd = ~m_386;
const int x86_pad_returns = m_ATHLON_K8_AMDFAM10 | m_GENERIC;
+/* Use Vector Converts instead of Scalar Converts. Added for AMDFAM10 */
+const int x86_use_vector_converts = m_AMDFAM10;
+
/* In case the average insn count for single function invocation is
lower than this constant, emit fast (but longer) prologue and
epilogue code. */
Index: gcc-4.2.1-20070724/gcc/config/i386/i386.h
===================================================================
--- gcc-4.2.1-20070724.orig/gcc/config/i386/i386.h
+++ gcc-4.2.1-20070724/gcc/config/i386/i386.h
@@ -168,6 +168,7 @@ extern const int x86_use_incdec;
extern const int x86_pad_returns;
extern const int x86_partial_flag_reg_stall;
extern int x86_prefetch_sse;
+extern const int x86_use_vector_converts;
#define TARGET_USE_LEAVE (x86_use_leave & TUNEMASK)
#define TARGET_PUSH_MEMORY (x86_push_memory & TUNEMASK)
@@ -216,6 +217,7 @@ extern int x86_prefetch_sse;
#define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & TUNEMASK)
#define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & TUNEMASK)
#define TARGET_PREFETCH_SSE (x86_prefetch_sse)
+#define TARGET_USE_VECTOR_CONVERTS (x86_use_vector_converts & TUNEMASK)
#define TARGET_SHIFT1 (x86_shift1 & TUNEMASK)
#define TARGET_USE_FFREEP (x86_use_ffreep & TUNEMASK)
#define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & TUNEMASK)
Index: gcc-4.2.1-20070724/gcc/config/i386/i386.md
===================================================================
--- gcc-4.2.1-20070724.orig/gcc/config/i386/i386.md
+++ gcc-4.2.1-20070724/gcc/config/i386/i386.md
@@ -159,6 +159,12 @@
(UNSPEC_EXTRQ 131)
(UNSPEC_INSERTQI 132)
(UNSPEC_INSERTQ 133)
+
+ ; Other AMDFAM10 Patterns
+ (UNSPEC_CVTSI2SS_AMDFAM10 140)
+ (UNSPEC_CVTSI2SD_AMDFAM10 141)
+ (UNSPEC_MOVDSI2SF_AMDFAM10 142)
+ (UNSPEC_MOVDSI2DF_AMDFAM10 143)
])
(define_constants
@@ -4498,7 +4504,46 @@
[(set (match_operand:SF 0 "register_operand" "")
(float:SF (match_operand:SI 1 "nonimmediate_operand" "")))]
"TARGET_80387 || TARGET_SSE_MATH"
- "")
+ "
+ {
+ /* For converting SI to SF, the following code is faster in AMDFAM10
+ mov reg32, mem32
+ movd mem32, xmm
+ cvtdq2ps xmm,xmm
+ */
+
+ if (TARGET_USE_VECTOR_CONVERTS && !optimize_size
+ && (GET_CODE (operands[1]) != MEM) && TARGET_SSE_MATH
+ && optimize )
+ {
+ rtx tmp;
+ tmp = assign_386_stack_local (SImode, SLOT_TEMP);
+ emit_move_insn (tmp, operands[1]);
+ emit_insn (gen_sse2_movdsi2sf_amdfam10 (operands[0], tmp));
+ emit_insn (gen_sse2_cvtdq2ps_amdfam10 (operands[0], operands[0]));
+ DONE;
+ }
+ }
+ ")
+
+(define_insn "sse2_cvtdq2ps_amdfam10"
+ [(set (match_operand:SF 0 "register_operand" "=x")
+ (unspec:SF [(match_operand:SF 1 "register_operand" "x")]
+ UNSPEC_CVTSI2SS_AMDFAM10))]
+ "TARGET_SSE2 && TARGET_USE_VECTOR_CONVERTS"
+ "cvtdq2ps\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "V4SF")])
+
+(define_insn "sse2_movdsi2sf_amdfam10"
+ [(set (match_operand:SF 0 "register_operand" "=x")
+ (unspec:SF [(match_operand:SI 1 "memory_operand" "m")]
+ UNSPEC_MOVDSI2SF_AMDFAM10))]
+ "TARGET_SSE2 && TARGET_USE_VECTOR_CONVERTS"
+ "movd\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "SF")])
+
(define_insn "*floatsisf2_mixed"
[(set (match_operand:SF 0 "register_operand" "=f,?f,x,x")
@@ -4613,7 +4658,45 @@
[(set (match_operand:DF 0 "register_operand" "")
(float:DF (match_operand:SI 1 "nonimmediate_operand" "")))]
"TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
- "")
+ "
+ {
+ /* For converting SI to DF, the following code is faster in AMDFAM10
+ mov reg32, mem32
+ movd mem32, xmm
+ cvtdq2pd xmm,xmm
+ */
+
+ if (TARGET_USE_VECTOR_CONVERTS && !optimize_size
+ && (GET_CODE (operands[1]) != MEM) && TARGET_SSE_MATH
+ && optimize)
+ {
+ rtx tmp;
+ tmp = assign_386_stack_local (SImode, SLOT_TEMP);
+ emit_move_insn (tmp, operands[1]);
+ emit_insn (gen_sse2_movdsi2df_amdfam10 (operands[0], tmp));
+ emit_insn (gen_sse2_cvtdq2pd_amdfam10 (operands[0], operands[0]));
+ DONE;
+ }
+ }
+ ")
+
+(define_insn "sse2_cvtdq2pd_amdfam10"
+ [(set (match_operand:DF 0 "register_operand" "=Y")
+ (unspec:DF [(match_operand:DF 1 "register_operand" "Y")]
+ UNSPEC_CVTSI2SD_AMDFAM10))]
+ "TARGET_SSE2 && TARGET_USE_VECTOR_CONVERTS"
+ "cvtdq2pd\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "DF")])
+
+(define_insn "sse2_movdsi2df_amdfam10"
+ [(set (match_operand:DF 0 "register_operand" "=Y")
+ (unspec:DF [(match_operand:SI 1 "memory_operand" "m")]
+ UNSPEC_MOVDSI2DF_AMDFAM10))]
+ "TARGET_SSE2 && TARGET_USE_VECTOR_CONVERTS"
+ "movd\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "SF")])
(define_insn "*floatsidf2_mixed"
[(set (match_operand:DF 0 "register_operand" "=f,?f,Y,Y")
++++++ amdfam10-cvt2.diff ++++++
Index: gcc-4.2.1-20070724/gcc/config/i386/i386.md
===================================================================
--- gcc-4.2.1-20070724.orig/gcc/config/i386/i386.md
+++ gcc-4.2.1-20070724/gcc/config/i386/i386.md
@@ -165,6 +165,10 @@
(UNSPEC_CVTSI2SD_AMDFAM10 141)
(UNSPEC_MOVDSI2SF_AMDFAM10 142)
(UNSPEC_MOVDSI2DF_AMDFAM10 143)
+ (UNSPEC_UNPCKLPS_AMDFAM10 144)
+ (UNSPEC_UNPCKLPD_AMDFAM10 145)
+ (UNSPEC_CVTPS2PD_AMDFAM10 146)
+ (UNSPEC_CVTPD2PS_AMDFAM10 147)
])
(define_constants
@@ -3564,10 +3568,43 @@
}
operands[1] = validize_mem (force_const_mem (SFmode, operands[1]));
}
+
+ if (TARGET_USE_VECTOR_CONVERTS && !optimize_size
+ && (GET_CODE (operands[1]) != MEM) && (GET_CODE (operands[0]) != MEM)
+ && TARGET_SSE_MATH && optimize)
+ {
+ /* For converting SF(xmm2) to DF(xmm1), the following code is faster
+ in AMDFAM10 instead of using cvtss2sd
+ unpcklps xmm2,xmm2
+ cvtps2pd xmm2,xmm1
+ */
+ emit_insn (gen_sse_unpcklps_amdfam10 (operands[1], operands[1]));
+ emit_insn (gen_sse2_cvtps2pd_amdfam10 (operands[0], operands[1]));
+ DONE;
+ }
+
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
operands[1] = force_reg (SFmode, operands[1]);
})
+(define_insn "sse_unpcklps_amdfam10"
+ [(set (match_operand:SF 0 "register_operand" "=Y")
+ (unspec:SF [(match_operand: SF 1 "register_operand" "0")]
+ UNSPEC_UNPCKLPS_AMDFAM10))]
+ "TARGET_USE_VECTOR_CONVERTS && TARGET_SSE"
+ "unpcklps\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "V4SF")])
+
+(define_insn "sse2_cvtps2pd_amdfam10"
+ [(set (match_operand:DF 0 "register_operand" "=Y")
+ (unspec:DF [(match_operand: SF 1 "register_operand" "Y")]
+ UNSPEC_CVTPS2PD_AMDFAM10))]
+ "TARGET_USE_VECTOR_CONVERTS && TARGET_SSE2"
+ "cvtps2pd\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "V2DF")])
+
(define_insn "*extendsfdf2_mixed"
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,Y")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f,mY")))]
@@ -3738,6 +3775,20 @@
(match_operand:DF 1 "nonimmediate_operand" "")))]
"TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
{
+ if (TARGET_USE_VECTOR_CONVERTS && !optimize_size
+ && (GET_CODE (operands[1]) != MEM) && (GET_CODE (operands[0]) != MEM)
+ && TARGET_SSE_MATH && optimize)
+ {
+ /* For converting DF(xmm1) to SF(xmm2), the following code is faster
+ in AMDFAM10 instead of using cvtsd2ss
+ unpcklpd xmm2,xmm2
+ cvtpd2ps xmm2,xmm1
+ */
+ emit_insn (gen_sse_unpcklpd_amdfam10 (operands[1], operands[1]));
+ emit_insn (gen_sse2_cvtpd2ps_amdfam10 (operands[0], operands[1]));
+ DONE;
+ }
+
if (MEM_P (operands[0]) && MEM_P (operands[1]))
operands[1] = force_reg (DFmode, operands[1]);
@@ -3753,6 +3804,24 @@
}
})
+(define_insn "sse_unpcklpd_amdfam10"
+ [(set (match_operand:DF 0 "register_operand" "=Y")
+ (unspec:DF [(match_operand: DF 1 "register_operand" "0")]
+ UNSPEC_UNPCKLPD_AMDFAM10))]
+ "TARGET_USE_VECTOR_CONVERTS && TARGET_SSE"
+ "unpcklpd\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "V2DF")])
+
+(define_insn "sse2_cvtpd2ps_amdfam10"
+ [(set (match_operand:SF 0 "register_operand" "=Y")
+ (unspec:SF [(match_operand: DF 1 "register_operand" "Y")]
+ UNSPEC_CVTPD2PS_AMDFAM10))]
+ "TARGET_USE_VECTOR_CONVERTS && TARGET_SSE2"
+ "cvtpd2ps\t{%1, %0|%0, %1}"
+ [(set_attr "type" "ssecvt")
+ (set_attr "mode" "V4SF")])
+
(define_expand "truncdfsf2_with_temp"
[(parallel [(set (match_operand:SF 0 "" "")
(float_truncate:SF (match_operand:DF 1 "" "")))
++++++ amdfam10-more.diff ++++++
--- /var/tmp/diff_new_pack.M18314/_old 2007-10-05 16:12:25.000000000 +0200
+++ /var/tmp/diff_new_pack.M18314/_new 2007-10-05 16:12:25.000000000 +0200
@@ -18,7 +18,7 @@
===================================================================
--- gcc/ChangeLog.orig
+++ gcc/ChangeLog
-@@ -373,6 +373,24 @@
+@@ -467,6 +467,24 @@
* tree-ssa-forwprop.c (forward_propagate_addr_expr): Do not
propagate into a stmt that has volatile ops.
@@ -43,10 +43,15 @@
2007-05-01 Ian Lance Taylor <iant@xxxxxxxxxx>
PR tree-optimization/31739
-@@ -1525,6 +1543,19 @@
+@@ -1619,6 +1637,24 @@
memory. Fail if operand 1 is a non-zero CONST_INT and operand 0
is a hard floating-point register.
++2007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@xxxxxxx>
++
++ * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10.
++ (bit_SSE4a): New.
++
+2007-02-08 Harsha Jagasia <harsha.jagasia@xxxxxxx>
+
+ * config/i386/xmmintrin.h: Make inclusion of emmintrin.h
@@ -67,6 +72,15 @@
===================================================================
--- gcc/config/i386/i386.c.orig
+++ gcc/config/i386/i386.c
+@@ -1593,7 +1593,7 @@ override_options (void)
+ {&nocona_cost, 0, 0, 0, 0, 0, 0, 0},
+ {&generic32_cost, 0, 0, 16, 7, 16, 7, 16},
+ {&generic64_cost, 0, 0, 16, 7, 16, 7, 16},
+- {&amdfam10_cost, 0, 0, 32, 7, 32, 7, 32}
++ {&amdfam10_cost, 0, 0, 32, 24, 32, 7, 32}
+ };
+
+ static const char * const cpu_names[] = TARGET_CPU_DEFAULT_NAMES;
@@ -1660,10 +1660,19 @@ override_options (void)
| PTA_SSE | PTA_SSE2 },
{"k8", PROCESSOR_K8, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW | PTA_64BIT
@@ -102,3 +116,51 @@
#endif /* __SSE__ */
#endif /* _XMMINTRIN_H_INCLUDED */
+Index: gcc/config/i386/driver-i386.c
+===================================================================
+--- gcc/config/i386/driver-i386.c.orig
++++ gcc/config/i386/driver-i386.c
+@@ -39,6 +39,7 @@ const char *host_detect_local_cpu (int a
+ #define bit_SSE2 (1 << 26)
+
+ #define bit_SSE3 (1 << 0)
++#define bit_SSE4a (1 << 6)
+ #define bit_CMPXCHG16B (1 << 13)
+
+ #define bit_3DNOW (1 << 31)
+@@ -67,7 +68,7 @@ const char *host_detect_local_cpu (int a
+ unsigned int ext_level;
+ unsigned char has_mmx = 0, has_3dnow = 0, has_3dnowp = 0, has_sse = 0;
+ unsigned char has_sse2 = 0, has_sse3 = 0, has_cmov = 0;
+- unsigned char has_longmode = 0, has_cmpxchg8b = 0;
++ unsigned char has_longmode = 0, has_cmpxchg8b = 0, has_sse4a = 0;
+ unsigned char is_amd = 0;
+ unsigned int family = 0;
+ bool arch;
+@@ -118,6 +119,7 @@ const char *host_detect_local_cpu (int a
+ has_3dnow = !!(edx & bit_3DNOW);
+ has_3dnowp = !!(edx & bit_3DNOWP);
+ has_longmode = !!(edx & bit_LM);
++ has_sse4a = !!(ecx & bit_SSE4a);
+ }
+
+ is_amd = vendor == *(unsigned int*)"Auth";
+@@ -130,6 +132,8 @@ const char *host_detect_local_cpu (int a
+ processor = PROCESSOR_ATHLON;
+ if (has_sse2 || has_longmode)
+ processor = PROCESSOR_K8;
++ if (has_sse4a)
++ processor = PROCESSOR_AMDFAM10;
+ }
+ else
+ {
+@@ -259,6 +263,9 @@ const char *host_detect_local_cpu (int a
+ case PROCESSOR_NOCONA:
+ cpu = "nocona";
+ break;
++ case PROCESSOR_AMDFAM10:
++ cpu = "amdfam10";
++ break;
+ case PROCESSOR_GENERIC32:
+ case PROCESSOR_GENERIC64:
+ cpu = "generic";
++++++ gcc-4.2.1-20070724.tar.bz2 -> gcc-4.2.2-20071001.tar.bz2 ++++++
gcc42/gcc-4.2.1-20070724.tar.bz2 /mounts/work_src_done/STABLE/gcc42/gcc-4.2.2-20071001.tar.bz2 differ: byte 11, line 1
++++++ gcc.spec.in ++++++
--- gcc42/gcc.spec.in 2007-09-21 18:06:11.000000000 +0200
+++ /mounts/work_src_done/STABLE/gcc42/gcc.spec.in 2007-10-01 14:50:43.000000000 +0200
@@ -52,7 +52,7 @@
Name: gcc@base_ver@
BuildRequires: bison flex gettext-devel glibc-devel-32bit perl texinfo zlib-devel
%if %{build_ada}
-BuildRequires: gcc-ada
+BuildRequires: gcc-ada gcc@base_ver@-ada
%endif
%if %{build_libjava}
BuildRequires: fastjar gtk2-devel libart_lgpl-devel update-desktop-files unzip
@@ -117,7 +117,7 @@
URL: http://gcc.gnu.org/
License: GPL
-Version: 4.2.1_20070724
+Version: 4.2.2_20071001
Release: 1
%define gcc_version %(echo %version | sed 's/_.*//')
%define snapshot_date %(echo %version | sed 's/[34]\.[0-4]\.[0-6]//' | sed 's/_/-/')
@@ -154,8 +154,6 @@
Patch38: large-gcc.diff
Patch40: pr27880.diff
Patch41: pr31490.diff
-Patch42: pr33148.diff
-Patch43: ld-version.diff
Patch44: pr33381.diff
# A set of patches from the RH srpm
Patch51: gcc41-ia64-stack-protector.patch
@@ -171,6 +169,8 @@
Patch106: amdfam10-barcelona.diff
Patch107: amdfam10-more.diff
Patch108: pr31307.diff
+Patch109: amdfam10-cvt1.diff
+Patch110: amdfam10-cvt2.diff
# Enhancements
Patch200: fortify-2.diff
Patch201: parentheses-mathematical-41.diff
@@ -782,8 +782,6 @@
#%patch38
%patch40
%patch41
-%patch42
-%patch43
%patch44
%patch51
%patch55
@@ -800,6 +798,8 @@
%patch106
%patch107
%patch108
+%patch109 -p1
+%patch110 -p1
%build
# Avoid conflict with commercial libjawt.so
@@ -891,6 +891,9 @@
CFLAGS="$RPM_OPT_FLAGS" CXXFLAGS="$RPM_OPT_FLAGS" XCFLAGS="$RPM_OPT_FLAGS" \
TCFLAGS="$RPM_OPT_FLAGS" GCJFLAGS="$RPM_OPT_FLAGS" \
+%if %{build_ada}
+CC="gcc%{binsuffix}" GNATBIND="gnatbind%{binsuffix}" \
+%endif
../configure \
%if 0%{?gcc_target_arch:1} && 0%{!?gcc_icecream:1}
%else
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Remember to have fun...
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