https://bugzilla.novell.com/show_bug.cgi?id=298846#c5
--- Comment #5 from Stefan Dirsch 2007-08-09 09:02:27 MST ---
@@ -51,6 +107,7 @@
(II) PCI: 00:06:1: chip 10de,0371 card 10f1,2915 rev a2 class 04,03,00 hdr 80
(II) PCI: 00:08:0: chip 10de,0373 card 10f1,2915 rev a3 class 06,80,00 hdr 00
(II) PCI: 00:09:0: chip 10de,0373 card 10f1,2915 rev a3 class 06,80,00 hdr 00
+(II) PCI: 00:0a:0: chip 10de,0376 card 0000,0000 rev a3 class 06,04,00 hdr 01
(II) PCI: 00:0d:0: chip 10de,0378 card 0000,0000 rev a3 class 06,04,00 hdr 01
(II) PCI: 00:0f:0: chip 10de,0377 card 0000,0000 rev a3 class 06,04,00 hdr 01
(II) PCI: 00:18:0: chip 1022,1100 card 0000,0000 rev 00 class 06,00,00 hdr 80
@@ -62,15 +119,13 @@
(II) PCI: 00:19:2: chip 1022,1102 card 0000,0000 rev 00 class 06,00,00 hdr 80
(II) PCI: 00:19:3: chip 1022,1103 card 0000,0000 rev 00 class 06,00,00 hdr 80
(II) PCI: 01:05:0: chip 104c,8023 card 10f1,2915 rev 00 class 0c,00,10 hdr 00
-(II) PCI: 02:00:0: chip 1033,0125 card 0000,0000 rev 06 class 06,04,00 hdr 81
-(II) PCI: 02:00:1: chip 1033,0125 card 0000,0000 rev 06 class 06,04,00 hdr 81
-(II) PCI: 05:00:0: chip 10de,0402 card 1462,1020 rev a1 class 03,00,00 hdr 00
+(II) PCI: 03:00:0: chip 1033,0125 card 0000,0000 rev 06 class 06,04,00 hdr 81
+(II) PCI: 03:00:1: chip 1033,0125 card 0000,0000 rev 06 class 06,04,00 hdr 81
+(II) PCI: 06:00:0: chip 10de,0402 card 1462,1020 rev a1 class 03,00,00 hdr 00
(II) PCI: 80:00:0: chip 10de,0369 card 10f1,2915 rev a2 class 05,00,00 hdr 00
(II) PCI: 80:01:0: chip 10de,0361 card 10f1,2915 rev a3 class 05,00,00 hdr 80
(II) PCI: 80:01:1: chip 10de,0368 card 10f1,2915 rev a3 class 0c,05,00 hdr 80
-(II) PCI: 80:0a:0: chip 10de,0376 card 0000,0000 rev a3 class 06,04,00 hdr 01
(II) PCI: 80:0d:0: chip 10de,0378 card 0000,0000 rev a3 class 06,04,00 hdr 01
-(II) PCI: 80:0f:0: chip 10de,0377 card 0000,0000 rev a3 class 06,04,00 hdr 01
(II) PCI: End of PCI scan
(II) PCI-to-ISA bridge:
(II) Bus -1: bridge is at (0:1:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
@@ -79,22 +134,24 @@
(II) Bus 1 non-prefetchable memory range:
[0] -1 0 0xb0100000 - 0xb01fffff (0x100000) MX[B]
(II) PCI-to-PCI bridge:
-(II) Bus 2: bridge is at (0:13:0), (0,2,4), BCTRL: 0x0004 (VGA_EN is cleared)
-(II) Bus 2 non-prefetchable memory range:
+(II) Bus 2: bridge is at (0:10:0), (0,2,2), BCTRL: 0x0004 (VGA_EN is cleared)
+(II) PCI-to-PCI bridge:
+(II) Bus 3: bridge is at (0:13:0), (0,3,5), BCTRL: 0x0004 (VGA_EN is cleared)
+(II) Bus 3 non-prefetchable memory range:
[0] -1 0 0xb0200000 - 0xb02fffff (0x100000) MX[B]
(II) PCI-to-PCI bridge:
-(II) Bus 5: bridge is at (0:15:0), (0,5,5), BCTRL: 0x000c (VGA_EN is set)
-(II) Bus 5 I/O range:
+(II) Bus 6: bridge is at (0:15:0), (0,6,6), BCTRL: 0x000c (VGA_EN is set)
+(II) Bus 6 I/O range:
[0] -1 0 0x00003000 - 0x000030ff (0x100) IX[B]
[1] -1 0 0x00003400 - 0x000034ff (0x100) IX[B]
[2] -1 0 0x00003800 - 0x000038ff (0x100) IX[B]
[3] -1 0 0x00003c00 - 0x00003cff (0x100) IX[B]
-(II) Bus 5 non-prefetchable memory range:
+(II) Bus 6 non-prefetchable memory range:
[0] -1 0 0xb1000000 - 0xb3ffffff (0x3000000) MX[B]
-(II) Bus 5 prefetchable memory range:
+(II) Bus 6 prefetchable memory range:
[0] -1 0 0xc0000000 - 0xcfffffff (0x10000000) MX[B]
(II) Host-to-PCI bridge:
-(II) Bus 0: bridge is at (0:24:0), (0,0,131), BCTRL: 0x0008 (VGA_EN is set)
+(II) Bus 0: bridge is at (0:24:0), (0,0,129), BCTRL: 0x0008 (VGA_EN is set)
(II) Bus 0 I/O range:
[0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B]
(II) Bus 0 non-prefetchable memory range:
@@ -102,15 +159,11 @@
(II) Bus 0 prefetchable memory range:
[0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B]
(II) PCI-to-PCI bridge:
-(II) Bus 3: bridge is at (2:0:0), (2,3,3), BCTRL: 0x0004 (VGA_EN is cleared)
-(II) PCI-to-PCI bridge:
-(II) Bus 4: bridge is at (2:0:1), (2,4,4), BCTRL: 0x0004 (VGA_EN is cleared)
-(II) PCI-to-PCI bridge:
-(II) Bus 129: bridge is at (128:10:0), (128,129,129), BCTRL: 0x0004 (VGA_EN is
cleared)
+(II) Bus 4: bridge is at (3:0:0), (3,4,4), BCTRL: 0x0004 (VGA_EN is cleared)
(II) PCI-to-PCI bridge:
-(II) Bus 130: bridge is at (128:13:0), (128,130,130), BCTRL: 0x0004 (VGA_EN is
cleared)
+(II) Bus 5: bridge is at (3:0:1), (3,5,5), BCTRL: 0x0004 (VGA_EN is cleared)
(II) PCI-to-PCI bridge:
-(II) Bus 131: bridge is at (128:15:0), (128,131,131), BCTRL: 0x0004 (VGA_EN is
cleared)
+(II) Bus 129: bridge is at (128:13:0), (128,129,129), BCTRL: 0x0004 (VGA_EN is
cleared)
(II) Host-to-PCI bridge:
(II) Bus 128: bridge is at (0:0:0), (128,128,0), BCTRL: 0x0008 (VGA_EN is set)
(II) Bus 128 I/O range:
@@ -119,7 +172,7 @@
[0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B]
(II) Bus 128 prefetchable memory range:
[0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B]
-(--) PCI:*(5:0:0) nVidia Corporation unknown chipset (0x0402) rev 161, Mem @
0xb1000000/24, 0xc0000000/28, 0xb2000000/25, I/O @ 0x3000/7
+(--) PCI:*(6:0:0) nVidia Corporation unknown chipset (0x0402) rev 161, Mem @
0xb1000000/24, 0xc0000000/28, 0xb2000000/25, I/O @ 0x3000/7
(II) Addressable bus resource ranges are
[0] -1 0 0x00000000 - 0xffffffff (0x100000000) MX[B]
[1] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B]
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