Hi, On Sat, 10 Jul 2004, Mark Hounschell wrote:
I have a small routine that reads the TSC off the processor. This routine works fine on a 32 bit P4 platform. I'm perplexed as to why it does not work as expected on the amd-64 platform in 64 bit mode with SuSE-9.1 The most significant 32 bits of the counter are being chopped off somewhere? Is it obvious to anyone why?
__asm__ __volatile__("rdtsc" : "=A" (val));
constraint 'A' specifies '?dx:?ax'. On amd64 u_int64_t (the type of val) is mapped only to register rax, not to the above pair, like on x86. Better write similar to this (works on both): u_int32_t vlo, vhi; u_int64_t val; __asm__ __volatile__("rdtsc" : "=a" (vlo), "=d" (vhi)); val = vhi; val = val << 32 | vlo; Ciao, Michael.