xf86-video-radeonhd:r6xx-r7xx-support: 1 commit(s)
Reporting from xf86-video-radeonhd: Radeon HD video driver
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Commit against r6xx-r7xx-support at 85e406dd...:
commit d76e949a43d42109aadd7810fda8e9f8ce3e1d44
Author: Alex Deucher
On Feb 10, 09 16:38:43 -0800, Alex Deucher wrote:
M82: Missed one in the previous commit
Alex, if you used the Type 3 packet as in r600_demo
flush_gpu_source_cache(), this should be selected correctly
automatically. And I personally think that this name better describes
what the function actually does.
CU
Matthias
--
Matthias Hopf
On Fri, Feb 13, 2009 at 12:02 PM, Matthias Hopf
On Feb 10, 09 16:38:43 -0800, Alex Deucher wrote:
M82: Missed one in the previous commit
Alex, if you used the Type 3 packet as in r600_demo flush_gpu_source_cache(), this should be selected correctly automatically. And I personally think that this name better describes what the function actually does.
What would be selected automatically? Whether the you the sync packet or the current setup, you still need to specify what caches to flush. I suppose the VC/TC logic for vertex flushing could be moved to the surface_sync function. Also, the surface_sync function can also be used to flush destination cases as well. Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
On Feb 13, 09 13:06:00 -0500, Alex Deucher wrote:
On Fri, Feb 13, 2009 at 12:02 PM, Matthias Hopf
wrote: On Feb 10, 09 16:38:43 -0800, Alex Deucher wrote:
M82: Missed one in the previous commit
Alex, if you used the Type 3 packet as in r600_demo flush_gpu_source_cache(), this should be selected correctly automatically. And I personally think that this name better describes what the function actually does. What would be selected automatically? Whether the you the sync packet
Wether TC or VC cache should be flushed. Currently this is selected
according to chip type (if it doesn't have a VC, flush TC, though I
think that we do not use the TC using vertex fetch commands yet).
According to the docs the Type 3 packet is selecting the right cache
through different firmwares. So this should work out-of-the-box. I'm
saying should, because probably nobody has ever tested that.
CU
Matthias
--
Matthias Hopf
On Mon, Feb 16, 2009 at 9:18 AM, Matthias Hopf
On Feb 13, 09 13:06:00 -0500, Alex Deucher wrote:
On Fri, Feb 13, 2009 at 12:02 PM, Matthias Hopf
wrote: On Feb 10, 09 16:38:43 -0800, Alex Deucher wrote:
M82: Missed one in the previous commit
Alex, if you used the Type 3 packet as in r600_demo flush_gpu_source_cache(), this should be selected correctly automatically. And I personally think that this name better describes what the function actually does. What would be selected automatically? Whether the you the sync packet
Wether TC or VC cache should be flushed. Currently this is selected according to chip type (if it doesn't have a VC, flush TC, though I think that we do not use the TC using vertex fetch commands yet).
According to the docs the Type 3 packet is selecting the right cache through different firmwares. So this should work out-of-the-box. I'm saying should, because probably nobody has ever tested that.
Ah right, I see what you are saying. I'll give it a try. Alex -- To unsubscribe, e-mail: radeonhd+unsubscribe@opensuse.org For additional commands, e-mail: radeonhd+help@opensuse.org
participants (3)
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agd5f@kemper.freedesktop.org
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Alex Deucher
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Matthias Hopf