Hello community,
here is the log from the commit of package xorg-x11-driver-video-radeonhd for openSUSE:Factory
checked in at Tue Nov 10 11:50:53 CET 2009.
--------
--- xorg-x11-driver-video-radeonhd/xorg-x11-driver-video-radeonhd.changes 2009-10-27 20:25:30.000000000 +0100
+++ /mounts/work_src_done/STABLE/xorg-x11-driver-video-radeonhd/xorg-x11-driver-video-radeonhd.changes 2009-11-06 14:42:46.000000000 +0100
@@ -1,0 +2,8 @@
+Fri Nov 6 14:24:21 CET 2009 - eich@suse.de
+
+- Updated driver:
+ * Fix 2D/3D engine lockups.
+ * Fix I2C readout fail under certain conditions.
+ * Disable DRI/Acceleration for R6XX and up until fix for lockups is found.
+
+-------------------------------------------------------------------
calling whatdependson for head-i586
Old:
----
xf86-video-radeonhd-1.3.0_20091026_8b89b9.tar.bz2
New:
----
R6XX-disable-acceleration.patch
xf86-video-radeonhd-1.3.0_20091106_619706.tar.bz2
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ xorg-x11-driver-video-radeonhd.spec ++++++
--- /var/tmp/diff_new_pack.jwiasw/_old 2009-11-10 11:48:26.000000000 +0100
+++ /var/tmp/diff_new_pack.jwiasw/_new 2009-11-10 11:48:26.000000000 +0100
@@ -1,5 +1,5 @@
#
-# spec file for package xorg-x11-driver-video-radeonhd (Version 1.3.0_20091026_8b89b9)
+# spec file for package xorg-x11-driver-video-radeonhd (Version 1.3.0_20091106_619706)
#
# Copyright (c) 2009 SUSE LINUX Products GmbH, Nuernberg, Germany.
#
@@ -44,7 +44,7 @@
%endif
AutoReqProv: on
%define vers 1.3.0
-Version: %{vers}_20091026_8b89b9
+Version: %{vers}_20091106_619706
Release: 1
Summary: Driver for AMD GPG (ATI) r5xx/r6xx Chipsets
%if 0%{?suse_version}
@@ -56,6 +56,7 @@
BuildRoot: %{_tmppath}/%{name}-%{version}-build
PreReq: /bin/rm /bin/cat
Source: xf86-video-radeonhd-%{version}.tar.bz2
+Patch1: R6XX-disable-acceleration.patch
%description
radeonhd is the X.org X11 driver for AMD GPG (ATI) r5xx/r6xx chipsets.
@@ -73,6 +74,7 @@
%prep
%setup -n xf86-video-radeonhd-%vers
+%patch1 -p1
%build
%if 0%{?suse_version} > 1010 || 0%{?fedora_version} >= 6 || 0%{?mandriva_version} > 2006
++++++ R6XX-disable-acceleration.patch ++++++
diff --git a/src/rhd_dri.c b/src/rhd_dri.c
index 422fc13..6e78086 100644
--- a/src/rhd_dri.c
+++ b/src/rhd_dri.c
@@ -1152,6 +1152,10 @@ Bool RHDDRIPreInit(ScrnInfoPtr pScrn)
"Direct rendering explicitly turned off.\n");
return FALSE;
}
+ if (rhdPtr->ChipSet >= RHD_R600) {
+ if (!rhdPtr->useDRI.set || (rhdPtr->useDRI.val.bool == FALSE))
+ return FALSE;
+ }
if (xf86IsEntityShared(rhdPtr->pEnt->index)) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
++++++ xf86-video-radeonhd-1.3.0_20091026_8b89b9.tar.bz2 -> xf86-video-radeonhd-1.3.0_20091106_619706.tar.bz2 ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/r5xx_accel.c new/xf86-video-radeonhd-1.3.0/src/r5xx_accel.c
--- old/xf86-video-radeonhd-1.3.0/src/r5xx_accel.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/r5xx_accel.c 2009-11-06 13:18:13.000000000 +0100
@@ -73,7 +73,9 @@
#include "r5xx_accel.h"
#include "r5xx_regs.h"
#include "r5xx_3dregs.h"
-
+#ifdef USE_DRI
+#include "rhd_dri.h"
+#endif
/*
* Used by both XAA and EXA code.
*/
@@ -353,15 +355,12 @@
R5xx2DStart(ScrnInfoPtr pScrn)
{
RHDPtr rhdPtr = RHDPTR(pScrn);
+ CARD32 pipe;
RHDFUNC(pScrn);
- if ((rhdPtr->ChipSet != RHD_RS690) &&
- (rhdPtr->ChipSet != RHD_RS600) &&
- (rhdPtr->ChipSet != RHD_RS740)) {
- CARD8 pipe = (RHDRegRead(rhdPtr, R400_GB_PIPE_SELECT) >> 4) & 0xF0;
- RHDWritePLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, pipe | 0x01);
- }
+ pipe = (RHDRegRead(rhdPtr, R400_GB_PIPE_SELECT) >> 4) & 0xF0;
+ RHDWritePLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, pipe | 0x01);
RHDRegMask(pScrn, R5XX_GB_TILE_CONFIG, 0, R5XX_ENABLE_TILING);
RHDRegWrite(pScrn, R5XX_WAIT_UNTIL,
@@ -421,6 +420,21 @@
}
/*
+ * Map the number of GB Pipes the hardware has.
+ */
+static int
+R5xxGBPipesCount(ScrnInfoPtr pScrn)
+{
+#ifdef USE_DRI
+ union rhdValue val;
+
+ if (RHDDRIGetHWParam(pScrn, RHD_NUM_GB_PIPES, &val))
+ return val.Int;
+#endif
+ return ((RHDRegRead(pScrn, R400_GB_PIPE_SELECT) >> 12) & 0x03) + 1;
+}
+
+/*
* Handlers for rhdPtr->ThreeDInfo.
*/
void
@@ -438,6 +452,8 @@
R5xx3D = (struct R5xx3D *) xnfcalloc(1, sizeof(struct R5xx3D));
R5xx3D->XHas3DEngineState = FALSE;
+ /* set this up here; not when the engine is running! */
+ R5xx3D->num_gb_pipes = R5xxGBPipesCount(pScrn);
rhdPtr->ThreeDPrivate = R5xx3D;
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/r5xx_accel.h new/xf86-video-radeonhd-1.3.0/src/r5xx_accel.h
--- old/xf86-video-radeonhd-1.3.0/src/r5xx_accel.h 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/r5xx_accel.h 2009-11-06 13:18:13.000000000 +0100
@@ -90,6 +90,7 @@
/* Size of tiles ... set to 65536x65536 if not tiling in that direction */
Bool src_tile_width;
Bool src_tile_height;
+ int num_gb_pipes;
};
void R5xx3DInit(ScrnInfoPtr pScrn);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/r5xx_exa.c new/xf86-video-radeonhd-1.3.0/src/r5xx_exa.c
--- old/xf86-video-radeonhd-1.3.0/src/r5xx_exa.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/r5xx_exa.c 2009-11-06 13:18:13.000000000 +0100
@@ -205,7 +205,8 @@
static void
R5xxEXADoneSolid(PixmapPtr pPix)
{
- ;
+ struct RhdCS *CS = RHDPTRE(pPix->drawable.pScreen)->CS;
+ R5xxEngineWaitIdle2D(CS);
}
/*
@@ -315,7 +316,8 @@
static void
R5xxEXADoneCopy(PixmapPtr pDst)
{
- ;
+ struct RhdCS *CS = RHDPTRE(pDst->drawable.pScreen)->CS;
+ R5xxEngineWaitIdle2D(CS);
}
/*
@@ -481,6 +483,7 @@
}
exaMarkSync(pDst->drawable.pScreen);
+ R5xxEngineWaitIdle2D(CS);
return TRUE;
}
@@ -676,6 +679,7 @@
/* since we had a full idle every time, we make sure we don't do
yet another system call here */
ExaPrivate->exaMarkerSynced = ExaPrivate->exaSyncMarker;
+ R5xxEngineWaitIdle2D(CS);
return TRUE;
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/radeon_3d.c new/xf86-video-radeonhd-1.3.0/src/radeon_3d.c
--- old/xf86-video-radeonhd-1.3.0/src/radeon_3d.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/radeon_3d.c 2009-11-06 13:18:13.000000000 +0100
@@ -65,15 +65,7 @@
# define HAS_TCL info->has_tcl
-# define R5XXPowerPipes(p) {}
-
-/* Map the number of GB Pipes the hardware has. */
-static int
-R5xxGBPipesCount(ScrnInfoPtr pScrn)
-{
- return ((RHDRegRead(pScrn, R400_GB_PIPE_SELECT) >> 12) & 0x03) + 1;
-}
-#define NUM_GB_PIPES R5xxGBPipesCount(pScrn)
+#define NUM_GB_PIPES info->num_gb_pipes
/* Map the number of FPUs the VPS has. */
static int
@@ -136,16 +128,17 @@
/*
* Map the macros.
*/
-#define ACCEL_PREAMBLE() struct RhdCS *CS = rhdPtr->CS
+#define ACCEL_PREAMBLE() struct RhdCS *CS = rhdPtr->CS; \
+ if (pScrn->pScreen) \
+ RHDDRIContextClaim(pScrn)
+
#define BEGIN_ACCEL(Count) RHDCSGrab(CS, 2 * (Count))
#define OUT_ACCEL_REG(Reg, Value) RHDCSRegWrite(CS, (Reg), (Value))
#define FINISH_ACCEL()
#ifdef USE_DRI
-#define END_ACCEL() RHDCSAdvance(CS); \
- if (pScrn->pScreen) \
- RHDDRIContextClaim(pScrn)
+#define END_ACCEL() RHDCSAdvance(CS);
#else
#define END_ACCEL() RHDCSAdvance(CS)
#endif
@@ -164,13 +157,7 @@
#define HAS_TCL IS_R500_3D
-/* Map the number of GB Pipes the hardware has. */
-static int
-R5xxGBPipesCount(ScrnInfoPtr pScrn)
-{
- return ((RHDRegRead(pScrn, R400_GB_PIPE_SELECT) >> 12) & 0x03) + 1;
-}
-#define NUM_GB_PIPES R5xxGBPipesCount(pScrn)
+#define NUM_GB_PIPES accel_state->num_gb_pipes
/* Map the number of FPUs the VPS has. */
static int
@@ -202,19 +189,6 @@
}
#define NUM_PVS_FPUS R5xxPVSFPUCount(pScrn)
-/*
- *
- */
-static void
-R5XXPowerPipes(ScrnInfoPtr pScrn)
-{
- CARD32 tmp = RHDRegRead(pScrn, R400_GB_PIPE_SELECT);
- RHDWritePLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((tmp >> 8) & 0xf) << 4));
-}
-/* for radeon, this is done elsewhere, so use:
- * #define R5XXPowerPipes(x)
- */
-
#endif /* IS_RADEON_DRIVER */
#if defined(IS_RADEON_DRIVER) || defined(IS_QUICK_AND_DIRTY)
@@ -239,6 +213,9 @@
accel_state->texW[1] = 1;
accel_state->texH[1] = 1;
+ RHDDRIContextClaim(pScrn);
+
+
#ifdef IS_RADEON_DRIVER
if (IS_R300_3D || IS_R500_3D) {
#endif
@@ -248,9 +225,6 @@
OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
FINISH_ACCEL();
- if (IS_R500_3D)
- R5XXPowerPipes(pScrn);
-
gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
switch(num_gb_pipes) {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/radeon_textured_videofuncs.c new/xf86-video-radeonhd-1.3.0/src/radeon_textured_videofuncs.c
--- old/xf86-video-radeonhd-1.3.0/src/radeon_textured_videofuncs.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/radeon_textured_videofuncs.c 2009-11-06 13:18:13.000000000 +0100
@@ -125,6 +125,7 @@
# define ADVANCE_RING() RHDCSAdvance(CS)
# define OUT_VIDEO_RING_F(x) OUT_RING(F_TO_DW(x))
+# define RADEON_SWITCH_TO_3D() R5xxEngineWaitIdle2D(rhdPtr->CS)
#define VTX_DWORD_COUNT 4
@@ -244,6 +245,8 @@
if (!accel_state->XHas3DEngineState)
RADEONInit3DEngine(pScrn);
+ RADEON_SWITCH_TO_3D();
+
/* we can probably improve this */
BEGIN_VIDEO(2);
#ifdef IS_RADEON_DRIVER
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_acpi.c new/xf86-video-radeonhd-1.3.0/src/rhd_acpi.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_acpi.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_acpi.c 2009-11-06 13:18:13.000000000 +0100
@@ -2,6 +2,7 @@
* Copyright 2009 Luc Verhaegen
* Copyright 2009 Matthias Hopf
* Copyright 2009 Egbert Eich
+ * Copyright 2009 Jung-uk Kim
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -48,6 +49,70 @@
#include "rhd_acpi.h"
+#if defined(__FreeBSD__) || defined(__DragonFly__)
+
+#include
+#include
+
+#define ACPI_VIDEO_LEVELS "hw.acpi.video.lcd0.levels"
+#define ACPI_VIDEO_BRIGHTNESS "hw.acpi.video.lcd0.brightness"
+
+/*
+ * Get/Set LCD backlight brightness via acpi_video(4).
+ */
+static Bool
+rhdDoBacklight(struct rhdOutput *Output, Bool do_write, int *val)
+{
+ int *levels;
+ size_t len;
+ int level, max_val, num_levels;
+ int i;
+ RHDFUNC(Output);
+
+ if (sysctlbyname(ACPI_VIDEO_LEVELS, NULL, &len, NULL, 0) != 0 || len == 0)
+ return FALSE;
+ levels = (int *)malloc(len);
+ if (levels == NULL)
+ return FALSE;
+ if (sysctlbyname(ACPI_VIDEO_LEVELS, levels, &len, NULL, 0) != 0) {
+ free(levels);
+ return FALSE;
+ }
+
+ num_levels = len / sizeof(*levels);
+ for (i = 0, max_val = 0; i < num_levels; i++)
+ if (levels[i] > max_val)
+ max_val = levels[i];
+
+ if (do_write) {
+ int d1 = max_val * RHD_BACKLIGHT_PROPERTY_MAX + 1;
+ for (i = 0, level = -1; i < num_levels; i++) {
+ int d2 = abs(*val * max_val - levels[i] * RHD_BACKLIGHT_PROPERTY_MAX);
+ if (d2 < d1) {
+ level = levels[i];
+ d1 = d2;
+ }
+ }
+ free(levels);
+ if (level < 0)
+ return FALSE;
+ if (sysctlbyname(ACPI_VIDEO_BRIGHTNESS, NULL, 0, &level, sizeof(level)) != 0)
+ return FALSE;
+ RHDDebug(Output->scrnIndex, "%s: Wrote value %i (ACPI %i)\n", __func__, *val, level);
+ } else {
+ free(levels);
+ len = sizeof(level);
+ if (sysctlbyname(ACPI_VIDEO_BRIGHTNESS, &level, &len, NULL, 0) != 0)
+ return FALSE;
+ *val = level * RHD_BACKLIGHT_PROPERTY_MAX / max_val;
+ RHDDebug(Output->scrnIndex, "%s: Read value %i (ACPI %i)\n", __func__, *val, level);
+ }
+
+ return TRUE;
+}
+
+#elif defined(__linux__)
+
#define ACPI_PATH "/sys/class/backlight"
/*
@@ -121,6 +186,20 @@
return FALSE;
}
+#else
+
+/*
+ * Stub
+ */
+static Bool
+rhdDoBacklight(struct rhdOutput *Output, Bool do_write, int *val)
+{
+ if (do_write)
+ &val = -1;
+ return FALSE;
+}
+
+#endif
/*
* RhdACPIGetBacklightControl(): return backlight value in range 0..255;
@@ -129,13 +208,12 @@
int
RhdACPIGetBacklightControl(struct rhdOutput *Output)
{
-#ifdef __linux__
int ret;
+
RHDFUNC(Output);
- if (rhdDoBacklight(Output, FALSE, &ret))
- return ret;
-#endif
- return -1;
+
+ rhdDoBacklight(Output, FALSE, &ret);
+ return ret;
}
/*
@@ -145,7 +223,6 @@
RhdACPISetBacklightControl(struct rhdOutput *Output, int val)
{
RHDFUNC(Output);
-#ifdef __linux__
+
rhdDoBacklight(Output, TRUE, &val);
-#endif
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_atombios.c new/xf86-video-radeonhd-1.3.0/src/rhd_atombios.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_atombios.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_atombios.c 2009-11-06 13:18:13.000000000 +0100
@@ -887,7 +887,7 @@
*
*/
Bool
-rhdAtomSetScaler(atomBiosHandlePtr handle, enum atomScaler scalerID, enum atomScaleMode mode)
+rhdAtomSetScaler(atomBiosHandlePtr handle, enum atomScaler scalerID, enum atomScaleMode mode, enum AtomTVMode tvMode)
{
ENABLE_SCALER_PARAMETERS scaler;
AtomBiosArgRec data;
@@ -917,6 +917,38 @@
scaler.ucEnable = ATOM_SCALER_MULTI_EX;
break;
}
+ switch (tvMode) {
+ case ATOM_TVMODE_NTSC:
+ scaler.ucTVStandard = ATOM_TV_NTSC;
+ break;
+ case ATOM_TVMODE_NTSCJ:
+ scaler.ucTVStandard = ATOM_TV_NTSCJ;
+ break;
+ case ATOM_TVMODE_PAL:
+ scaler.ucTVStandard = ATOM_TV_PAL;
+ break;
+ case ATOM_TVMODE_PALM:
+ scaler.ucTVStandard = ATOM_TV_PALM;
+ break;
+ case ATOM_TVMODE_PALCN:
+ scaler.ucTVStandard = ATOM_TV_PALCN;
+ break;
+ case ATOM_TVMODE_PALN:
+ scaler.ucTVStandard = ATOM_TV_PALN;
+ break;
+ case ATOM_TVMODE_PAL60:
+ scaler.ucTVStandard = ATOM_TV_PAL60;
+ break;
+ case ATOM_TVMODE_SECAM:
+ scaler.ucTVStandard = ATOM_TV_SECAM;
+ break;
+ case ATOM_TVMODE_CV:
+ scaler.ucTVStandard = ATOM_TV_CV;
+ break;
+ case ATOM_TVMODE_NONE:
+ scaler.ucTVStandard = 0;
+ break;
+ }
data.exec.dataSpace = NULL;
data.exec.index = GetIndexIntoMasterTable(COMMAND, EnableScaler);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_atombios.h new/xf86-video-radeonhd-1.3.0/src/rhd_atombios.h
--- old/xf86-video-radeonhd-1.3.0/src/rhd_atombios.h 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_atombios.h 2009-11-06 13:18:13.000000000 +0100
@@ -152,6 +152,7 @@
};
typedef enum AtomTVMode {
+ ATOM_TVMODE_NONE = 0,
ATOM_TVMODE_NTSC = 1 << 0,
ATOM_TVMODE_NTSCJ = 1 << 1,
ATOM_TVMODE_PAL = 1 << 2,
@@ -526,7 +527,7 @@
extern struct atomCodeTableVersion rhdAtomASICInitVersion(atomBiosHandlePtr handle);
# endif
extern Bool rhdAtomSetScaler(atomBiosHandlePtr handle, enum atomScaler scaler,
- enum atomScaleMode mode);
+ enum atomScaleMode mode, enum AtomTVMode tvMode);
extern struct atomCodeTableVersion rhdAtomSetScalerVersion(atomBiosHandlePtr handle);
extern Bool rhdAtomDigTransmitterControl(atomBiosHandlePtr handle, enum atomTransmitter id,
enum atomTransmitterAction action,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_atomcrtc.c new/xf86-video-radeonhd-1.3.0/src/rhd_atomcrtc.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_atomcrtc.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_atomcrtc.c 2009-11-06 13:18:13.000000000 +0100
@@ -136,7 +136,8 @@
ScaleMode = atomScaleExpand;
break;
}
- rhdAtomSetScaler(rhdPtr->atomBIOS, Scaler, ScaleMode);
+ ScaleMode = atomScaleDisable;
+ rhdAtomSetScaler(rhdPtr->atomBIOS, Scaler, ScaleMode, ATOM_TVMODE_NONE);
data.Address = NULL;
RHDAtomBiosFunc(rhdPtr->scrnIndex, rhdPtr->atomBIOS, ATOM_SET_REGISTER_LIST_LOCATION, &data);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_crtc.c new/xf86-video-radeonhd-1.3.0/src/rhd_crtc.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_crtc.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_crtc.c 2009-11-06 13:18:13.000000000 +0100
@@ -756,7 +756,7 @@
ErrorF("None\n");
RHDRegWrite(Crtc, RegOff + D1SCL_ENABLE, 0);
RHDRegWrite(Crtc, RegOff + D1SCL_TAP_CONTROL, 0);
- RHDRegWrite(Crtc, RegOff + D1MODE_CENTER, 0);
+ RHDRegWrite(Crtc, RegOff + D1MODE_CENTER, 2);
break;
case RHD_CRTC_SCALE_TYPE_CENTER: /* center of the actual mode */
ErrorF("Center\n");
@@ -773,7 +773,7 @@
RHDRegWrite(Crtc, RegOff + D1MODE_CENTER, 0);
RHDRegWrite(Crtc, RegOff + D1SCL_UPDATE, 0);
- RHDRegWrite(Crtc, RegOff + D1SCL_DITHER, 0);
+ RHDRegWrite(Crtc, RegOff + D1SCL_FLIP_CONTROL, 0);
RHDRegWrite(Crtc, RegOff + D1SCL_ENABLE, 1);
RHDRegWrite(Crtc, RegOff + D1SCL_HVSCALE, 0x00010001); /* both h/v */
@@ -980,9 +980,9 @@
X = (X + 0x02) & ~0x03;
Y &= ~0x01;
- RHDRegMask(Crtc, D1SCL_UPDATE, 0x00010000, 0x0001000);
+ RHDRegMask(Crtc, D1SCL_UPDATE, DXSCL_UPDATE_LOCK, DXSCL_UPDATE_LOCK);
RHDRegWrite(Crtc, D1MODE_VIEWPORT_START, (X << 16) | Y);
- RHDRegMask(Crtc, D1SCL_UPDATE, 0, 0x0001000);
+ RHDRegMask(Crtc, D1SCL_UPDATE, 0, DXSCL_UPDATE_LOCK);
Crtc->X = X;
Crtc->Y = Y;
@@ -1000,9 +1000,9 @@
X = (X + 0x02) & ~0x03;
Y &= ~0x01;
- RHDRegMask(Crtc, D2SCL_UPDATE, 0x00010000, 0x0001000);
+ RHDRegMask(Crtc, D2SCL_UPDATE, DXSCL_UPDATE_LOCK, DXSCL_UPDATE_LOCK);
RHDRegWrite(Crtc, D2MODE_VIEWPORT_START, (X << 16) | Y);
- RHDRegMask(Crtc, D2SCL_UPDATE, 0, 0x0001000);
+ RHDRegMask(Crtc, D2SCL_UPDATE, 0, DXSCL_UPDATE_LOCK);
Crtc->X = X;
Crtc->Y = Y;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_dig.c new/xf86-video-radeonhd-1.3.0/src/rhd_dig.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_dig.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_dig.c 2009-11-06 13:18:13.000000000 +0100
@@ -1098,7 +1098,8 @@
rhdPrintDigDebug(rhdPtr,__func__);
- RHDRegMask(Output, off + RV620_DIG1_CNTL, Output->Crtc->Id,
+ RHDRegMask(Output, off + RV620_DIG1_CNTL,
+ (Output->Crtc->Id ? RV62_DIG_SOURCE_SELECT_FMT2 : RV62_DIG_SOURCE_SELECT_FMT1),
RV62_DIG_SOURCE_SELECT);
if (Output->Id == RHD_OUTPUT_UNIPHYA) {
@@ -1146,7 +1147,7 @@
(Private->EncoderMode & 0x7) << 8
| RV62_DIG_START
| (Private->RunDualLink ? RV62_DIG_DUAL_LINK_ENABLE : 0)
- | Output->Crtc->Id,
+ | (Output->Crtc->Id ? RV62_DIG_SOURCE_SELECT_FMT2 : RV62_DIG_SOURCE_SELECT_FMT1),
RV62_DIG_MODE
| RV62_DIG_START
| RV62_DIG_DUAL_LINK_ENABLE
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_dri.c new/xf86-video-radeonhd-1.3.0/src/rhd_dri.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_dri.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_dri.c 2009-11-06 13:18:13.000000000 +0100
@@ -978,7 +978,7 @@
"[drm] falling back to irq-free operation\n");
rhdDRI->irq = 0;
} else {
-/* FIXME
+/* FIXME
rhdDRI->ModeReg->gen_int_cntl = RHDRegRead (rhdDRI, RADEON_GEN_INT_CNTL ); */
}
}
@@ -1771,7 +1771,7 @@
static void RHDDRITransitionMultiToSingle3d(ScreenPtr pScreen)
{
- /* Let the remaining 3d app start page flipping again
+ /* Let the remaining 3d app start page flipping again
* RHDEnablePageFlip(pScreen); */
}
@@ -1993,3 +1993,35 @@
return rhdDRI->gartLocation + rhdDRI->bufStart;
}
+
+/*
+ *
+ */
+Bool
+RHDDRIGetHWParam(ScrnInfoPtr pScrn, enum RHDDRIHWParam param, union rhdValue *val)
+{
+ RHDPtr rhdPtr = RHDPTR(pScrn);
+ struct rhdDri *rhdDRI = rhdPtr->dri;
+ struct drm_radeon_getparam gp;
+ char *name;
+
+ if (!rhdDRI || rhdDRI->drmFD == 0)
+ return FALSE;
+
+ switch (param) {
+ case RHD_NUM_GB_PIPES:
+ gp.param = RADEON_PARAM_NUM_GB_PIPES;
+ gp.value = &(val->Int);
+ name = "number of pipes";
+ break;
+ }
+ if (drmCommandWriteRead(rhdDRI->drmFD, DRM_RADEON_GETPARAM, &gp,
+ sizeof(gp)) < 0) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Failed to determine %s from DRM.\n",name);
+ return FALSE;
+ }
+ xf86DrvMsgVerb(pScrn->scrnIndex, 4, X_INFO,
+ "Got %s param from DRM.\n",name);
+ return TRUE;
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_dri.h new/xf86-video-radeonhd-1.3.0/src/rhd_dri.h
--- old/xf86-video-radeonhd-1.3.0/src/rhd_dri.h 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_dri.h 2009-11-06 13:18:13.000000000 +0100
@@ -25,6 +25,10 @@
#ifndef _RHD_DRI_
#define _RHD_DRI_
+enum RHDDRIHWParam {
+ RHD_NUM_GB_PIPES
+};
+
extern Bool RHDDRIPreInit(ScrnInfoPtr pScrn);
extern Bool RHDDRIAllocateBuffers(ScrnInfoPtr pScrn);
extern Bool RHDDRIScreenInit(ScreenPtr pScreen);
@@ -34,8 +38,9 @@
extern void RHDDRIEnterVT(ScreenPtr pScreen);
extern void RHDDRILeaveVT(ScreenPtr pScreen);
extern Bool RHDDRIScreenInit(ScreenPtr pScreen);
+extern void RHDDRIContextClaim(ScrnInfoPtr pScrn);
+extern Bool RHDDRIGetHWParam(ScrnInfoPtr pScrn, enum RHDDRIHWParam param, union rhdValue *val);
+
-/* Claim the 3D context */
-void RHDDRIContextClaim(ScrnInfoPtr pScrn);
#endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd.h new/xf86-video-radeonhd-1.3.0/src/rhd.h
--- old/xf86-video-radeonhd-1.3.0/src/rhd.h 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd.h 2009-11-06 13:18:13.000000000 +0100
@@ -216,6 +216,16 @@
RHD_ACCEL_DEFAULT = 5 /* keep as highest. */
};
+union rhdValue {
+ CARD8 Card8;
+ CARD16 Card16;
+ CARD32 Card32;
+ char Char;
+ short Short;
+ int Int;
+ char *String;
+};
+
typedef struct RHDRec {
int scrnIndex;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_i2c.c new/xf86-video-radeonhd-1.3.0/src/rhd_i2c.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_i2c.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_i2c.c 2009-11-06 13:18:13.000000000 +0100
@@ -1365,6 +1365,13 @@
}
I2CList[i] = I2CPtr;
}
+ /*
+ * This magic is needed to pry loose the scaler which appears to affect hardware controlled
+ * I2C readout ?!? after the radeon driver has erronously tried to restore this multi tap data
+ * register. I put this here for now before I find a better place for it.
+ */
+ RHDRegRead(rhdPtr, 0x657C);
+
return I2CList;
error:
rhdTearDownI2C(I2CList);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_modes.c new/xf86-video-radeonhd-1.3.0/src/rhd_modes.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_modes.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_modes.c 2009-11-06 13:18:13.000000000 +0100
@@ -378,7 +378,7 @@
if (mode->Flags & V_CLKDIV2) add(&flags, "vclk/2");
#endif
xf86Msg(X_NONE, "Modeline \"%s\" %6.2f %i %i %i %i %i %i %i %i%s\n",
- mode->name, mode->Clock/1000.,
+ mode->name, ((float)mode->Clock)/1000.,
mode->HDisplay, mode->HSyncStart, mode->HSyncEnd, mode->HTotal,
mode->VDisplay, mode->VSyncStart, mode->VSyncEnd, mode->VTotal,
flags);
@@ -1844,3 +1844,40 @@
RHDModesAdd(Mode, Tmp);
}
}
+
+/*
+ * This function may be used to sanitize bogus PANEL modes reported by AtomBIOS.
+ */
+void
+RHDSanitizeModes(int scrnIndex, DisplayModePtr Modes, char *ReportedBy)
+{
+ while (Modes) {
+ Bool sanitized = FALSE;
+
+ /* do a little sanitization as some BIOSes seem to report bogus modes */
+ if (Modes->HTotal <= Modes->HSyncEnd) {
+ Modes->HTotal = Modes->CrtcHTotal = Modes->HSyncEnd + 1;
+ sanitized = TRUE;
+ }
+ if (Modes->VTotal <= Modes->VSyncEnd) {
+ Modes->VTotal = Modes->CrtcVTotal = Modes->VSyncEnd + 1;
+ sanitized = TRUE;
+ }
+ if (Modes->CrtcHBlankEnd <= Modes->CrtcHSyncEnd) {
+ Modes->CrtcHBlankEnd = Modes->CrtcHSyncEnd + 1;
+ sanitized = TRUE;
+ }
+ if (Modes->CrtcVBlankEnd <= Modes->CrtcVSyncEnd) {
+ Modes->CrtcVBlankEnd = Modes->CrtcVSyncEnd + 1;
+ sanitized = TRUE;
+ }
+ if (sanitized) {
+ xf86DrvMsg(scrnIndex, X_WARNING, "Mode %s reported by %s sanitized!\n",
+ Modes->name ? Modes->name : "unnamed",ReportedBy);
+ Modes->HSync = ((float) Modes->Clock) / ((float)Modes->HTotal);
+ Modes->VRefresh = (1000.0 * ((float) Modes->Clock))
+ / ((float)(((float)Modes->HTotal) * ((float)Modes->VTotal)));
+ }
+ Modes = Modes->next;
+ }
+}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_modes.h new/xf86-video-radeonhd-1.3.0/src/rhd_modes.h
--- old/xf86-video-radeonhd-1.3.0/src/rhd_modes.h 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_modes.h 2009-11-06 13:18:13.000000000 +0100
@@ -81,5 +81,6 @@
int RHDValidateScaledToMode(struct rhdCrtc *Crtc, DisplayModePtr Mode);
int RHDRRValidateScaledToMode(struct rhdOutput *Output, DisplayModePtr Mode);
void RHDSynthModes(int scrnIndex, DisplayModePtr Mode);
+void RHDSanitizeModes(int scrnIndex, DisplayModePtr Modes, char *ReportedBy);
#endif /* _RHD_MODES_H */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_monitor.c new/xf86-video-radeonhd-1.3.0/src/rhd_monitor.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_monitor.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_monitor.c 2009-11-06 13:18:13.000000000 +0100
@@ -57,7 +57,7 @@
{
int i;
- xf86Msg(X_NONE, " Bandwidth: %dMHz\n", Monitor->Bandwidth / 1000);
+ xf86Msg(X_NONE, " Bandwidth: %6.2fMHz\n", ((float)Monitor->Bandwidth) / 1000.0);
xf86Msg(X_NONE, " Horizontal timing:\n");
for (i = 0; i < Monitor->numHSync; i++)
xf86Msg(X_NONE, " %3.1f - %3.1fkHz\n", Monitor->HSync[i].lo,
@@ -355,6 +355,7 @@
if (Mode) {
Monitor->Name = xstrdup("LVDS Panel");
Monitor->Modes = RHDModesAdd(Monitor->Modes, Mode);
+ RHDSanitizeModes(Monitor->scrnIndex, Monitor->Modes,"AtomBIOS Panel Mode");
Monitor->NativeMode = Mode;
Monitor->numHSync = 1;
Monitor->HSync[0].lo = Mode->HSync;
@@ -374,6 +375,7 @@
}
} else if (EDID) {
RHDMonitorEDIDSet(Monitor, EDID);
+ RHDSanitizeModes(Monitor->scrnIndex, Monitor->Modes, "AtomBIOS Panel EDID block");
rhdPanelEDIDModesFilter(Monitor);
} else {
xf86DrvMsg(Connector->scrnIndex, X_ERROR,
@@ -382,21 +384,6 @@
return NULL;
}
- /* Fixup some broken modes - if we can do so, otherwise we might have no
- * chance of driving the panel at all */
- if (Monitor->NativeMode) {
-
- /* Some Panels have H or VSyncEnd values greater than H or VTotal. */
- if (Monitor->NativeMode->HTotal <= Monitor->NativeMode->HSyncEnd)
- Monitor->NativeMode->HTotal = Monitor->NativeMode->CrtcHTotal = Monitor->NativeMode->HSyncEnd + 1;
- if (Monitor->NativeMode->VTotal <= Monitor->NativeMode->VSyncEnd)
- Monitor->NativeMode->VTotal = Monitor->NativeMode->CrtcVTotal = Monitor->NativeMode->VSyncEnd + 1;
- if (Monitor->NativeMode->CrtcHBlankEnd <= Monitor->NativeMode->CrtcHSyncEnd)
- Monitor->NativeMode->CrtcHBlankEnd = Monitor->NativeMode->CrtcHSyncEnd + 1;
- if (Monitor->NativeMode->CrtcVBlankEnd <= Monitor->NativeMode->CrtcVSyncEnd)
- Monitor->NativeMode->CrtcVBlankEnd = Monitor->NativeMode->CrtcVSyncEnd + 1;
- }
-
/* panel should be driven at native resolution only. */
Monitor->UseFixedModes = TRUE;
Monitor->ReducedAllowed = TRUE;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_randr.c new/xf86-video-radeonhd-1.3.0/src/rhd_randr.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_randr.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_randr.c 2009-11-06 13:18:13.000000000 +0100
@@ -1277,11 +1277,13 @@
if (RHDScalePolicy(rout->Connector->Monitor, rout->Connector)) {
if (o->Connector->Monitor) {
+ int Status;
rout->ScaledToMode = RHDModeCopy(o->Connector->Monitor->NativeMode);
xf86DrvMsg(rhdPtr->scrnIndex, X_INFO, "Found native mode: ");
RHDPrintModeline(rout->ScaledToMode);
- if (RHDRRValidateScaledToMode(rout->Output, rout->ScaledToMode) != MODE_OK) {
- xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "Native mode doesn't validate: deleting\n");
+ if ((Status = RHDRRValidateScaledToMode(rout->Output, rout->ScaledToMode)) != MODE_OK) {
+ xf86DrvMsg(rhdPtr->scrnIndex, X_ERROR, "Native mode doesn't validate [%s]: deleting\n",
+ RHDModeStatusToString(Status));
xfree(rout->ScaledToMode->name);
xfree(rout->ScaledToMode);
rout->ScaledToMode = NULL;
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_regs.h new/xf86-video-radeonhd-1.3.0/src/rhd_regs.h
--- old/xf86-video-radeonhd-1.3.0/src/rhd_regs.h 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_regs.h 2009-11-06 13:18:13.000000000 +0100
@@ -407,6 +407,10 @@
DC_GPIO_HPD_Y = 0x7E9C
};
+enum DXSCL_UPDATE_bits {
+ DXSCL_UPDATE_LOCK = (1 << 16)
+};
+
enum CONFIG_CNTL_BITS {
RS69_CFG_ATI_REV_ID_SHIFT = 8,
RS69_CFG_ATI_REV_ID_MASK = 0xF << RS69_CFG_ATI_REV_ID_SHIFT
@@ -620,7 +624,9 @@
RV62_DIG_START = (0x1 << 6),
RV62_DIG_MODE = (0x7 << 8),
RV62_DIG_STEREOSYNC_SELECT = (1 << 2),
- RV62_DIG_SOURCE_SELECT = (1 << 0)
+ RV62_DIG_SOURCE_SELECT = (1 << 0),
+ RV62_DIG_SOURCE_SELECT_FMT1 = (0 << 0),
+ RV62_DIG_SOURCE_SELECT_FMT2 = (1 << 0)
};
enum RV620_DIG_LVDS_DATA_CNTL_BITS {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/xf86-video-radeonhd-1.3.0/src/rhd_video.c new/xf86-video-radeonhd-1.3.0/src/rhd_video.c
--- old/xf86-video-radeonhd-1.3.0/src/rhd_video.c 2009-10-26 15:56:51.000000000 +0100
+++ new/xf86-video-radeonhd-1.3.0/src/rhd_video.c 2009-11-06 13:18:13.000000000 +0100
@@ -347,6 +347,8 @@
CARD16 y = 0, dwords;
CARD16 hpass = ((CS->Size - 10) * 4) / srcPitch;
+ R5xxEngineWaitIdle3D(rhdPtr->CS);
+
while (h) {
if (h < hpass)
hpass = h;
@@ -478,6 +480,8 @@
R5XX_GMC_CLR_CMP_CNTL_DIS | R5XX_GMC_WR_MSK_DIS;
CARD16 y = 0, dwords;
+ R5xxEngineWaitIdle3D(rhdPtr->CS);
+
while (h) {
if (h < hpass)
hpass = h;
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